KR20060059783A - Gan compound semiconductor light emitting element and method of manufacturing the same - Google Patents

Abstract

The present invention relates to a GaN compound semiconductor light emitting device and a method for manufacturing the same. In the present invention, a vertical GaN light emitting device using a metal protective film layer and a metal support layer in order to solve the problem in the conventional horizontal light emitting device.

The present invention forms a thick metal protective film layer of 10 microns or more on the side and bottom of the vertical GaN LED to protect the device from external impact, facilitate chip separation, and use a metal substrate instead of a sapphire substrate. Since it is possible to facilitate the heat dissipation generated during device operation, it is possible to manufacture a device that is bonded to a high output device, and has improved optical output characteristics, and a metal support layer is formed so that the device is bent or damaged by chip breakage. The phenomenon can be prevented, and the P-type electrode can be partially formed in a mesh form on the P-GaN to maximize the emission of light particles formed in the active layer toward the N-GaN layer.

Vertical LED, metal protective layer, metal support layer, reflective film, anti-reflection film, mesh type, insulating film

Description

GaN compound semiconductor light emitting element and method of manufacturing the same

1 is an epi thin film structure of a substrate for a GaN-based blue LED.

2 is a cross-sectional view of a horizontal LED.

3 is a cross-sectional view of a flip-chip type LED.

4 is a cross-sectional view of a vertical LED of the present invention.

5 to 8 are cross-sectional views illustrating a method of manufacturing a vertical LED device according to the present invention.

9 is a graph comparing the electrical and optical characteristics of the vertical LED device and the conventional horizontal LED device manufactured by the fifth process of the present invention.

FIG. 10 is a graph comparing electrical and optical characteristics between a vertical LED device manufactured by a manufacturing process according to FIG. 7 and a vertical LED device manufactured by another manufacturing process of FIG. 5.

<Explanation of symbols for the main parts of the drawings>

10, 100: substrate 12: N-GaN

14, 140: active layer 16: P-GaN

18: P-type transparent electrode 20: P-type pad

22, 160: N-type electrode 24: N-type pad

110: metal protective film layer 120: P-type electrode

130: P-type semiconductor layer 150: N-type semiconductor layer

170: insulating film 180: antireflection film

190: metal support layer 200: reflective film

100: metal support layer 110: P-type reflective film electrode

103: reflection film 160: antireflection film

162: protective film

The present invention relates to a gallium nitride-based (GaN) blue light emitting diode (LED) and a manufacturing method thereof, and more particularly, to a GaN LED device having a vertical structure and a manufacturing method thereof.

GaN has recently been actively researched for high-power GaN LEDs as the prospect of LEDs using GaN semiconductors can replace existing light sources such as incandescent, fluorescent, and mercury lamps. In general, a substrate for manufacturing a GaN LED is a thin film layer in which an N-type GaN (12), an undoped InGaN (active layer; 14), and a P-type GaN (16) are sequentially grown on a sapphire substrate 10, which is a non-conductor. 1 is configured as shown in FIG. Since the sapphire substrate 10 is an insulator, the LED device usually has a horizontal structure as shown in FIG. 2. In this case, reference numeral 18 denotes a P-type transparent electrode, 20 denotes a P-type pad, 22 denotes an N-type electrode, and 24 denotes an N-type pad.

The conventional horizontal GaN light emitting device had the following disadvantages. First, light is emitted through P-type GaN. Since the resistance of the P-type GaN thin film is large, a transparent electrode is formed on the entire surface of the P-GaN to reduce current spreading. When light is emitted, light is absorbed from the transparent electrode, which makes it difficult to improve the light output. Second, since GaN thin film is grown on sapphire with very low thermal conductivity, it is difficult to dissipate heat generated during device operation.

Therefore, a large current spreading-resistance during high output operation has a disadvantage in that the light output is low. In addition, since the heat generated during the operation of the device is not smoothly removed through the sapphire substrate 10, the thermal stability of the device is lowered, which has a problem in high output operation. In order to overcome these drawbacks, flip-chip LEDs using a flip-chip package method for implementing high-power GaN LEDs have been proposed and used. In the case of an LED having a flip-chip structure as shown in FIG. 3, since light emitted from the active layer 14 escapes out through the sapphire substrate 10, the thick P-type ohmic electrode 19 instead of the transparent electrode 18 is provided. ) Can be used to lower the current spreading resistance. Reference numeral 25 denotes a solder, 30 denotes a heat sink, and 32 denotes a conducting mount. However, since the package must be in the form of a flip chip, the manufacturing process is complicated, and a large amount of light particles are absorbed by sapphire while light emitted from the active layer 14 is drawn out through the sapphire substrate 10, thereby reducing the light efficiency characteristics. There are disadvantages. In the conventional horizontal GaN light emitting device as described above, light is emitted through the P-type GaN layer. In this case, since the resistance of the P-type GaN thin film is large, a transparent electrode is formed on the entire surface of the P-GaN layer in order to reduce current diffusion resistance. However, when light is emitted, light is absorbed from the transparent electrode, which makes it difficult to improve the light output. In addition, since the GaN thin film is grown on sapphire having a very low thermal conductivity, it is difficult to release heat generated during device operation.

Therefore, in order to solve the above problem, the present invention can protect a GaN epitaxial substrate having a thickness of only 4 to 5 microns by coating an insulating film on the side of the device, and then applying a metal protective film layer on the P-type electrode and the side of the device. It is characterized by the structure that there is. A metal support layer can be used as a metal support layer at the bottom of the vertical GaN LED to facilitate chip separation. A P-type reflective electrode is partially formed in a mesh form on the P-GaN, and a reflective film is interposed therebetween. Therefore, it is possible to maximize the emission of light particles formed in the active layer toward the N-GaN layer, and to facilitate heat dissipation during device operation by using a metal substrate, a conductive layer substrate, or a conductive ceramic substrate instead of a sapphire substrate. It is suitable as a high-power device, and since the light particles generated in the InGaN layer are emitted through the N-GaN layer, the path of light particles is shortened, thereby reducing the number of photons absorbed during emission. As the doping can be increased in the -GaN layer (> 10 ¹⁹ / cm ³ ), the electrical conductivity is large, so that the current diffusion resistance is improved, thereby improving the optical output characteristics. The present invention provides a light emitting device capable of providing a light emitting device, and a technology for separating a GaN thin film layer of an LED structure using a laser from a sapphire substrate and a manufacturing process of making a vertical GaN LED on the separated thin film layer.

The P-type semiconductor layer, the N-type semiconductor layer, the N-type electrode formed on the N-type semiconductor layer, the insulating layer formed on at least the side of the N-type semiconductor layer and the P-type semiconductor layer according to the present invention Provided is a light emitting device comprising a metal protective film layer for protecting a layer.

Here, the metal protective film layer is formed on the side of the P-type semiconductor layer and the N-type semiconductor layer, and the lower portion of the P-type semiconductor layer.

And an insulating layer formed under a portion of the lower portion of the P-type semiconductor layer, further comprising a reflective ring layer formed on the N-type semiconductor layer, and further comprising a metal support layer formed under the metal protective layer. The semiconductor device further includes a reflective film layer formed under the P-type semiconductor layer, and further includes a P-type electrode formed under the P-type semiconductor layer. The P-type electrode includes a contact metal layer, a reflective metal layer, a diffusion barrier layer, and a bonding metal layer. Here, the contact metal layer uses at least one of Ni, Ir, Pt, Pd, Au, Ti, Ru, W, Ta, V, Co, Os, Re, and Rh, and the reflective metal layer uses Al, Ag. In addition, the diffusion barrier layer is Ru, Ir, Re, Rh, Os, V, Ta, W, ITO (Indium Tin Oxide), IZO (Indium Zinc oxide), RuO ₂ , VO ₂ , MgO, IrO ₂ , ReO ₂ At least one of RhO ₂ , OsO ₂ , Ta ₂ O ₃ and WO ₂ is used. The bonding metal layer is formed of a first bonding metal layer and a second bonding metal layer, wherein the first bonding metal layer is at least one of Ni, Cr, Ti, Pd, Ru, Ir, Rh, Re, Os, V, and Ta. And the second bonding metal layer uses at least one of Au, Pd, and Pt.

In addition, further comprising an active layer formed between the P-type semiconductor layer and the N-type semiconductor layer, the insulating layer extends to the side of the active layer.

In this case, the insulating layer is formed of at least one layer, SiO ₂ , Si ₃ N ₄ , MgO, Al ₂ O ₃ , TiO ₂ , VO ₂ , ZrO ₂ , Ce ₂ O ₃ , HfO ₂ , NbO ₂ , Ta _{At least one of 2} O ₅ , Y ₂ O ₃ , V ₂ O ₃ , WO ₃ , GaN, AlGaN, AlN, SiC and diamond is used. In addition, the metal passivation layer and the metal support layer may be formed of at least one layer, and doped with SrTiO ₃ and Al doped with Au, Ni, W, Mo, Cu, Al, Ta, Ag, Pt, Cr, and Nb. At least one of a conductive ceramic film such as ZnO, ITO, and indium zinc oxide (IZO), and an impurity doped semiconductor film such as B-doped Si, As-doped Si, and impurity-doped diamond.

In addition, the step of sequentially forming an N-type semiconductor layer and a P-type semiconductor layer on the substrate according to the present invention, forming an insulating film on the side of the N-type semiconductor layer excluding a portion of the P-type semiconductor layer, and Forming a P-type electrode on the P-type semiconductor layer on which the insulating film is not formed, forming a metal protective film layer to surround the P-type semiconductor layer and the N-type semiconductor layer, and removing the substrate And it provides a method of manufacturing a vertical semiconductor light emitting device comprising forming an N-type electrode on the N-type semiconductor layer.

In this case, after the forming of the P-type electrode, the method may further include forming a reflective film on the P-type semiconductor layer on which the P-type electrode is formed. The forming of the P-type electrode may include forming a reflective film on the P-type semiconductor layer, removing the reflective film in a region where the P-type electrode is to be formed, and removing the reflective film in a region where the reflective film is removed. Forming a type electrode.

After the forming of the metal protective layer, the method may further include forming a metal support layer on the P-type semiconductor layer on which the metal protective layer is formed. After removing the substrate, the method may further include forming an anti-reflection film on the N-type semiconductor substrate and exposing a portion of the N-type semiconductor substrate by removing a portion of the anti-reflection film.

The step of forming an insulating film on the side of the N-type semiconductor layer excluding a portion of the P-type semiconductor layer, forming the insulating film to surround the P-type semiconductor layer and the N-type semiconductor layer and the P-type semiconductor layer Removing a portion of the insulating film over the phase.

Here, an active layer is formed between the N-type semiconductor layer and between the P-type semiconductor layer. The P-type electrode is formed in a mesh form. The metal protective layer is formed by a metal plating method or a vacuum deposition method such as sputtering, electron beam deposition, thermal deposition, or the like.

Hereinafter, with reference to the accompanying drawings will be described an embodiment of the present invention in more detail. However, the present invention is not limited to the embodiments disclosed below, but will be implemented in various forms, and only the embodiments are intended to complete the disclosure of the present invention, and to those skilled in the art to fully understand the scope of the invention. It is provided to inform you. Like numbers refer to like elements in the figures.

The vertical light emitting device using GaN has the following advantages as compared to the conventional light emitting device of the horizontal structure. First, light particles generated in the InGaN layer are emitted through the N-GaN layer. Therefore, since the path of light particles is shortened, the number of photons absorbed during emission can be reduced, and the doping amount of the N-GaN layer can be large, that is, the doping amount can be about 10 ¹⁹ / cm ³ or more, so that the current diffusion resistance As a result, the light output characteristic can be improved. Second, since a metal support plate is used instead of a sapphire substrate, it is suitable as a high output device because it can facilitate heat dissipation caused by application of current during device operation. Third, since the current density can be reduced because a thick electrode is used on the P-type GaN as the P-type electrode, the stability of the product can be expected to be improved.

The present invention provides a plurality of vertical GaN LEDs as shown in Figure 4 in order to solve the problem in the LED device of the conventional horizontal LED and flip chip structure. In the vertical GaN LED structure of the present invention, first, an insulating film 170 is coated on the side of the device, that is, the side of the device including the P-type semiconductor layer 130, the active layer 140, and the N-type semiconductor layer 150. The protective film layer 110 is coated under the P-type electrode 120 and on the side surface of the insulating film to protect the GaN epitaxially grown substrate having a thickness of only 4 to 5 microns. In other words, a thick metal protective film layer 110 of 10 microns or more is used for the lowermost portion and the side portions of the device, and the P-type electrode 120, the P-type semiconductor layer 130, the active layer 140, and the N-type semiconductor layer thereon. The 150 and N-type electrode 160 layers are sequentially formed (FIG. 4A). The second vertical GaN LED structure of the present invention is based on the first structure, characterized in that the anti-reflective coating 180 on the light emitting N-GaN layer to improve the light characteristics and durability (Fig. 4b) ). The third structure is based on the first structure and has an advantage of facilitating chip separation by applying a thick metal support layer 190 under the metal protective film layer 110 (FIG. 4C). At this time, since the lower metal support layer 190 plays a role as a kind of bridge pillar, the space between the pillars may be dynamically pressed between the two pillars, thereby facilitating chip separation. The fourth vertical GaN LED structure of the present invention is based on the first structure, and the P-type electrode 120 is partially formed on the P-GaN in the form of a mesh, and the active layer is formed by inserting the reflective film 200 therebetween. The light particles formed at 140 have the characteristic of maximizing the emission toward the N-type semiconductor layer 150 (FIG. 4D). The fifth vertical GaN LED structure of the present invention is based on the fourth structure of the present invention to improve light characteristics and improve durability by applying an anti-reflective coating 180 on the N-type semiconductor layer 150 to which light is emitted. It is characterized by (Fig. 4e). The sixth vertical GaN LED structure of the present invention has the advantage of facilitating chip separation by applying a thick metal support layer 190 under the metal protective layer 110 based on the fourth structure of the present invention (Fig. 4f).

4, the vertical GaN LED of FIG. 4 is formed on the P-type semiconductor layer 130, the active layer 140 and the N-type semiconductor layer 150 formed thereon, and the N-type semiconductor layer 150. The N-type electrode 160, the P-type semiconductor layer 130, the active layer 140, and the N-type semiconductor layer 150 for protecting the metal protection layer 110 are included. Here, the metal protective layer 110 is formed on the side surfaces of the P-type semiconductor layer 130, the active layer 140, and the N-type semiconductor layer 150, and under the P-type semiconductor layer 130. The semiconductor device may further include a P-type electrode 120 formed between the metal protective layer 110 and the P-type semiconductor layer 130. P-type electrode 120 is preferably formed in a mash form. In addition, an insulating film 170 is further formed between the side surfaces of the N-type semiconductor layer 150, the active layer 140, and the P-type semiconductor layer 130 and the metal protective film layer 110. In addition, the reflective film 200 may be further formed between the P-type semiconductor layer 130 and the metal passivation layer 110, and the metal support layer 190 may be further formed below the metal passivation layer 110.

In the vertical GaN LED of FIG. 4A of the present invention, the P-type electrode 120, the P-type semiconductor layer 130, the active layer 140, the N-type semiconductor layer 150, and the N-type electrode 160 are sequentially formed. The insulating film 170 is formed to protect side surfaces of the P-type semiconductor layer 130, the active layer 140, and the N-type semiconductor layer 150, and the periphery of the insulating film 170 and the P-type electrode 120. The metal protective film layer 110 is formed in the film. In this case, the insulating layer 170 may be formed only on the side surface of the N-type semiconductor layer 150, or may be formed only on the side surface of the P-type semiconductor layer 130. In the vertical GaN LED of FIG. 4B of the present invention, an anti-reflection film 180 is formed on the N-type semiconductor layer 150 of the vertical GaN LED of FIG. 4A and has an advantage of preventing reflection of light. In the vertical GaN LED of FIG. 4C, the metal support layer 190 is formed under the metal protective layer 110 of the vertical GaN LED of FIG. 4B. As shown in FIG. 4D, the vertical GaN LED includes a reflective film 200, a P-type electrode 120 having a mesh shape formed on the reflective film 200, and a P-type semiconductor layer 130 sequentially formed on the P-type electrode 120. And an insulating layer 170 formed on side surfaces of the active layer 140, the N-type semiconductor layer 150, and the N-type electrode 160, and the P-type semiconductor layer 130, the active layer 140, and the N-type semiconductor layer 150. The metal protective film layer 110 formed to surround the insulating film 170 and the reflective film 200 is formed. In this case, the insulating layer 170 may be partially formed on the lower surface of the P-type semiconductor layer 130 as shown in the figure. In the vertical GaN LED of FIG. 4E, an anti-reflection film 180 is formed on the N-type semiconductor layer 150 of the vertical LED of FIG. 4D. In the vertical LED of FIG. 4F, a metal support layer 190 is formed below the metal protective layer 110 of the vertical LED of FIG. 4D.

The P-type electrode 120 formed under the P-type semiconductor layer 130 is preferably an ohmic electrode layer having excellent thermal stability and high reflectivity of 90% or more. The ohmic electrode layer P-type electrode 120 includes a contact metal layer 121, a reflective metal layer 122, a diffusion barrier layer 123, and bonding metal layers 124 and 125. The total thickness of the P-type electrode 120 is 300 kPa to 23000 kPa, but preferably 2000 kPa to 5000 kPa.

Here, the contact metal layer 121 is formed to a thickness of 5 kPa to 500 kPa, preferably within 200 kPa. The thickness of the contact metal layer 121 is used within the above-described thickness range to control the amount of light absorption. In addition, the contact metal layer 121 may be formed of a multilayer thin film. The contact metal layer 121 uses at least one of Ni, Ir, Pt, Pd, Au, Ti, Ru, W, Ta, V, Co, Os, Re, and Rh, and preferably Ni, Ir, and Pt. Uses a laminated metal.

The reflective metal layer 122 is formed to have a thickness of 100 kPa to 9000 kPa, but preferably 1000 kPa to 2000 kPa. Al and / or Ag is used as the reflective metal layer 122, and preferably Ag is used.

The diffusion barrier layer 123 is formed to a thickness of 50 kPa to 1000 kPa, preferably from 100 kPa to 800 kPa. The diffusion barrier layer 123 may include Ru, Ir, Re, Rh, Os, V, Ta, W, ITO (Indium Tin Oxide), IZO (Indium Zinc oxide), RuO ₂ , VO ₂ , MgO, IrO ₂ , ReO ₂ At least one of RhO ₂ , OsO ₂ , Ta ₂ O ₃ and WO ₂ is used, and Ru is preferably used.

The bonding metal layers 124 and 125 may be formed of the first and second bonding metal layers 124 and 125, and the first bonding metal layer 124 may be formed to have a thickness of 100 kV to 3000 kV, but not more than 1000 kV. At least one of Ni, Cr, Ti, Pd, Ru, Ir, Rh, Re, Os, V, and Ta is used as the first bonding metal layer 124, and preferably Ni is used. The second bonding metal layer 125 is formed to have a thickness of 100 kPa to 9000 kPa, but preferably within 1000 kPa. The second bonding metal layer 125 uses at least one of Au, Pd, and Pt, and preferably Au.

The above-described P-type electrode is formed by sequentially stacking a contact metal layer, a reflective metal layer, and a diffusion barrier layer, followed by heat treatment, and subsequently stacking a first and a second bonding metal layer, or a contact metal layer, a reflective metal layer, a diffusion barrier layer, and a first bonding metal layer. And a second bonding metal layer, followed by heat treatment. As a result, Me (= Ir, Ni, Pt) / Ag / Ru / Ni / Au is sequentially stacked on the P-type semiconductor layer, thereby forming a P-type electrode capable of simultaneously obtaining a reflection film characteristic and a low contact resistance characteristic. .

Hereinafter, a method of manufacturing a vertical LED device having such a structure will be described.

A method of manufacturing an LED device according to a first embodiment of the present invention will be described with reference to FIG. 5.

5 is a detailed cross-sectional view of the manufacturing process of the vertical LED device of the present invention. 5A is a cross-sectional view of a GaN LED substrate that is commonly used. Thin films of the N-type semiconductor layer 150, the active layer 140, and the P-type semiconductor layer 130 are sequentially grown on the sapphire substrate 100. The total thickness of the thin film is approximately 4 microns and the thin film is deposited by metal-organic chemical vapor deposition (MOCVD).

As the substrate 100, at least one of Al ₂ O ₃ , SiC, ZnO, Si, GaAs, GaP, LiAl ₂ O ₃ , BN, AlN, and GaN is used. In this embodiment, a sapphire substrate is used. In the present exemplary embodiment, a buffer layer that functions as a buffer when the N-type semiconductor layer 140 is formed on the substrate 100 may be further formed. The N-type semiconductor layer 140 preferably uses a gallium nitride (GaN) film implanted with N-type impurities, and is not limited thereto. A material layer having various semiconductor properties may be used. In this embodiment, an N-type semiconductor layer 140 including an N _- type Al _x Ga _1-x N (0 ≦ _x ≦ 1) film is formed. In addition, the P-type semiconductor layer 130 also uses a gallium nitride film implanted with P-type impurities. In this embodiment, a P-type semiconductor layer 130 including a P _- type Al _x Ga _1-x N (0≤x≤1) film is formed. In addition, an InGaN film may be used as the semiconductor layer film. In addition, the N-type semiconductor layer 150 and the P-type semiconductor layer 130 may be formed of a multilayer film. In the above, Si is used as the N-type impurity, Zn is used when InGaAlP is used as the P-type impurity, and Mg is used in the case of nitride.

As the active layer 140, a multilayer film in which a quantum well layer and a barrier layer are repeatedly formed on an N-type Al _x Ga _1-x N (0 ≦ _x ≦ 1) film is used. As the barrier layer and the well layer, binary compounds GaN, InN, AlN, etc. may be used, and ternary compounds In _x Ga _{1 - x} N (0 ≦ _x ≦ ₁ ) and Al _x Ga _{1 - x} N (0 and the like ≤x≤1), can be used 4 won compound _{Al x In y Ga 1 -x- y} N (0≤x + y≤1). Of course, the N-type semiconductor layer 150 and the P-type semiconductor layer 130 may be formed by injecting predetermined impurities into the two- to four-membered compounds.

5B is a process of etching portions other than the element region. Etching is typically performed by masking with a photo-resist or SiO ₂ and then etching by dry etching while flowing Cl ₂ gas. After etching by dry etching, after removing the etching mask, the insulating film 170 is deposited on the entire surface to deposit the insulating film 170 on the side of the device.

FIG. 5C shows that the P-type reflective ohmic electrode, that is, the portion where the P-type electrode 120 is to be etched, is formed thereon. SiO ₂ protective film 170 is deposited to a thickness of 0.05 to 5.0 microns by PECVD (plasma-enhanced chemical vapor deposition) on the etched substrate for device isolation. After forming a fine pattern to form the P-type reflective film ohmic electrode 120, the photoresist film is etched by dry etching using BOE (buffered oxide etchant) or CF ₄ gas, and then the ohmic metal layer is deposited.

The surface treatment of the P-type semiconductor layer 130 exposed before the deposition of the ohmic metal layer was performed by dipping the P-type semiconductor layer 130 in an aqueous solution of aqua regia (HCl: H ₂ O = 3: 1) for 10 minutes, followed by washing with deionized water and nitrogen. It is carried out by the process of drying.

After deposition of hydrochloric acid in a solution of 1: 1 mixed with deionized water prior to metal deposition, the surface was treated, charged into an e-beam evaporator, and charged with a metal electrode / Ag / Ru / Ni / Au ( Me = Ir, Ni, Pt) layers 121, 122, 123, 124, and 125 are sequentially deposited to form ohmic electrodes. The ohmic electrode is heat-treated at 100 to 700 ° C. for 10 seconds or more in an oxygen atmosphere or an atmosphere containing 5% or more of oxygen using a rapid thermal annealing device. That is, the heat treatment is preferably performed for about 10 to 100 seconds at a temperature of 100 to 700 ℃ in an atmosphere containing 5 to 100% oxygen. Then, the electrical resistance is measured to calculate the contact resistance of the ohmic electrode.

Preferably, the contact metal layer (Me = Ir, Ni, Pt) 121, the Ag layer 122, and the Ru layer 123 are sequentially deposited on the P-type semiconductor layer 130. Thereafter, heat treatment is performed in an oxygen atmosphere. At this time, since the Ru layer, which is the diffusion barrier layer 123, is formed on the Ag layer 122, which is the reflective metal layer, it is possible to prevent the Ag layer 122 from diffusing or oxidizing during heat treatment. Next, the Ni layer 124 and the Au layer 125 are deposited on the Ru layer 123 to form an ohmic electrode.

In addition, the contact metal layers (Me = Ir, Ni, Pt) 121, the Ag layer 122, the Ru layer 123, the Ni layer 124 and the Au layer 125 are sequentially formed, and then oxygen The heat treatment may be performed in an atmosphere to form a densified ohmic electrode. After the ohmic electrode is formed, the pattern may be a target for the ohmic electrode on the P-type semiconductor layer 130 through a predetermined patterning process. Of course, the above-described ohmic electrode may be formed on the N-type nitride layer.

The insulating layer 170 may be formed only on side surfaces of the N-type semiconductor layer 150 and the active layer 140. In the above description, although the insulating film 170 is formed on the entire structure, a part of the insulating film 170 formed on the P-type semiconductor layer 130 is etched, but is not limited thereto. That is, a predetermined mask is formed on the P-type semiconductor layer 130 to protect a portion thereof, an insulating film 170 is formed on the entire structure, and then the side surfaces of the N-type semiconductor layer 150 and the active layer 140 are formed. The insulating film 170 may be removed except the insulating film 170 formed on the insulating film 170.

5D shows a process of forming a metal protective layer 110 having a thickness of several microns to several tens of microns and irradiating a laser. The metal passivation layer 110 is formed using an electro-plating of metals method or a vacuum deposition method such as a sputter, an e-beam evaporator, a thermal evaporator, or the like. When the laser is irradiated through sapphire, the laser is absorbed into the GaN layer and the GaN substrate is decomposed into Ga metal and N ₂ gas. In this case, the metal passivation layer 110 serves to prevent the thin GaN thin film layer of about 4 microns from being broken when the sapphire substrate 100 is separated by laser irradiation. At this time, a part of the insulating film may be separated together.

5E shows that after the substrate 100 is separated and removed, the GaN thin film layer is protected by being surrounded by the metal protective layer 110.

Next, as shown in FIG. 5F, the anti-reflective coating of the anti-reflective layer 180 is coated on the N-type semiconductor layer 150 to allow the photon generated in the active layer (i-InGaN) 140 to easily exit the substrate. coating). As the anti-reflection film 180, SiO ₂ , Si ₃ N ₄ , indium tin oxide (ITO), indium zinc oxide (IZO), and the like are used, and the films are deposited by PECVD or sputter or electron beam deposition.

5G is a cross-sectional view after etching a portion of the antireflective layer 180 and forming an ohmic N-type electrode 160. As the N-type electrode 160, Ti / Al, Cr / Au. Alternatively, a Cr / Au or Ni / Au layer may be deposited on this layer by an e-beam evaporator.

5H is a cross-sectional view after the chip is separated, wherein the chip is separated by a dishing or laser cutting method.

Hereinafter, a method of manufacturing an LED device according to a second embodiment of the present invention will be described. Here, description overlapping with the first embodiment may be omitted.

The process shown in FIGS. 6A-6C is similar to FIGS. 5A-5C described above. That is, predetermined GaN layers, that is, layers of PN junction structure, are formed on the substrate 100. Thereafter, the devices are separated from each other, and an insulating film 170 for protecting the separated devices is formed along the step. A portion of the insulating layer 170 is patterned to expose a portion of the P-type semiconductor layer 130, and then a P-type electrode 120 is formed on the exposed P-type semiconductor layer 130.

Next, as shown in FIG. 6D, the metal passivation layer 110 is formed on the entire structure along the step, and the metal support layer 190 is formed on the metal passivation layer 110 on the P-type semiconductor layer 130. . That is, it is preferable to form the metal support layer 190 having a thickness of 10 to 50 microns on the metal protective film layer 110. 6E to 6H, after removing the lower substrate 100, an anti-reflection film 180 is formed on the N-type semiconductor layer 150, and a portion of the anti-reflection film 180 is patterned to form N. FIG. The type semiconductor layer 150 exposes a portion. The N-type electrode 160 is formed on the exposed N-type semiconductor layer 150. The chip is separated to complete the vertical LED structure.

Hereinafter, a method of manufacturing an LED device according to a third embodiment of the present invention will be described. Here, description overlapping with the first and second embodiments may be omitted.

7 is a manufacturing process chart for explaining the manufacturing method of the vertical LED of FIGS. 4D and 4E of the present invention.

As shown in FIGS. 7A and 7B, a plurality of semiconductor layers having a PN junction structure are formed on the substrate 100. SiO ₂ series insulating film 170 is deposited by plasma-enhanced chemical vapor deposition (PECVD) to a thickness of 0.05 to 5.0 microns. Subsequently, after forming a fine pattern in the form of a mesh using the photoresist layer, SiO ₂ is etched by dry etching using BOE (buffered oxide etchant) or CF ₄ gas as a mask to form the P-type semiconductor layer 130. Expose in hourly form.

As shown in FIG. 7C, the P-type reflective ohmic electrode layer 120 is deposited on the exposed P-type semiconductor layer 130 by etching. The reflective film 200 is formed on the P-type semiconductor layer 130 on which the P-type electrode 120 is formed. The P-type ohmic electrode 120 is formed by depositing an ohmic metal and then heat treatment. Generally, Ni and Au are deposited using an e-beam evaporator at tens to hundreds of nanometers in thickness, but in the case of the vertical type LED of this embodiment, reflectivity is important, so Ni / Ag, Pt / Ag. Metals such as Ru / Ag and Ir / Ag are used. The electrode is then heat-treated using rapid thermal annealing at a temperature between 300 and 600 ° C. for several seconds to several minutes. Thereafter, Ag or Al-based reflective film is deposited on the mesh-shaped P-type electrode. 7D to 7H are omitted because they are the same as those described with reference to FIGS. 5 and 6.

Hereinafter, a method of manufacturing an LED device according to a fourth embodiment of the present invention will be described. Here, description overlapping with the first to third embodiments may be omitted.

8 is a cross-sectional view illustrating a method of manufacturing the vertical LED of FIG. 4F of the present invention.

8a to 8c proceed with the process described above with reference to FIGS. 7a to 7c. Referring to FIG. 8D, the metal passivation layer 110 is formed according to the step of the overall structure, and then the metal support layer 190 is formed on the metal passivation layer 110. As shown in the drawing, the metal support layer 190 is not formed in the region where the trench is formed, thereby facilitating a process for separating the subsequent individual devices. 8E to 8H are the same as the processes described with reference to FIGS. 5 to 7 and the description thereof will be omitted.

In the above-described embodiments, the metal protective layer 110 is formed to surround the side and bottom surfaces of the device. In addition, the metal support layer 190 may be formed under the metal protective layer 110 to minimize the phenomenon that the device is bent or damaged by impact when the chip is separated.

In addition, as the insulating film 170 used in the above-described embodiments, SiO ₂ , Si ₃ N ₄ , MgO, Al ₂ O ₃ , TiO ₂ , VO ₂ , ZrO ₂ , Ce ₂ O ₃ , HfO ₂ , NbO ₂ , An oxide thin film of at least one of Ta ₂ O ₅ , Y ₂ O ₃ , V ₂ O _3, and WO ₃ is used. At this time, a thickness of 100 nm to 100 μm is used as the oxide film. In addition, one or two or more kinds of wide bandgap semiconductors such as GaN, AlGaN, AlN, SiC, diamond, etc. are alternately stacked in a thin film to be used as an insulating film and formed to have a thickness of 100 nm to 100 μm.

In addition, at least one metal of Au, Ni, W, Mo, Cu, Al, Ta, Ag, Pt, and Cr is used as the metal protective layer 110 and the metal support layer 190. The metal support layer 190 is formed to a thickness of 0.5 to 200 mm. In addition, a conductive ceramic film such as SrTiO ₃ doped with Nb, ZnO doped with Al, ITO, Indium Zinc Oxide (IZO), or doped with Si or As is doped into the metal passivation layer 110 and the metal support layer 190. Impurity doped semiconductors, such as Si and impurity doped diamond, can be used by vacuum deposition.

In addition, the P-type electrode 120, at least one of Ni, Pt, Ru, Ir, Rh, Ta, Mo, Ti, Ag, W, Cu, Cr, Pd, V, Co, Nb, Zr and Al To form a thickness of 5 to 2000 nm. If the P-type electrode 120 is formed in two layers, the first layer is Ni, Pt, Ru, Ir, Rh, Ta, Mo, Ti, Ag, W, Cu, Cr, Pd, V, Co, Nb and At least one of Zr is used, and Ag and / or Al are used as the second layer. At this time, the first layer is formed to a thickness of 5 to 1000nm, the second layer is formed to a thickness of 10 to 1000nm. The P-type electrode 120 may be formed in a multilayer of two or more layers. In order to form the P-type electrode 120 described above, heat treatment is performed for 30 seconds to 30 minutes at a temperature range of 300 to 600 ° C. in a nitrogen atmosphere, an oxygen atmosphere, or an air atmosphere. In addition, the reflective film 200 is formed between the P-type semiconductor layers 130 before the P-type electrode 120 is formed, and then the portion of the P-type electrode 120 is etched to form the P-type electrode 120. .

In addition, Ag and / or Al is used as the reflective film 200. In addition, alloys containing less than 10% of Ag and other metals or alloys containing less than 10% of Al and other metals are used.

In addition, at least one of ITO, ZnO, SiO ₂ , Si ₃ N _4, and IZO is used as the anti-reflection film 180, and is formed to have a thickness of 10 to 5000 nm.

FIG. 9 is an embodiment in which electrical and optical characteristics of a vertical LED device manufactured by the process described with reference to FIG. 5 are compared with a horizontal LED device manufactured by a conventional method. 9A is a result of comparing current-voltage characteristics of a horizontal LED and a vertical LED device. When the injection current is 20 mA, the forward voltage of the vertical LED is 3.2V, which is about 0.1V lower than the 3.3V of the horizontal LED. This shows that vertical LEDs consume less power. 9B is a result of comparing light output characteristics of a horizontal LED and a vertical LED device. It shows that the light output characteristic is improved by more than 2.5 times. This shows that the vertical LED emits 2.5 times brighter light than the same power consumption.

FIG. 10 is a view illustrating electrical and optical characteristics of a vertical LED device fabricated by the process described with reference to FIG. 5 and a vertical LED device fabricated using the mesh P-type electrode manufactured by the process described with reference to FIG. The comparative example. As the reflective film, an Ag film obtained by thermally depositing Ag having a purity of 99% or more to a thickness of 500 nm was used. FIG. 10A is a result of comparing current-voltage characteristics of a device between a vertical LED device manufactured by the process of FIG. 7 and a vertical LED device manufactured by the process of FIG. 5. When the injection current was 20 mA, the forward voltage of both devices was analyzed as 3.2 V. FIG. 10B is a result of comparing light output characteristics of a vertical LED device manufactured by the process of FIG. 7 and a vertical LED device manufactured by the process of FIG. 5. It was confirmed that the light output characteristic is improved by more than 23%. This is because the reflectivity of the Ag film is 98% or more. That is, it was confirmed that the light characteristics of the vertical LED device may be improved by 23% or more through the process of FIG. 7.

As described above, the present invention can form a thick metal protective film layer of 10 microns or more on the side and the bottom of the vertical GaN LED to protect the device from external impact and facilitate chip separation.

In addition, since a metal substrate can be used instead of the sapphire substrate, heat dissipation generated during device operation can be facilitated, and thus a device can be manufactured by bonding to a high output device and improving light output characteristics.

In addition, the metal support layer may be formed to prevent the device from being bent or damaged by impact when the chip is separated.

In addition, the P-type electrode may be partially formed on the P-GaN in a mesh form to maximize the emission of light particles formed in the active layer toward the N-GaN layer.

Claims (25)

P-type semiconductor layer; An N-type semiconductor layer formed on the P-type semiconductor layer; An N-type electrode formed on the N-type semiconductor layer; An insulating film formed on at least a side of the N-type semiconductor layer; And A light emitting device comprising a metal protective film layer for protecting the P-type semiconductor layer and the N-type semiconductor layer. The method according to claim 1, The metal passivation layer is a light emitting device formed on the side of the P-type semiconductor layer and the N-type semiconductor layer, the lower portion of the P-type semiconductor layer. The method according to claim 1, The light emitting device further comprises an insulating layer formed on a portion of the lower portion of the P-type semiconductor layer. The method according to claim 1, The light emitting device further comprises an anti-reflection film layer formed on the N-type semiconductor layer. The method according to claim 1, The light emitting device further comprises a metal support layer formed under the metal protective layer. The method according to claim 1, The light emitting device further comprises a reflective film layer formed under the P-type semiconductor layer. The method according to claim 1, The light emitting device further comprises a P-type electrode formed under the P-type semiconductor layer. The method according to claim 7, The P-type electrode includes a contact metal layer, a reflective metal layer, a diffusion barrier layer, and a bonding metal layer. The method according to claim 8, The contact metal layer is a light emitting device using at least one of Ni, Ir, Pt, Pd, Au, Ti, Ru, W, Ta, V, Co, Os, Re and Rh. The method according to claim 8, The reflective metal layer is a light emitting device using Al, Ag. The method according to claim 8, The diffusion barrier layer is Ru, Ir, Re, Rh, Os, V, Ta, W, Indium Tin Oxide (ITO), Indium Zinc oxide (IZO), RuO ₂ , VO ₂ , MgO, IrO ₂ , ReO ₂ , RhO ₂ , OsO ₂ , Ta ₂ O ₃ and WO ₂ using at least one of. The method according to claim 8, The bonding metal layer is formed of a first bonding metal layer and a second bonding metal layer, and the first bonding metal layer uses at least one of Ni, Cr, Ti, Pd, Ru, Ir, Rh, Re, Os, V, and Ta. And the second bonding metal layer uses at least one of Au, Pd, and Pt. The method according to any one of claims 1 to 12, The light emitting device further comprises an active layer formed between the P-type semiconductor layer and the N-type semiconductor layer. The method according to claim 13, A light emitting device in which the insulating layer extends to the side of the active layer. The method according to any one of claims 1 to 12, The insulating layer is formed of at least one layer, SiO ₂ , Si ₃ N ₄ , MgO, Al ₂ O ₃ , TiO ₂ , VO ₂ , ZrO ₂ , Ce ₂ O ₃ , HfO ₂ , NbO ₂ , Ta ₂ O ₅ , Y ₂ O ₃ , V ₂ O ₃ , WO ₃ , GaN, AlGaN, AlN, SiC, and a light emitting device using at least one of diamond. The method according to any one of claims 1 to 12, The metal passivation layer and the metal support layer may be formed of at least one layer, and SrTiO ₃ and Al doped with Au, Ni, W, Mo, Cu, Al, Ta, Ag, Pt, Cr, and Nb. And a conductive ceramic film such as ITO, indium zinc oxide (IZO), and at least one of an impurity doped semiconductor film such as B doped Si, As doped Si, and impurity doped diamond. Sequentially forming an N-type semiconductor layer and a P-type semiconductor layer on the substrate; Forming an insulating film on a side of the N-type semiconductor layer except for a portion of the P-type semiconductor layer; Forming a P-type electrode on the P-type semiconductor layer on which the insulating film is not formed; Forming a metal passivation layer to surround the P-type semiconductor layer and the N-type semiconductor layer; Removing the substrate; And A method of manufacturing a vertical semiconductor light emitting device comprising forming an N-type electrode on the N-type semiconductor layer. The method of claim 17, wherein after forming the P-type electrode, And forming a reflective film on the P-type semiconductor layer on which the P-type electrode is formed. The method of claim 18, after the forming of a reflective film on the P-type semiconductor layer, Removing the reflective film in a region where the P-type electrode is to be formed; And And forming the P-type electrode in a region where the reflective film is removed. The method of claim 17, wherein after forming the metal protective layer, And forming a metal support layer on the P-type semiconductor layer on which the metal protective film layer is formed. The method of claim 17, wherein after removing the substrate: Forming an anti-reflection film on the N-type semiconductor substrate; And And removing a portion of the anti-reflection film to expose a portion of the N-type semiconductor substrate. The method of claim 17, wherein forming an insulating film on a side of the N-type semiconductor layer except for a portion of the P-type semiconductor layer, Forming the insulating film to surround the P-type semiconductor layer and the N-type semiconductor layer; And Removing a portion of the insulating film on the P-type semiconductor layer. The method according to any one of claims 17 to 22, The manufacturing method of the light emitting element which forms an active layer between the said N type semiconductor layer and between said P type semiconductor layers. The method according to any one of claims 17 to 22, The P-type electrode is a method of manufacturing a light emitting device formed in the form of a mesh. The method according to any one of claims 17 to 22, The metal protective film layer is formed by a metal plating method or a vacuum deposition method such as sputtering, electron beam deposition, thermal vapor deposition, etc.

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