KR20060052455A - Parts for substrate processing appartus and manufacturing method thereof - Google Patents

Abstract

The silicon carbide body formed by the sintering method or the CVD method is formed into a focus ring by cutting, and the formed focus ring is exposed to a plasma generated from at least one of carbon tetrafluoride gas and oxygen gas, Impurities generated from plasma are introduced into the void-like defects present near the surface. Thereafter, a positron is injected into the vicinity of the surface of the focus ring into which impurities are introduced, and the defect abundance ratio in the vicinity of the surface of the focus ring is examined by a positron extinction method.

Description

PARTS FOR SUBSTRATE PROCESSING APPARTUS AND MANUFACTURING METHOD THEREOF

1 is a cross-sectional view showing a schematic configuration of a substrate processing apparatus in which a focus ring as a component for substrate processing apparatus according to a first embodiment of the present invention is used.

2A to 2C are diagrams showing a mechanism in which particles are generated in the initial etching process.

3 is a flowchart of a component manufacturing process as a method for manufacturing a component for substrate processing apparatus according to the present embodiment.

4A to 4C are diagrams showing a process of introducing impurities in step S32 in FIG.

FIG. 5 is a graph showing the result of impurity introduction in step S2 in FIG. 3.

6 is a graph showing a relationship between a method of producing silicon carbide and a defect abundance ratio.

7 is a flowchart of a component manufacturing process as a method for manufacturing a component for substrate processing apparatus according to a second embodiment of the present invention.

FIG. 8 is a graph showing the result of the heat treatment of step S72 in FIG. 7.

Explanation of symbols for the main parts of the drawings

W… Semiconductor wafer

One… Etching processing equipment

2… chamber

3... Bottom electrode

4… Insulation material

5... Support

6... Shower head

7... Upper thread

8… Lower thread

9... Dipole Ring Magnet

10... Gate valve

11... High frequency power

12... Matcher

13... An electrostatic chuck

14... Electrode plate

15... DC power

16... Focus ring

17... Baffle plate

18... Exhaust system

19... Ball screw

20... Bellows

21... Bellows cover

22... Pusher pin

23... Refrigerant chamber

24... pipe

25... Heat Conduction Gas Supply Line

26... Thermal conductive gas supply unit

27... Buffer room

28... Treatment gas introduction pipe

29... MFC

(Reference 1: Japanese Patent Application Laid-Open No. 10-135093)

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a substrate processing apparatus component and a method for manufacturing the same, and more particularly, to a substrate processing apparatus component and a method for manufacturing the same, which are used under a consuming environment.

Usually, the substrate processing apparatus which etches a semiconductor wafer (henceforth "wafer") as a board | substrate is equipped with the accommodating chamber (henceforth "chamber") which accommodates a wafer. In this substrate processing apparatus, a high frequency electric power is applied in a chamber to generate a plasma from a processing gas such as a CF ₄ -based gas, and the surface of the wafer is etched by the generated plasma.

In the chamber, various components for maintaining the plasma state in a predetermined state are arranged, and a focus ring is known as one of such components. The focus ring is an annular component and is disposed in the chamber so as to surround the peripheral edge of the disc shaped wafer. The focus ring needs to have electrical characteristics, such as conductivity, such as a wafer, to efficiently guide the plasma in the chamber to the wafer. Thus, the conventional focus ring is formed of silicon (Si).

However, since silicon is eroded by the plasma, the focus ring in the chamber is consumed and deformed in a short time. When the focus ring is deformed, the state of the plasma on the wafer changes, so when using the focus ring made of silicon, it is necessary to replace the focus ring in a short time.

Therefore, in recent years, a focus ring formed of silicon carbide (SiC), which is known as a material hardly eroded by plasma, has been used. Since silicon carbide has almost the same conductivity as a wafer and does not generate metal contamination in a plasma atmosphere, it is preferable as a component in a chamber.

As silicon carbide, sintered silicon carbide formed by the sintering method and CVD silicon carbide formed by the CVD method are known, and the consumption of each plasma is about 15% less electrons to the consumption of the plasma of silicon. The latter is about 50% less.

However, since it is known that sintered silicon carbide is easy to generate | occur | produce a particle, it is proposed to coat the surface of the focus ring formed by sintered silicon carbide with CVD silicon carbide which is hard to generate | occur | produce a particle (for example, reference 1). Reference). Thereby, it is possible to suppress the generation of particles from the focus ring.

However, CVD silicon carbide is obtained by introducing a material gas around a graphite substrate arranged in a high temperature atmosphere to form a thick film of silicon carbide on the surface of the graphite substrate and cutting off the formed thick film. In addition, since the surface of the cut CVD silicon carbide is rough, the focus ring is subjected to lapping for the purpose of improving the appearance and preventing particles from scattering by surface activation. Therefore, the focus ring of CVD silicon carbide has a problem that manufacturing is difficult.

In addition, CVD silicon carbide is difficult to generate particles, but still generates some particles, and in particular, many particles during the initial etching process after the focus ring exchange, specifically, the application time of the high frequency power reaches 120 hours. Occurs. Therefore, when the focus ring of CVD silicon carbide is used, it is necessary to perform seasoning processing for stabilizing the atmosphere in the chamber after replacing the focus ring, and there is also a problem that the operation rate of the substrate processing apparatus is lowered.

An object of the present invention is to provide a substrate processing apparatus component and a method of manufacturing the same, which can suppress the occurrence of particles, prevent the decrease in the operation rate of the substrate processing apparatus, and can be easily manufactured.

In order to achieve the said objective, the manufacturing method of the component for substrate processing apparatus of Claim 1 is a manufacturing method of the component for substrate processing apparatus arrange | positioned in the accommodation chamber of the substrate processing apparatus which accommodates a board | substrate, The said component for substrate processing apparatuses And a defect abundance ratio lowering step of lowering the abundance ratio of void-like defects present in the vicinity of the surface.

The manufacturing method of the components for substrate processing apparatus of Claim 2 is a manufacturing method of the components for substrate processing apparatus of Claim 1 WHEREIN: The said defect abundance ratio reduction step introduces an impurity into the said defect, It is characterized by the above-mentioned.

The manufacturing method of the components for substrate processing apparatus of Claim 3 is a manufacturing method of the components for substrate processing apparatus of Claim 2 WHEREIN: The said impurity produces | generates from at least one of fluorine containing gas, carbon containing gas, and oxygen containing gas. It is characterized in that it is generated from the plasma.

In the manufacturing method of the components for substrate processing apparatus of Claim 4, the manufacturing method of the components for substrate processing apparatus of Claim 1 WHEREIN: The said defect abundance ratio reduction process heat-processs the components for substrate processing apparatuses, It is characterized by the above-mentioned.

In the manufacturing method of the components for substrate processing apparatus of Claim 5, The manufacturing method of the components for substrate processing apparatus of Claim 4 WHEREIN: The said defect abundance ratio reduction step is a temperature of the said components for substrate processing apparatuses in atmosphere of inert gas. It is characterized by setting to 1200 to 1600 ° C.

The manufacturing method of the components for substrate processing apparatuses of Claim 6 WHEREIN: The manufacturing method of the components for substrate processing apparatuses of any one of Claims 1-5 WHEREIN: Positron disappearance of the surface vicinity of the components for substrate processing apparatuses It is characterized by having an inspection step for inspection by law.

In order to achieve the above object, the component for substrate processing apparatus according to claim 7 is a component for substrate processing apparatus disposed in a storage chamber of the substrate processing apparatus for accommodating a substrate, and the abundance ratio of the defect of the hollow shape existing in the vicinity of the surface It is characterized by being lower than the abundance ratio of the defect of the cavity shape which exists in the vicinity of the surface of the silicon carbide body formed by CVD method.

EMBODIMENT OF THE INVENTION Hereinafter, embodiment of this invention is described, referring drawings.

First, the component for a substrate processing apparatus and the manufacturing method thereof according to the first embodiment of the present invention will be described.

1 is a cross-sectional view showing a schematic configuration of a substrate processing apparatus in which a focus ring as a component for substrate processing apparatus according to a first embodiment of the present invention is used.

In FIG. 1, an etching processing apparatus 1 configured as a substrate processing apparatus includes, for example, a cylindrical chamber 2 made of aluminum and a semiconductor having a diameter of 200 mm, for example, disposed in the chamber 2. The support body 5 which supports the lower electrode 3 on which the wafer W is mounted via the insulating material 4 is free, and the upper electrode which is disposed above the inside of the chamber 2 facing the lower electrode 3. The shower head 6 is provided.

The chamber 2 is formed as the upper thread 7 of a small diameter in the upper part, and is formed as the lower thread 8 of a large diameter in the lower part. The dipole ring magnet 9 is arranged around the upper thread 7, and the dipole ring magnet 9 forms a uniform horizontal magnetic field directed in one direction in the upper thread 7. The gate valve 10 which opens and closes the opening / exit of the semiconductor wafer W is provided in the upper side of the lower chamber 8, and the etching processing apparatus 1 is adjacent the load lock chamber (not shown) through the said gate valve 10. Is connected to the back of the lamp.

The high frequency power supply 11 is connected to the lower electrode 3 via the matcher 12, and the high frequency power supply 11 applies predetermined high frequency power to the lower electrode 3. As shown in FIG. Accordingly, the lower electrode 3 functions as a lower electrode.

On the upper surface of the lower electrode 3, an electrostatic chuck (ESC) 13 for adsorbing the semiconductor wafer W with an electrostatic attraction force is disposed. Inside the electrostatic chuck 13, a disk-shaped electrode plate 14 made of a conductive film is disposed, and a DC power supply 15 is electrically connected to the electrode plate 14. The semiconductor wafer W is sucked and held on the upper surface of the electrostatic chuck 13 by a Coulomb force generated by a DC voltage applied from the DC power supply 15 to the electrode plate 14.

A round ring focus ring 16 is arranged around the electrostatic chuck 13. Thus, the focus ring 16 surrounds the periphery of the semiconductor wafer W adsorbed by the electrostatic chuck 13. In addition, since the focus ring 16 is made of silicon carbide, it has almost the same conductivity as that of the semiconductor wafer W. FIG. As a result, the focus ring 16 can guide the plasma described later generated in the chamber 2 to the semiconductor wafer W efficiently. Here, the focus ring 16 is manufactured by the manufacturing method of the component for substrate processing apparatus which concerns on this embodiment mentioned later, and is called the existence ratio of vacant defect which exists in the vicinity of a surface (henceforth "defect abundance ratio"). ) Is set lower than the defect abundance ratio present in the vicinity of the surface of the silicon carbide body formed by the CVD method.

An exhaust path for discharging the gas on the upper side of the lower electrode 3 out of the chamber 2 is formed between the side wall of the upper thread 7 and the lower electrode 3, and an annular baffle plate ( 17) is arranged. The space downstream of the baffle plate 17 of the exhaust passage (inner space of the lower chamber 8) not only controls the pressure in the chamber 2 but also depressurizes the inside of the chamber 2 until it becomes almost vacuum. It communicates with the exhaust system 18.

Below the lower electrode 3, a lower electrode elevating mechanism comprising a ball screw 19 extending from the lower portion of the support 5 toward the lower side is disposed. The lower electrode elevating mechanism supports the lower electrode 3 through the support 5 and rotates the ball screw 19 by a motor or the like not shown, thereby controlling the gap between the upper electrode and the lower electrode. The electrode 3 is raised and lowered. The lower electrode elevating mechanism is isolated from the atmosphere in the chamber 2 by the bellows 20 arranged around the bellows 20 and the bellows cover 21 arranged around the bellows 20.

In addition, a plurality of pusher pins 22 protruding from the upper surface of the electrostatic chuck 13 are arranged on the lower electrode 3. These pusher pins 22 move up and down in the figure.

In the etching processing apparatus 1, when the semiconductor wafer W is unloaded, the lower electrode 3 is lowered to the unloading position of the semiconductor wafer W, and the pusher pin 22 is disposed at the electrostatic chuck 13. It protrudes from the upper surface, and lifts the semiconductor wafer W upwards apart from the lower electrode 3. In addition, during the etching process of the semiconductor wafer W, the lower electrode 3 rises to the processing position of the semiconductor wafer W, and the pusher pin 22 is stored in the lower electrode 3, whereby the electrostatic chuck ( 13) The semiconductor wafer W is sucked and held.

In the inside of the lower electrode 3, for example, an annular coolant chamber 23 extending in the circumferential direction is provided. The refrigerant chamber 23 is circulated and supplied with a refrigerant having a predetermined temperature, for example, cooling water, from the chiller unit (not shown) through the pipe 24, and is mounted on the lower electrode 3 by the temperature of the refrigerant. The processing temperature of the semiconductor wafer W is controlled.

On the upper surface of the electrostatic chuck 13, a plurality of heat conduction gas supply holes and heat conduction gas supply grooves (not shown) are disposed. These heat conduction gas supply holes and the like are connected to the heat conduction gas supply unit 26 via a heat conduction gas supply line 25 disposed inside the lower electrode 3, and the heat conduction gas supply unit 26 is a heat conduction gas, for example. For example, He gas is supplied to the gap between the electrostatic chuck 13 and the semiconductor wafer W. This heat conduction gas supply part 26 is comprised so that a vacuum exhaust may be possible for the space | interval of the electrostatic chuck 13 and the semiconductor wafer W. As shown in FIG.

The shower head 6 disposed on the ceiling of the chamber 2 is grounded (earth), and the shower head 6 functions as a ground electrode. In addition, a buffer chamber 27 is provided on an upper surface of the shower head 6, and a processing gas introduction pipe 28 from a processing gas supply unit (not shown) is connected to the buffer chamber 27. A MFC (Mass Flow Controller) 29 is disposed in the middle of the process gas introduction pipe 28. The MFC 29 supplies a predetermined gas, for example, a processing gas or an N ₂ gas, into the chamber ₂ through the buffer chamber 27 and the shower head 6, and increases the flow rate of the gas. Control is performed to control the pressure in the chamber 2 to a desired value in cooperation with the exhaust system 18 described above.

In the chamber 2 of this etching apparatus 1, as described above, high frequency power is applied to the lower electrode 3, and the lower electrode 3 and the shower head 6 are applied by the applied high frequency power. ), A high density plasma is generated from the processing gas, and ions and the like are generated.

In the etching processing apparatus 1, at the time of etching processing, the gate valve 10 is first opened, and the semiconductor wafer W to be processed is loaded into the chamber 2. Then, the treated gas from the shower head (6) the chamber (e. G., 4 fluorinated carbon having a predetermined flow rate ratio of the (CF ₄₎ gas and oxygen (O ₂₎ at least one mixed gas composed of a gas) at a predetermined flow rate and flow rate ratio Introduced in (2), the pressure in the chamber 2 is set to a predetermined value by the exhaust system 18 or the like. In addition, the high frequency power is applied from the high frequency power source 11 to the lower electrode 3, and the direct current voltage is applied from the direct current power source 15 to the electrode plate 14, so that the semiconductor wafer W is connected to the lower electrode 3. Adsorb onto the phase. And the process gas discharged from the shower head 6 is made into plasma as mentioned above. The plasma is condensed on the surface of the semiconductor wafer W by the focus ring 16, and the ions generated by the plasma, for example, fluorine ions or oxygen ions, physically etch the surface of the semiconductor wafer W. do.

As described above, when the focus ring 16 is formed of silicon carbide, silicon carbide (hereinafter referred to as "sintered silicon carbide") formed by the sintering method as silicon carbide and silicon carbide formed by the CVD method (hereinafter referred to as Any one of " CVD silicon carbide " is used, but in either case of using sintered silicon carbide or in case of using CVD silicon carbide, the focus ring 16 generates particles in the initial etching process. It is known conventionally.

Since it is difficult to explain clearly the mechanism in which particles are generated in the initial etching process, the present inventor manufactures a focus ring made of silicon carbide so as to infer the hypothesis of the mechanism, and the focus ring is an etching treatment apparatus. Placed in a chamber in, the number of occurrences of particles (particles of silicon carbide) from the focus ring for the etching treatment time and the consumption of the focus ring for the etching treatment time were observed.

As a result, the present inventors found that when the application time of the high frequency power is 15 minutes, many particles are generated in the chamber 2, about one third of the particles are particles from the focus ring, and It was confirmed that the consumption was almost in progress. Further, the inventors of the present invention pointed out that when the application time of the high frequency power is 80 hours, the particles in the chamber are decreasing, about 1/10 of the particles are particles from the focus ring, and the focus ring is consumed. We confirmed that it became.

That is, the present inventors confirmed that the amount of generation of particles from the focus ring is reduced with the consumption of the focus ring. Accordingly, the inventors have inferred the following hypothesis shown in Figs. 2A to 2C for the mechanism in which particles are generated in the initial etching process.

In the vicinity of the surface of the focus ring made of silicon carbide, there are numerous defects in the shape of voids formed by lack of carbon or silicon (indicated by "0" in the figure), and the abundance increases as the surface gets closer to the surface. Therefore, it can be considered that the brittle layer is formed on the surface of the focus ring (FIG. 2A).

In the initial etching process, when ions or the like collide with the brittle layer, as shown by the arrows in the figure, the kinetic energy of the ions is transferred to the brittle layer, and silicon carbide molecules in the brittle layer are scattered to form particles. (FIG. 2B).

When the etching process is performed on the semiconductor wafer W for a long time, the focus ring disposed to surround the periphery of the semiconductor wafer W is also exposed to the plasma for a long time, so that the brittle layer is consumed, and the relatively dense layer below the brittle layer is consumed. (Hereinafter referred to as "dense layer") exposes. As shown by the arrow in the figure, even if ions or the like collide with the dense layer, the silicon carbide molecules in the brittle layer do not scatter because the intermolecular force of the silicon carbide in the dense layer is large, and as a result, almost no particles are generated. Not (FIG. 2C).

That is, the defect abundance and particle generation amount are closely related, and when the defect abundance ratio is low, the particle generation amount is small.

In response to this hypothesis, in the method for manufacturing a component for substrate processing apparatus according to the first embodiment of the present invention, the defect abundance ratio existing near the surface of the focus ring as the component for substrate processing apparatus, which is made of silicon carbide, is reduced.

3 is a flowchart of a component manufacturing process as a method of manufacturing a component for substrate processing apparatus according to the first embodiment of the present invention.

In Fig. 3, first, a silicon carbide body having a desired size is formed by a sintering method or a CVD method, and the formed silicon carbide body is formed into a focus ring by cutting (step S31).

The shaped focus ring is then exposed to a plasma generated from at least one of a tetrafluorocarbon gas and an oxygen gas that produces impurities, and impurity from the plasma in the form of voids present near the surface of the focus ring, For example, fluorine ions or oxygen ions are introduced (defect abundance reduction step) (step S32).

In step S32, first, as shown by the hatched arrows in the figure, the plasma is irradiated toward the surface of the shaped focus ring, and the fluorine ions, oxygen ions, and the like in the plasma are doped as impurities, for example, by ion implantation. It introduces into a defect (FIG. 4A). Fluorine ions, oxygen ions, and the like introduced into the defect increase the electrical bonding force (molecular force) between the silicon carbides facing the defect. In addition, fluorine ions, oxygen ions, and the like introduced into the defect stop in the defect (indicated by a hatched circle in the drawing), and as a result, the defect abundance present near the surface of the focus ring is lowered, and the surface layer of the focus ring is relatively dense. Layer (hereinafter referred to as "impurity introducing layer") (FIG. 4B).

At this time, since fluorine ions, oxygen ions, and the like are introduced only to defects near the surface of the focus ring, the impurity introduction layer is thin, and etching is performed when the focus ring having the impurity introduction layer is disposed in the chamber and subjected to etching treatment. As a result, the impurity introduction layer may be consumed at an early time.

However, even in the etching process, since the focus ring is exposed to the plasma (indicated by the white arrows in the figure) generated from the processing gas consisting of at least one of tetrafluorocarbon gas and oxygen gas, even if the impurity introduction layer is consumed, Impurities in the plasma, for example, fluorine ions or oxygen ions, are continuously introduced to the defect in the vicinity of the new surface where the impurity introduction layer is consumed and exposed to the plasma. In other words, even in the vicinity of the new surface, the abundance of defects continuously decreases, and a new impurity introduction layer is formed (Fig. 4C).

Therefore, the plasma used in the impurity introduction in step S32 is preferably the same as the plasma used in the etching process.

FIG. 5 is a graph showing the result of impurity introduction in step S32 in FIG. 3.

In Figure 5, the vertical axis is the density of each atom and the horizontal axis is the depth from the focus ring surface. In this graph, impurity is introduced into a focus ring made of sintered silicon carbide, and the result of analyzing the focus ring to which the impurity has been introduced is conducted by the SIMS (Secondary Ion Mass Spectrometry) method.

As shown in the figure, in the focus ring exposed to the plasma, fluorine atoms or oxygen atoms exist from the surface to a depth of about 2 m. Therefore, fluorine ions and oxygen ions in the plasma are introduced into defects that exist up to 2 m in depth by impurity introduction. As a result, in the focus ring to which impurity introduction has been performed, an impurity introduction layer having a thickness of almost 2 m is formed.

Although both the focus ring of sintered silicon carbide and the focus ring of CVD silicon carbide have a large number of pore defects in the vicinity of the surface, the impurity introduction described above can be applied to any focus ring. Regardless, the defect abundance ratio near the surface of the focus ring can be reduced.

6 is a graph showing a relationship between a method of producing silicon carbide and a defect abundance ratio.

In Fig. 6, the vertical axis is the S parameter corresponding to the defect abundance ratio, and the horizontal axis is the positron energy corresponding to the depth from the focus ring surface. In this graph, the result of having measured the defect abundance ratio in the vicinity of the surface of the focus ring which consists of various silicon carbides by the positron extinction method is shown.

The positron extinction method injects positrons emitted from a sodium radioisotope into silicon carbide and monitors the energy generated by the pair quenching of the injected positrons and electrons in the silicon carbide, such as inner core electrons or free electrons. It is a method of measuring abundance.

In the positron extinction method, when the defect abundance ratio is low, the rate at which the positron penetrates between the lattice of each atom forming silicon carbide and bi-dissipates with the inner core electrons of each atom (hereinafter referred to as "disappearance ratio") increases. On the other hand, when a defect abundance ratio is high, a positron will invade each defect and the extinction ratio with the free electron in a defect will become high.

In general, since the kinetic energy of the inner core electrons is larger than the kinetic energy of the free electrons, the energy generated when the positron and the inner core electron are denied is larger than the energy generated when the positron and the free electron are denied. Therefore, the defect abundance ratio can be measured by monitoring bi-decay energy. For example, when the measured twin extinction energy is large, it can be considered that the defect abundance ratio is low.

The S parameter is an extinction ratio with electrons having a small kinetic energy such as free electrons, and the smaller the S parameter is, the higher the extinction ratio with electrons having a larger kinetic energy, that is, inner core electrons, is. Therefore, in the graph of FIG. 6, the smaller the S parameter, the lower the defect abundance ratio.

In addition, as the energy of the positron injected into the silicon carbide increases, the positron penetrates deep into the silicon carbide. Therefore, in the graph of FIG. 6, the larger the positron energy of the horizontal axis, the deeper the depth from the surface of silicon carbide.

In the graph of Fig. 6, "●" represents sintered silicon carbide, "▲" represents low-resistance CVD silicon carbide, "▼" represents high-resistance CVD silicon carbide, and "○" represents impurity introduction. Represents sintered silicon carbide, " Δ " represents low-resistance CVD silicon carbide subjected to impurity introduction, and " " represents high-resistance CVD silicon carbide subjected to impurity introduction. Here, the resistance value of the high resistance CVD silicon carbide is, for example, 10000 Ωcm, and the resistance value of the low resistance CVD silicon carbide is, for example, 0.01 to 0.1 Ωcm.

As shown in the graph of FIG. 6, the energy of the positrons of sintered silicon carbide, low-resistance CVD silicon carbide and high-resistance CVD silicon carbide, which is not impurity introduced, is zero, that is, on the surface of the silicon carbide body. S parameters are different from each other, sintered silicon carbide has the largest S parameter, and low-resistance CVD silicon carbide has the smallest S parameter. Therefore, when impurity introduction is not performed, the defect abundance ratio of sintered silicon carbide is the highest, and the defect abundance ratio of CVD silicon carbide of low resistance is the lowest.

When impurities are introduced into each silicon carbide, the S parameter becomes small regardless of the method for producing silicon carbide. For example, the S parameter of sintered silicon carbide subjected to impurity introduction is smaller than the S parameter of low-resistance CVD silicon carbide to which impurity introduction is not performed. In other words, even when sintered silicon carbide is used as the material of the focus ring, impurity introduction allows the defect abundance to be lower than that of low-resistance CVD silicon carbide in which impurity introduction is not performed.

Therefore, even when sintered silicon carbide is used as the material for the focus ring, impurity introduction allows the generation rate of particles in the initial etching process to be lower than that of low-resistance CVD silicon carbide without impurity introduction. have.

In addition, since the sintered silicon carbide subjected to the impurity introduction, the low-resistance CVD silicon carbide and the high-resistance CVD silicon carbide exhibit the same S parameters on the surface of the silicon carbide body, the production of silicon carbide by performing impurity introduction is performed. Regardless of the method, the defect abundance can be lowered to the same low level.

Therefore, even when sintered silicon carbide is used as the material for the focus ring, by introducing impurities, the generation rate of particles in the initial etching process can be lowered to the same low level as that of CVD silicon carbide subjected to impurity introduction.

Returning to FIG. 3, a positron is injected in the vicinity of the surface of the focus ring into which impurities are introduced, and the defect abundance ratio is examined in the vicinity of the surface of the focus ring by a positron extinction method (inspection step) (step S33). When the detected defect abundance falls to a predetermined value, the focus ring is disposed in the chamber, and when the detected defect abundance does not fall to a predetermined value, the focus ring is not disposed in the chamber.

According to the component for a substrate processing apparatus and the manufacturing method thereof according to the first embodiment of the present invention, since impurities are introduced into the defects of the void shape existing near the surface of the focus ring made of silicon carbide as the component for the substrate processing apparatus, The defect abundance ratio near the surface of a focus ring falls. Specifically, the defect abundance ratio near the surface of the focus ring is lower than the defect abundance ratio near the surface of the CVD silicon carbide body in which impurities are not introduced. When the defect abundance ratio near the surface decreases, the generation rate of particles in the initial etching process decreases. Therefore, the generation of particles from the focus ring is suppressed and the long-term seasoning process is unnecessary, so that the lowering of the operation rate of the etching apparatus can be prevented. In addition, since a lapping process for the purpose of preventing particle scattering becomes unnecessary and a sintered silicon carbide which is relatively easy to manufacture is used, the occurrence rate of particles in the initial etching process can be lowered. It can be manufactured easily.

In the present embodiment described above, even in the etching process, the focus ring is exposed to a plasma generated from a processing gas consisting of at least one of tetrafluorocarbon gas and oxygen gas, and therefore fluorine ions and oxygen ions from the plasma as impurities. This defect is introduced. Therefore, it is possible to easily introduce impurities into defects in the vicinity of the surface, and even if the impurity introduction layer of the focus ring is consumed, the impurity introduction layer is consumed and in the vicinity of the new surface exposed to the plasma. Even in the defect, fluorine ions, oxygen ions, and the like in the plasma are continuously introduced. That is, even in the vicinity of a new surface, the abundance of defects can be continuously reduced, and a new impurity introduction layer can be continuously formed.

In addition, in the present embodiment described above, positrons are injected into the vicinity of the surface of the focus ring where impurities are introduced into the void-like defects in the vicinity of the surface, and the defect abundance ratio near the surface of the focus ring is examined by a positron extinction method. do. The positron disappearance method can easily detect the defect abundance ratio near the surface of the focus ring made of silicon carbide. Therefore, it is possible to easily determine the presence or absence of the generation of particles from the focus ring without performing the actual evaluation for a long time, whereby the focus ring can be easily manufactured.

Next, the component for substrate processing apparatus which concerns on the 2nd Example of this invention, and its manufacturing method are demonstrated.

This embodiment is basically the same in structure and operation as the first embodiment described above, and differs only in that it uses heat treatment instead of the impurity introduction described above in the method for manufacturing a component for substrate processing apparatus. Therefore, descriptions of overlapping configurations and operations are omitted, and different configurations and operations will be described below.

In the focus ring as the component for substrate processing apparatus according to the present embodiment, similarly to the focus ring 16 described above, the defect abundance ratio near the surface is set lower than the defect abundance ratio near the surface of the CVD silicon carbide body. The focus ring of this embodiment is different from the focus ring 16 in that it is manufactured by the manufacturing method of the component for substrate processing apparatus which concerns on this embodiment mentioned later.

Hereinafter, the manufacturing method of the component for substrate processing apparatus which concerns on a present Example is demonstrated. The manufacturing method is made of silicon carbide, similar to the manufacturing method of the component for substrate processing apparatus according to the first embodiment, in response to the hypothesis of the mechanism in which particles are generated in the initial etching treatment described above. The defect abundance ratio which exists in the vicinity of the surface of a focus ring as a target is reduced.

7 is a flowchart of a component manufacturing process as a method for manufacturing a component for substrate processing apparatus according to a second embodiment of the present invention. In addition, step S31 and S33 in the process of FIG. 7 are the same as step S31 and S33 in the process of FIG.

In Fig. 7, after step S31, in the atmosphere of inert gas, the temperature of the shaped focus ring is raised to 1200 ° C to perform heat treatment (annealing) of the focus ring (defect abundance reduction step) (step S72).

Specifically, in step S72, the focus ring is placed in an atmosphere of argon gas, and the temperature of the focus ring is maintained at 1200 ° C over 20 minutes or more. At this time, molecules of heat-melted silicon carbide or the like flow to fill the void-like defects near the surface of the focus ring and disappear. Thereby, the defect abundance ratio which exists in the vicinity of the surface of a focus ring falls.

FIG. 8 is a graph showing the result of the heat treatment of step S72 in FIG. 7.

In Figure 8, the vertical axis is the S parameter corresponding to the defect abundance ratio, and the horizontal axis is the positron energy corresponding to the depth from the focus ring surface.

This graph shows the result of measuring the defect abundance ratio by the positron extinction method when the focus ring is heat-treated at 1400 ° C. As shown in the graph, the S parameter is rapidly decreasing between the depths of 200 nm (0.2 μm) from the surface. That is, the defect abundance ratio near the surface of a focus ring is falling. This tendency does not change with any of sintered silicon carbide and CVD silicon carbide.

When the temperature of the focus ring is 1400 ° C or higher, evaporation of silicon carbide starts, and when the temperature of the focus ring is 1600 ° C or higher, the evaporation becomes severe. In the heat treatment of step S72, the temperature of the focus ring is 1200 ° C to 1600 ° C, preferably Preferably, it is set to 1200 to 1400 degreeC.

According to the component for a substrate processing apparatus and the manufacturing method thereof according to the second embodiment of the present invention, since the focus ring made of silicon carbide as the component for the substrate processing apparatus is subjected to heat treatment, the defects of the hollow shape existing near the surface are prevented. It disappears and the defect abundance ratio near the surface of a focus ring falls. When the defect abundance ratio near the surface decreases, the generation rate of particles in the initial etching process decreases. Therefore, the occurrence of particles from the focus ring is suppressed, and a long time seasoning process is unnecessary, so that a decrease in the operation rate of the etching processing apparatus can be prevented. Moreover, since the lapping process for the purpose of preventing particle scattering becomes unnecessary, a focus ring can be manufactured easily.

In addition, in the heat processing of step S72, since the temperature of a focus ring is set to 1200 degreeC-1600 degreeC, heat processing is accelerated | stimulated and the evaporation of the silicon carbide of a focus ring can be suppressed.

In the above-described embodiment, the case where the present invention is applied to the focus ring as the component for the substrate processing apparatus has been described, but the component for the substrate processing apparatus to which the present invention is applicable is not limited to the focus ring. For example, the present invention can be applied as long as it is a component for a substrate processing apparatus used in a consumption environment such as an upper electrode, an exhaust rectifying ring, a shield ring, or the like.

In addition, the manufacturing method of this invention may be applied not only to the components for substrate processing apparatuses but also to the components of conveyance apparatuses, such as a load lock chamber, used under the consumption environment similarly to the components for substrate processing apparatuses.

In the above embodiment, the substrate to be processed was a semiconductor wafer, but the substrate to be processed is not limited to this, and may be, for example, a glass substrate such as a liquid crystal display (LCD) or a flat panel display (FPD).

According to the manufacturing method of the components for substrate processing apparatuses of Claim 1, the abundance ratio of the defect of the void shape existing in the surface vicinity of the components for substrate processing apparatuses falls. When the abundance ratio of the defect of a void shape falls, the generation rate of particle | grains in an initial etching process will fall. Therefore, since generation | occurrence | production of the particle | grains from the component for substrate processing apparatuses is suppressed, long-term seasoning process becomes unnecessary, and the fall of the operation rate of a substrate processing apparatus can be prevented. Moreover, since the lapping process for the purpose of particle scattering prevention becomes unnecessary, and even if the silicon carbide formed by the sintering method which is easy to manufacture is used, the generation rate of the particle | grains in an initial etching process can be reduced, The component for substrate processing apparatus can be manufactured easily.

According to the manufacturing method of the component for substrate processing apparatus of Claim 2, since an impurity is introduce | transduced into the defect of the void shape existing in the surface vicinity of the component for substrate processing apparatus, the abundance ratio of the said defect can be reliably reduced.

According to the manufacturing method of the component for substrate processing apparatus of Claim 3, since an impurity is produced | generated from the plasma produced | generated from at least 1 gas of a fluorine containing gas, a carbon containing gas, and an oxygen containing gas, it is a defect which exists in the vicinity of a surface. Can be easily introduced. In addition, since these plasmas are also generated during the etching process, introduction of impurities generated from these plasmas into the defects during the etching process is continuously performed. Therefore, the abundance of defects can be continuously reduced.

According to the manufacturing method of the component for substrate processing apparatuses of Claim 4, since the component for substrate processing apparatuses is heat-processed, the defect of the hollow shape which exists in the vicinity of a surface can be eliminated, and the abundance ratio of a defect can be reliably reduced.

According to the manufacturing method of the component for substrate processing apparatus of Claim 5, since the temperature of the component for substrate processing apparatus is set to 1200 degreeC-1600 degreeC in the atmosphere of inert gas, while promoting heat processing, it is for substrate processing apparatuses Evaporation of the constituent material of the part can be suppressed.

According to the manufacturing method of the component for substrate processing apparatus of Claim 6, the surface vicinity of a component for substrate processing apparatus is inspected by a positron extinction method. The positron extinction method can easily detect the abundance ratio of the defect of the hollow shape which exists in the vicinity of the surface of the component for processing apparatuses. Therefore, the presence or absence of the generation of particles from the component for substrate processing apparatus can be easily determined, whereby the component for substrate processing apparatus can be easily manufactured.

According to the component for substrate processing apparatus of Claim 7, the abundance ratio of the defect of the void shape which exists in the vicinity of a surface is lower than the abundance ratio of the void shape which exists in the vicinity of the surface of the silicon carbide body formed by CVD method. If the abundance ratio of the void defects is lower than the abundance ratio of the void defects of the silicon carbide body formed by the CVD method, the generation rate of particles in the initial etching process is lowered. Therefore, since generation | occurrence | production of the particle | grains from the component for substrate processing apparatuses is suppressed, and a long season seasoning process becomes unnecessary, the fall of the operation rate of a substrate processing apparatus can be prevented. Moreover, since the lapping process for the purpose of particle scattering prevention is unnecessary, and even if the silicon carbide formed by the sintering method which is comparatively easy to manufacture is used, since the generation rate of the particle in the initial etching process can be reduced, a board | substrate The component for a processing apparatus can be manufactured easily.

The present invention is not limited to the above-described embodiments, and various changes can be made by those skilled in the art within the spirit and scope of the present invention disclosed in the claims.

Claims (7)

As a manufacturing method of components for substrate processing apparatuses arrange | positioned in the storage chamber of the substrate processing apparatus which accommodates a board | substrate, Having a defect abundance ratio reduction step of reducing the abundance ratio of the defect of a hollow shape existing in the surface vicinity of the components for substrate processing apparatuses. The manufacturing method of components for substrate processing apparatuses. The method of claim 1, The defect abundance lowering step may include introducing impurities into the defect. The manufacturing method of components for substrate processing apparatuses. The method of claim 2, The impurity is generated from a plasma generated from at least one of a fluorine-containing gas, a carbon-containing gas, and an oxygen-containing gas. The manufacturing method of components for substrate processing apparatuses. The method of claim 1, The defect abundance lowering step may be performed by heat treating the component for substrate processing apparatus. The manufacturing method of components for substrate processing apparatuses. The method of claim 4, wherein In the defect abundance reduction step, the temperature of the component for substrate processing apparatus is set to 1200 ° C to 1600 ° C in an atmosphere of inert gas. The manufacturing method of components for substrate processing apparatuses. The method according to any one of claims 1 to 5, An inspection step of inspecting the vicinity of the surface of the component for substrate processing apparatus by a positron extinction method The manufacturing method of components for substrate processing apparatuses. As a component for substrate processing apparatuses arrange | positioned in the accommodation chamber of the substrate processing apparatus which accommodates a board | substrate, The abundance ratio of the defect of the void shape existing in the vicinity of the surface is lower than the abundance ratio of the defect of the void shape existing in the vicinity of the surface of the silicon carbide body formed by the CVD method. Parts for substrate processing equipment.

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