KR20060020156A - Lcd device with low-resistance pixel electrode and fabricating methode thereof - Google Patents

Abstract

The present invention relates to a method for manufacturing a liquid crystal display device, and an aspect of the present invention is to form an oxide layer doped with aluminum between a drain electrode and an ITO material pixel electrode when forming an array substrate.

In this way, the interface resistance between the drain electrode and the pixel electrode is reduced, which has the advantage of improving the electrical characteristics by about 10%.

Description

Liquid crystal display including low resistance pixel electrode and manufacturing method thereof {LCD device with low-resistance Pixel Electrode and fabricating methode}             

1A is a perspective view of a general liquid crystal display device.

FIG. 1B is a plan view illustrating region A of the liquid crystal display of FIG. 1A; FIG.

2 is a cross-sectional view taken along the line II-II of FIG. 1B.

3 is a plan view of an array substrate including a zinc oxide layer according to an embodiment of the present invention.

4 is a cross-sectional view taken along line IV-IV of FIG. 3 in accordance with an embodiment of the present invention.

5A to 5C are cross-sectional views of a manufacturing process of the array substrate according to the embodiment of the present invention.

6 is a view illustrating a phenomenon in which electrons are applied from a drain electrode to a pixel electrode according to an exemplary embodiment of the present invention.

<Description of the symbols for the main parts of the drawings>

100: insulation board

107: gate electrode

121: gate insulating film

110: active layer                 

123: ohmic contact layer

105: source electrode

109: drain electrode

125: protective layer

127: contact hole

111: pixel electrode

113: zinc oxide layer doped with aluminum

 The present invention relates to a method for manufacturing a liquid crystal display device, and more particularly, to a liquid crystal display device including a low resistance pixel electrode and a method for manufacturing the same.

In general, a liquid crystal display device is an apparatus for representing an image by using optical anisotropy of the liquid crystal, and is composed of a first substrate, a second substrate, and a liquid crystal positioned between two substrates.

FIG. 1A is a perspective view of a liquid crystal display according to the related art, and FIG. 1B is an enlarged view of an A region of FIG. 1A and is a plan view of an array substrate.

As shown in FIGS. 1A and 1B, a general liquid crystal display device includes a first substrate 9 having an array wiring including a pixel electrode 11 and a switching element 13 formed on a pixel region, and a black matrix 2. ) And a second substrate (1) having a transparent common electrode (5) formed on the color filter (3) including a sub-color filter (red, green, blue), and the first substrate ( The liquid crystal 7 is filled between 9) and the second substrate 1.

Referring to the configuration of the first substrate 9 in more detail, as shown in FIG. 1B, a thin film transistor serving as a switching element at a portion where the data line 23 and the gate line 21 cross each other (13 in FIG. 1B) Is positioned in a matrix form, and the thin film transistor 13 includes a gate electrode 25, an active layer 20, a source electrode 29, and a drain electrode 27.

The source electrode 29 is connected to the data line 23, the gate electrode 25 is connected to the gate line 21, and the pixel electrode 11 is formed to be in electrical contact with the drain electrode 27. have.

In general, the source electrode 29 and the drain electrode 27 are metals such as chromium (Cr), molybdenum (Mo), titanium (Ti), or tantalum (Ta), but molybdenum (MoW) and moltaltanium (MoTa). ) Or molybdenum alloys such as molybdenum (MoNb).

The pixel electrode 31 formed on the pixel region is made of indium tin oxide (ITO), which is a transparent conductive material.

The data line 23 transfers a signal voltage to the source electrode 29. This signal is applied to the liquid crystal 7 through the drain electrode 27 and through the pixel electrode 31, and displays an image according to the applied signal.

FIG. 2 is a cross-sectional view taken along line II to II of FIG. 1B.

As shown in FIG. 2, a gate electrode 25 is first formed on a substrate 9 in an array substrate for a liquid crystal display according to the prior art.

A gate insulating layer 31 is formed on the gate electrode 25 by depositing one or more insulating materials selected from the group of inorganic insulating materials including silicon nitride (SiNx) and silicon oxide (SiO ₂ ). .

The active layer 20 and the ohmic contact layer 33 are stacked on the gate insulating layer 31 on the gate electrode 25, and the source electrode 29 and the drain electrode 27 are formed on the ohmic contact layer 33. do.

A passivation layer 35 including a contact hole 30 exposing a portion of the drain electrode 27 is formed on the source electrode 29 and the drain electrode 27, and the passivation layer 35 is formed on the passivation layer 35. The transparent pixel electrode 11 contacting the drain electrode 27 is formed through the exposed contact hole 30.

However, in the above-described configuration, electrons move between the drain electrode 27 and the pixel electrode 11 when the drain electrode 27 and the pixel electrode 11 are bonded together, and thus, between the pixel electrode 11 and the drain electrode 27. Has a high interfacial resistance, and a high barrier is formed between the drain electrode 27 and the pixel electrode 11.

In addition, the mobility of electrons is lowered due to the resistance of the pixel electrode 11 itself, which causes a problem of degrading the image quality of the liquid crystal display.

The present invention has been proposed to solve the above problems, and an object of the present invention is to reduce the interface resistance between the pixel electrode and the drain electrode to improve the operating characteristics of the thin film transistor and to improve the image quality by lowering the side resistance. .

In order to achieve the above object, the present invention provides an insulating substrate, a data wiring and a gate wiring crossing the insulating substrate to define a pixel region, a switching element formed in the intersection region of the data wiring and the gate wiring, A pixel electrode formed on the pixel region and connected to the switching element and doped with one of the group III metal elements of an element periodic table, and a pixel electrode formed in the pixel region and electrically connected to the switching element through the oxide layer It provides an array substrate for a liquid crystal display device comprising a.

In particular, the oxide layer is doped with aluminum, and the oxide layer doped with one of the Group III metal elements of the periodic table includes zinc oxide (ZnO), copper oxide (CuO), and indium zinc oxide (IZO). An array substrate for a liquid crystal display device, comprising any one of

The pixel electrode may be formed of indium tin oxide (ITO), and an oxide layer doped with one of the group III metal elements of the periodic table may be positioned between the drain electrode and the pixel electrode of the switching device. The thickness of the oxide layer doped with one of the group III metal elements of the periodic table of the elements is characterized in that about 30 ~ 50nm.

The oxide layer doped with one of the group III metal elements of the periodic table of the elements is the same size and shape of the pixel electrode.

Forming data and gate wirings on the insulating substrate to define pixel regions; Forming a switching device connected to the data line and the gate line; Forming an oxide layer doped with a Group III metal element of the Periodic Table of the Elements connected to the switching device on the pixel region; A method of manufacturing a liquid crystal display device or an array substrate for a liquid crystal display device includes forming a pixel electrode connected to the switching element through the oxide layer in the pixel region.

In the forming of the array substrate for the liquid crystal display device, the pixel electrode is formed on an oxide layer doped with one of the group III metal elements of the periodic table. Forming the oxide layer doped with one of the group III metal element is characterized in that the step of the array substrate for a liquid crystal display device, characterized in that through a photolithography process.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

3 is a plan view showing an array substrate according to the present invention.

As shown in FIG. 3, the data wiring 101 and the gate wiring 103 are formed to intersect on the insulating substrate, and the gate electrode 107, the active layer 110, the source electrode 105, The thin film transistor 115, which is a switching element including the drain electrode 109, is formed. Of the zinc oxide layer 113 overlapping the switching element 115 and the pixel electrode 111 formed on the zinc oxide layer 113 and electrically contacting the drain electrode 109 of the switching element 115. It is shown.

4 is a cross-sectional view taken along line IV to IV of FIG. 3.

First, the gate electrode 107 is formed on the insulating substrate 100 so as to be connected to the gate wiring 103 of FIG. 3 using a metal such as aluminum or copper. The gate insulating layer 121 is formed on the transparent substrate 100 to cover the gate electrode 107 and the gate wiring (not shown).

The gate insulating layer 121 may be formed of silicon nitride (SiNx) or silicon oxide (SiO ₂ ).

The active layer 110 and the ohmic contact layer 123 are formed on a portion of the gate insulating layer 121 that corresponds to the gate electrode 107. The active layer 110 is formed of amorphous silicon that is not doped with impurities, and the ohmic contact layer 123 is formed of amorphous silicon that is heavily doped with N-type or P-type impurities.

The source electrode 105 and the drain electrode 109 are formed on both sides of the active layer 110 formed on the gate insulating layer 121 to be in contact with the ohmic contact layer 123.

The gate electrode 107, the gate insulating layer 121, the active layer 110, the ohmic contact layer 123, the source electrode 105, and the drain electrode 109 described above constitute a thin film transistor.

In addition, the protective layer 125 is formed to cover the thin film transistor which is the switching element. The protective layer 125 may be formed of an inorganic insulating material such as silicon oxide (SiO ₂ ) or silicon nitride (SiNx) or an organic insulating material. A contact hole 127 exposing the drain electrode 109 is formed in the protective layer 125.

A zinc oxide (ZnO) layer 113 doped with aluminum, which is a feature of the present invention, is formed on the passivation layer 125. The pixel electrode 111 is formed of indium tin oxide (ITO) on the zinc oxide layer 113 electrically connected to the drain electrode 109 through the contact hole 127 on the protective layer 125.

The zinc oxide layer 113 may be doped with gallium (Ga), which is a group III metal element on the periodic table, in addition to aluminum, but doping aluminum may bring the best electrical effect.

Zinc oxide is a semiconductor material, and the electron concentration is only about 10 ¹⁵ , but by doping aluminum can increase the electron concentration to 10 ¹⁹ ~ 10 ²⁰ .

However, indium tin oxide (ITO), which is a pixel electrode 111 used in the related art, has an electron concentration of 10 ²¹ . Thus, ITO has better electrical properties than zinc oxide doped with aluminum.

However, if a layer of aluminum oxide doped zinc oxide 113 is formed between the drain electrode 109 and the indium tin oxide (ITO), which is the pixel electrode 111, the aluminum oxide is doped with zinc oxide. It has better electrical properties than the electrical properties of indium tin oxide (ITO).

This is because a high concentration electron layer is formed between the zinc oxide layer 113 doped with aluminum and the indium tin oxide (ITO) layer, which is the pixel electrode 111.

When the zinc oxide layer 113 doped with aluminum is formed, and the pixel electrode 111 is formed of ITO thereon, the pixel electrode 111 with more electrons and the zinc oxide with fewer electrons are formed than the zinc oxide layer 113. Between the layers 113, an excessive transition width is formed in the zinc oxide layer 113 while the electrons are in equilibrium.

In other words, when the zinc oxide layer 113 is thinly formed, a high concentration transition layer is formed between the zinc oxide 113 layer and the pixel electrode 111, thereby eliminating a barrier to the movement of electrons.

At this time, the zinc oxide layer 113 doped with aluminum should be formed to about 30 ~ 50nm. This is because if the thickness is too thick, electrons in the drain electrode 109 become a barrier to enter the zinc oxide layer 113 and cross over to the pixel electrode 111, and thus, electrical conductivity improvement characteristics of the pixel electrode 111 cannot be obtained. .

Instead of the zinc oxide layer 113, any one of a transparent conductive material such as copper oxide (CuO) and indium zinc oxide (IZO) may be formed.

5A to 5C will be described in detail the manufacturing method of the liquid crystal display device of the embodiment according to the present invention.

5A, a gate electrode 107 and a gate wiring (not shown) are formed on the substrate 100, and a gate insulating layer 121 covering the gate electrode 107 and the gate wiring (not shown) is formed.

The active layer 110 and the ohmic contact layer 123 are formed on the gate insulating layer 121 at a portion corresponding to the gate electrode 107. Source electrodes 105 and drain electrodes 109 are formed on both sides of the active layer 110 formed on the gate insulating layer 121 to be in contact with the ohmic contact layer 123. In addition, a protective layer 125 including a contact hole 127 exposing the drain electrode 109 is formed thereon.

5B illustrates a zinc oxide layer 113 doped with one of the Group III metal elements of the Periodic Table of the Elements periodically contacting the drain electrode 109 through the contact hole 127 on the protective layer 125 formed in FIG. 5A. The pixel electrode 111 is formed on the entire surface of the substrate 100, and the pixel electrode 111 is formed in the same shape and size as the zinc oxide layer 113.

FIG. 5C illustrates a state after the zinc oxide layer 113 and the pixel electrode 111 formed in FIG. 5B are patterned through a photolithography process.

6 is a diagram illustrating electrons moving from the drain electrode 109 of FIG. 4 to the pixel electrode 111 according to the exemplary embodiment of the present invention.

FIG. 6 illustrates the electrons applied to the drain electrode 109 being applied to the pixel electrode 111 through the zinc oxide 113 doped with aluminum.

As shown in FIG. 6, in the electrode having such a structure, electrons are diffused more quickly and uniformly, and may improve electrical characteristics of about 10% compared to the conventional art.

The present invention is not limited to the above embodiments, and various modifications can be made without departing from the spirit of the present invention.

As described above, the interfacial resistance is reduced between the drain electrode and the pixel electrode of the liquid crystal display according to the present invention, so that the movement of electrons is faster and uniformly spread.

In addition, since a low-resistance pixel electrode having 10% improved electrical characteristics can be formed than a conventional pixel electrode using only indium tin oxide (ITO), the image quality of a liquid crystal display device can be improved by improving the operation characteristics of the thin film transistor. .

Claims (10)

An insulating substrate; Data and gate wirings intersecting the insulating substrate to define pixel regions; A switching element formed at an intersection of the data and gate wirings; An oxide layer formed on the pixel region and connected to the switching element and doped with a group III metal element of an periodic table of elements; A pixel electrode formed in the pixel region and electrically connected to the switching element through the oxide layer Array substrate for a liquid crystal display device comprising a. The method of claim 1. And an aluminum layer is doped with the oxide layer. The method of claim 1, An oxide substrate doped with a Group III metal element of the periodic table includes any one of zinc oxide (ZnO), copper oxide (CuO), and indium zinc oxide (IZO).  The method of claim 1, The pixel electrode is formed of indium tin oxide (ITO). The method of claim 1, And an oxide layer doped with a Group III metal element of the periodic table of the elements is located between the drain electrode and the pixel electrode of the switching element. The method of claim 1, The thickness of the oxide layer doped with a Group III metal element of the periodic table of the element is 30 ~ 50nm, the array substrate for a liquid crystal display device. The method of claim 1, And an oxide layer doped with a Group III metal element of the periodic table has the same size and shape as the pixel electrode. Forming a data line and a gate line crossing the insulating substrate to define a pixel area; Forming a switching device connected to the data line and the gate line; Forming an oxide layer doped with a Group III metal element of the Periodic Table of the Elements connected to the switching device on the pixel region; Forming a pixel electrode connected to the switching device through the oxide layer in the pixel region Method of manufacturing an array substrate for a liquid crystal display device comprising a. The method of claim 8, And the pixel electrode is formed on an oxide layer doped with a Group III metal element of the Periodic Table of the Elements. According to claim 8, And forming the pixel electrode and forming an oxide layer doped with a group III metal element of an periodic table of the elements through one etching process.

Images