KR20060017162A - Method for fabricating liquid crystal display device - Google Patents

Abstract

The present invention relates to a method for manufacturing a liquid crystal display device, characterized in that the conductive pattern is formed so as not to be exposed to the air in order to prevent the conductive pattern portion protruding to the outside of the sealant to be transferred. Forming a gate electrode, forming a conductive pattern formed at an edge of the first substrate and having a first open region in a portion thereof, and forming a semiconductor layer over the gate electrode with a gate insulating layer interposed therebetween And forming a data line and a source / drain electrode defining a pixel by perpendicularly crossing the gate line, forming a passivation layer on the entire surface including the data line, and then applying and patterning a dry film resist thereon. And removing the gate insulating film and the protective film exposed between the dry film resists to form a second film. Forming an open area, depositing a transparent conductive film on the entire surface including the dry film resist, and then lifting off the dry film resist to leave a transparent conductive film inside the second open area and to form a pixel electrode inside the pixel. Characterized in that it comprises a step.

Conductive Pattern, Common Voltage Line, Seal, Electric

Description

Method for manufacturing liquid crystal display device {Method For Fabricating Liquid Crystal Display Device}

1 is a plan view of a general liquid crystal display device.

Figure 2 is a plan view showing a common voltage line according to the prior art.

3 is a cross-sectional view taken along line II ′ of FIGS. 1 and 2.

4 is a plan view showing a common voltage line according to the present invention.

FIG. 5 is a cross-sectional view taken along line II-II ′ of FIG. 4.

6A to 6E are cross-sectional views of a liquid crystal display device according to the present invention.

* Explanation of symbols on the main parts of the drawings

110: lower substrate 111: conductive pattern

111a: first open region 132: gate electrode

133: gate insulating film 134: semiconductor layer

135a: source electrode 135b: drain electrode

136: protective film 137: pixel electrode

150: seal system 160: second open area

170: ITO film 190: dry film resist

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device (LCD), and more particularly, to a method for manufacturing a liquid crystal display device, which is intended to prevent electrolysis by preventing exposure of a conductive pattern to air.

BACKGROUND ART Liquid crystal display devices, which have recently been spotlighted as flat panel display devices, have been actively researched due to their high contrast ratio, suitable for gradation display or moving picture display, and low power consumption.

In particular, it can be manufactured with a thin thickness, so it can be used as an ultra-thin display device such as a wall-mounted TV in the future, and it is light in weight and consumes much less power than a CRT CRT. It is being used as a next generation display device.

Generally, a liquid crystal display device includes a lower substrate on which a thin film transistor (TFT) and a pixel electrode are formed in each pixel region defined by gate wiring and data wiring, and an upper substrate on which a color filter layer and a common electrode are formed. Arranged so as to face each other, and having a structure in which a liquid crystal layer having dielectric anisotropy is formed therebetween, by switching a TFT added to hundreds of thousands of pixels through pixel selection address wiring, a voltage is applied to the pixel. Is driven in a manner that gives.

Hereinafter, with reference to the accompanying drawings in detail.

1 is a plan view of a general liquid crystal display device, FIG. 2 is a plan view showing a common voltage line according to the prior art, and FIG. 3 is a cross-sectional view taken along the line II ′ of FIGS. 1 and 2.

First, as shown in FIG. 1, the lower substrate 10 is divided into an active region 60 and a pad portion region 61. In the active region 60, a plurality of gate wires 32, A data line 35, a thin film transistor TFT, and a pixel electrode 37 are formed, and a pad portion region extends from the gate line 32 to apply a gate driving signal of a gate driver to each of the gate lines. A plurality of gate pads 42 and a plurality of data pads 45 extending from the data lines 35 to apply data signals of a data driver to the data lines, and supplying various signals; Connected.

That is, the data input signal supplied from the driving circuit unit through the gate pad 42 and the data pad 45 is separated according to its own control signal and transmitted to each pixel electrode 37. Each pixel electrode 37 The electric field is formed by the signal transmitted to. This forms a vertical electric field together with the common electrode formed on the front surface of the upper substrate 20 to control the arrangement of the liquid crystal layer.

In order to form an electric field on the common electrode, the electric field must be electrically connected to the driving circuit unit connected to the lower substrate 10. The common voltage generated by the common voltage generator 30 of the driving circuit unit is received.

Here, in order to connect the common electrodes formed on the lower substrate 10 and the upper substrate 20 with each other, as shown in FIG. 1, an Ag dot 12 and an Ag dot 12 are formed in a stripe shape. The conductive pattern 11 is required. The conductive pattern 11 is formed in the pad region of the lower substrate 10, and the Ag dot 12 is formed before the bonding of the upper and lower substrates. It is formed at each end.

Specifically, at least two common voltage lines including two Ag dots 12 and one conductive pattern 11 are formed on the lower substrate 10. The Ag dots 12 have a sphere shape. It is printed and has conductivity, and is positioned at points A, B, C, and D on the lower substrate 10. The common voltage is supplied from the common voltage generator 30 to the Ag dots 12 at points A and C, and the common points at points A and C through the conductive pattern 11 to the Ag dots 12 at the points B and D. Voltage is delivered.

The Ag dot 12 is electrically connected to a common electrode formed on the upper substrate 20 to apply a common voltage to the common electrode of the upper substrate 20.

Meanwhile, the gate wiring 32, the gate pad 42, the data wiring 35, the data pad 45, the thin film transistor TFT, the pixel electrode 37, and the conductive pattern 11 on the lower substrate 10. In order to form the back, the photo-etching process has to be performed several times. Recently, researches to reduce the number of photo-etching processes have been continued.

For example, a process of forming a pattern of the lower substrate 10 by performing three photo etching processes has been proposed (see FIGS. 2 and 3). The gate wiring 32 and the gate pad 42 are formed by the first photo etching process. ), The gate electrode and the conductive pattern 11 of the thin film transistor are formed, and the semiconductor layer and the source / drain electrode of the data line 35, the data pad 45, and the thin film transistor are formed by a second photoetch process. The gate insulating film 33 and the protective film 36 are selectively opened by the photo etching process and the pixel electrode 37 is formed at the same time. At this time, a process of forming the gate insulating film 33 on the front surface after the gate wiring is formed and a process of forming the protective film 36 on the front surface after the data wiring are formed.

In the third photo-etching process, a lift-off process using a dry film resist (DFR) is applied. Specifically, a dry film resist (not shown) is formed on the gate insulating layer 33 and the protective layer 36. And the photoresist layer is exposed and developed through a photo-etching process, and then the open insulating layer 60 is formed by etching the gate insulating layer 33 and the protective layer 36 of the portion where the developed dry film resist is removed. In addition, an indium tin oxide (ITO) 70, which is an electrode material, is applied to the entire surface of the dry film resist and dried, and then the dry film resist (DFR) is stripped. At this time, the stripper penetrates into the contact interface between the dry film resist and the protective layer 36 through the open region 60.

Through such a lift-off process, the ITO 70 remains in the open region 60 from which the gate insulating film and the protective film inside the pixel are removed, thereby patterning the ITO to become the pixel electrode 37. .

However, the ITO 70 shown in FIG. 3 remains in the open area 60 provided to form the penetration path of the stripper, and may be referred to as a dummy pattern generated by a kind of lift-off process.

Meanwhile, the sealant 50 formed at the edge of the substrate so as to oppose the upper and lower substrates overlaps the conductive pattern 11 at a predetermined portion. The conductive pattern 11 is formed to be larger than the width of the sealant 50 because the conductive pattern 11 must maintain at least the width for the smooth flow of the common voltage.

However, the ITO 70 and the conductive pattern 11 which are formed on the outside based on the sealant 50 are exposed to the outside through the open area 60, so that when the moisture penetrates at a high temperature, the ITO 70 is formed. And electroforming occurs at the contact portion of the conductive pattern 11. Since the electricity generated in the conductive pattern 11 is an obstacle to the transfer of the common voltage, it acts as a factor that lowers the reliability of the device.

Accordingly, the present invention has been made to solve the above problems, and prevents the conductive pattern formed outside the sealant from being exposed to the outside, thereby preventing electrical conduction on the contact pattern between the conductive pattern and the ITO. It is an object of the present invention to provide a method for manufacturing a liquid crystal display device which is intended to be strengthened.

According to an aspect of the present invention, there is provided a method of manufacturing a liquid crystal display device, the method including forming a gate wiring, a gate electrode, and a gate pad on a first substrate, and forming a first open region on an edge of the first substrate. Forming a conductive pattern, forming a semiconductor layer over the gate electrode with a gate insulating layer interposed therebetween, forming data lines defining pixels by perpendicularly crossing the gate wiring, and simultaneously forming source / drain electrodes And forming a data pad, forming a protective film on the entire surface including the data line, applying and patterning a dry film resist on the protective film, and exposing the gate insulating film and the protective film exposed between the dry film resist. Removing to form a second open region, and covering the dry film resist After depositing a transparent conductive film on one surface, the dry film resist is lifted off to leave a transparent conductive film inside the second open area and to form a pixel electrode inside the pixel, and sealant on the edge of the first substrate And forming a liquid crystal layer opposite to the second substrate after the liquid crystal layer is formed therebetween.

That is, since the width of the conductive pattern is larger than that of the sealant, the conductive pattern protrudes from the inside and the outside of the sealant. To prevent the conductive pattern from being exposed to the air and being transferred under high temperature and high humidity, the open area of the insulating film is prevented. The conductive pattern of the portion is selectively removed to prevent exposure to the atmosphere.

Unlike the conventional method in which the conductive pattern and the ITO film are exposed to each other by contact between the open regions of the insulating film, the present invention is characterized in that the conductive pattern is formed so as not to be exposed between the open regions of the insulating film and only the ITO film remains.

Here, the conductive pattern may be removed only partially outside the sealant so that the common voltage may flow without a large resistance. For reference, the open region of the insulating layer is a penetration path of the stripper for dry film resist, which is an essential component in the lift-off process.

Hereinafter, a method of manufacturing a liquid crystal display device according to the present invention will be described with reference to the accompanying drawings.

4 is a plan view showing a common voltage line according to the present invention, FIG. 5 is a cross-sectional view taken along line II-II 'of FIG. 4, and FIGS. 6A to 6E are process cross-sectional views of the liquid crystal display device according to the present invention.

In the liquid crystal display device according to the present invention, an upper substrate on which a color filter layer and a common electrode are formed and a lower substrate on which various wirings and TFTs are formed are bonded to each other by a sealant 150 serving as an adhesive. The lower substrate is divided into an active region in which TFTs and pixel electrodes are formed to display an image, and a pad portion region to which an external driving circuit portion for generating various signals is attached.

In this case, a conductive pattern 111 is further provided in the pad part region to transfer the common voltage signal of the driving circuit part to the common electrode of the upper substrate. The conductive pattern 111 is illustrated in FIGS. 4 and 5. As shown, the sealant 150 is formed on the lower substrate 110 and printed on the conductive pattern 111.

At least one conductive pattern 111 is formed at an edge of the substrate, and one end thereof is connected to the common voltage generator to receive a common voltage. In addition, Ag is printed at both ends of each conductive pattern, for example, to electrically connect the common electrode and the conductive pattern. As a result, the common voltage in the common voltage generator is transferred to the common electrode of the upper substrate.

On the other hand, the liquid crystal is filled in a vacuum state on the inside with respect to the sealant 150, and the outside is exposed to the atmosphere, the present invention is partially exposed to the atmosphere, the conductive pattern 111 It is characterized in that to form a first open region (111a) by removing.

That is, the second open region 160 is formed by selectively removing the insulating layers 133 and 136 provided on the conductive pattern 111, and the conductive pattern is formed through the open region 160 outside the sealant 150. In order not to be exposed, the conductive pattern is opened larger than the open region 160 of the insulating layer. However, in order to smoothly flow the common voltage without receiving a large resistance, the first open region 111a of the conductive pattern is limited to only the outer side of the sealant.

As a result, it is possible to prevent the phenomenon of corrosion due to the contact between the conductive pattern and the ITO film under an atmosphere of high temperature and high humidity.

Here, the ITO film 170 remaining in the second open region 160 becomes a dummy pattern generated when the lift-open process is applied.

Hereinafter, the manufacturing method will be described in detail.

First, as shown in FIG. 6A, copper (Cu), aluminum (Al), and aluminum alloy having a low resistivity of 15 μΩcm ⁻¹ or less to prevent signal delay on the transparent and high dielectric breakdown substrate 110. AlNd: Aluminum Neodymium, Molybdenum (Mo), Chromium (Cr), Titanium (Ti), Tantalum (Ta) and Molybdenum-Tungsten (MoW) are deposited by sputtering and patterned by photolithography. A gate wiring (not shown) and a gate electrode 132 are formed in the active region, and a gate pad (not shown) and a conductive pattern 111 are formed in the pad portion region.

In this case, only the portion of the conductive pattern 111 that is exposed to the atmosphere is partially removed to form the first open region 111a. This is formed to be larger in size than the second open region to be formed in a later process, in order to prevent the conductive pattern from being exposed between the second open regions.

Next, as illustrated in FIG. 6B, silicon oxide (SiOx) or silicon nitride (SiNx), which is an inorganic insulating material having good insulation voltage characteristics, is formed on the entire surface including the gate electrode 132 by a plasma enhanced chemical vapor deposition method. By depositing, a gate insulating film 133 having a thickness of 2000 Å is formed.

Subsequently, amorphous silicon (a-Si: H) is deposited on the gate insulating layer 133 by a plasma chemical vapor deposition method using a mixed gas of SiH ₄ and H ₂ , and thereon, copper (Cu) and aluminum ( Al), aluminum alloy (AlNd: Aluminum Neodymium), molybdenum (Mo), chromium (Cr), titanium (Ti), tantalum (Ta), molybdenum-tungsten (MoW), etc. By collectively patterning by applying a diffraction exposure process using a tone mask, the semiconductor layer 134, data wirings (not shown), and source / drain electrodes 135a and 135b are formed in the active region, and the data is formed in the pad region. A pad (not shown) is formed.

In this case, the semiconductor layer 134 may be formed first, followed by depositing and patterning a metal layer thereon to form data lines, source / drain electrodes 135a and 135b, and a data pad. That is, the semiconductor layer 134 and the data wiring layer may be simultaneously formed by applying the diffraction exposure method as described above, but may be formed separately in different processes.

The stacked film of the gate electrode 132, the semiconductor layer 134, and the source / drain electrodes 135a and 135b in the active region constitutes a thin film transistor TFT.

Subsequently, an inorganic insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx) is deposited on the entire surface including the thin film transistor TFT to form the passivation layer 136.

Thereafter, as illustrated in FIG. 6C, the dry film resist 190 having a photosensitive characteristic on the passivation layer 136 may be formed by a spin method, a roll coating method, or the like. After laminating, a photomask having a predetermined pattern is disposed on the dry film resist 190, and then exposed to light, the dry film resist 190 is patterned through a developing process.

As illustrated in FIG. 6C, the second open region 160 may be formed by dry etching the gate insulating layer 133 and the protective layer 136 exposed between the patterned dry film resist 190. Form. Here, the second open area 160 is a path through which a stripper for lifting off the dry film resist penetrates in a later process. Therefore, in the photolithography process requiring a lift-off process, an open area of the insulating film is necessarily required.

In this case, the conductive pattern 111 is partially exposed through the second open region 160. The second open region 160 is formed inside the first open region 111a from which the conductive pattern is removed. So that the conductive pattern is not exposed. The opening of the pixel is opened to form the second open region 160 and to expose the drain electrode 135b of the active region.

Subsequently, the ITO film 170 is formed on the entire surface including the dry film resist 190. At this time, the ITO film 170 is deposited inside the second open region 160 from which the gate insulating film 133 and the protective film 136 are removed.

Then, as shown in FIG. 6E, the dry film resist 190 is lifted off using a basic solution such as NaHO as a stripper. At this time, the ITO film formed on the upper surface of the dry film resist 190 is simultaneously removed, and eventually the ITO film is patterned.

That is, the ITO film remaining in the opening of the pixel contacts the drain electrode 135b to become the pixel electrode 137, and the ITO film 170 contacting the conductive pattern 111 in the second open region 160 is a dummy pattern. Becomes In this case, the ITO film 170 remaining in the second open region 160 contacts the conductive pattern 111, and the ITO film 170 formed outside the sealant 150 contacts the conductive pattern 111. I never do that. This is because the conductive pattern formed outside the sealant is not exposed through the second open region.

In this manner, the gate insulating film and the protective film are patterned in one photolithography process using lift-off to form the second open region and the pixel electrode.

As described above, after the various patterns on the lower substrate 110 are formed, the sealant 150 is printed on the edge of the lower substrate 110 without fail, and the sealant 150 is formed on the portion where the conductive pattern is formed. ) Is printed. At this time, since the conductive pattern on the outside of the sealant is not exposed to the air and is covered by the insulating film, there is no fear of being transferred by high temperature and high humidity.

 Finally, although not shown, the liquid crystal display device is completed by printing silver dots on both ends of the conductive pattern of the lower substrate, and then laminating the upper substrate with the liquid crystal layer interposed therebetween.

The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and various substitutions, modifications, and changes are possible in the art without departing from the technical spirit of the present invention. It will be clear to those of ordinary knowledge.

The manufacturing method of the liquid crystal display device of the present invention as described above has the following effects.

By selectively removing the conductive pattern on the outside of the sealant to prevent the conductive pattern from being exposed between the insulating film open regions, the conductive pattern is exposed to the air to prevent it from being transferred under high temperature and high humidity.

As a result, the common voltage signal flows smoothly from the driving circuit portion to the common electrode, thereby enhancing the reliability of the device.

Claims (11)

Forming a gate wiring, a gate electrode, and a gate pad on the first substrate; Forming a conductive pattern formed at an edge of the first substrate and having a first open region in a portion thereof; Forming a semiconductor layer on the gate electrode with a gate insulating layer interposed therebetween; Forming data lines defining pixels at right angles to the gate lines, and simultaneously forming source / drain electrodes and data pads; Forming a protective film on the entire surface including the data line; Applying and patterning a dry film resist on the passivation layer; Forming a second open region by removing the gate insulating film and the protective film exposed between the dry film resists; Depositing a transparent conductive film on the entire surface including the dry film resist, and then lifting off the dry film resist to leave a transparent conductive film inside the second open area and to form a pixel electrode inside the pixel; And forming a sealant on the edge of the first substrate and then opposing the second substrate with the liquid crystal layer interposed therebetween. The method of claim 1, And the pixel electrode is formed to contact the drain electrode at a portion where the gate insulating film and the protective film are removed from the pixel. The method of claim 1, The transparent conductive film is formed of indium tin oxide (ITO) or indium zinc oxide (IZO). The method of claim 1, And the conductive pattern is formed simultaneously with the gate wiring or data wiring. The method of claim 1, The first open area is formed on the outside of the sealant is printed manufacturing method of the liquid crystal display device. The method of claim 1, The conductive pattern and the transparent conductive film are not connected through the second open area on the outside where the sealant is printed, and the conductive pattern and the transparent conductive film are connected through the second open area on the inside of the liquid crystal display device. Manufacturing method. The method of claim 1, And a second open area outside the sealant is formed inside the first open area. The method of claim 1, The transparent conductive film formed on the dry film resist penetrates the stripper for the dry film resist through a second open area and lift-off the liquid crystal display device. The method of claim 1, And forming a black matrix, a coli filter layer, and a common electrode on the second substrate. The method of claim 1, In the step of opposing the first and second substrates, And printing silver dots on both ends of the conductive pattern so that the conductive pattern is connected to a common electrode. The method of claim 1, And connecting the conductive pattern to a common voltage generator.

Images