KR20060000481A - Method for forming isolation layer of semiconductor device - Google Patents

Abstract

The present invention discloses a device isolation film forming method of a semiconductor device that can improve the reliability of the device. The disclosed method comprises the steps of providing a silicon substrate having active and field regions defined therein; Sequentially forming a pad oxide film and a pad nitride film exposing the field region on the silicon substrate; Etching a field region of the exposed substrate to form a trench; Forming a buried oxide film over the resulting substrate; Forming a device isolation film by CMPing the buried oxide film and the pad nitride film to a predetermined thickness; Removing an upper portion of the isolation layer to expose an upper corner of the trench; First rounding the upper corner of the trench by partially etching the substrate, the pad oxide layer, and the pad nitride layer adjacent to the upper corner of the trench; Removing the remaining pad nitride film; Performing an oxygen ion implantation process on the upper corner of the trench using the remaining pad oxide film as an ion implantation mask; And performing a oxidation process on the upper corner of the trench in which the oxygen ion implantation process is completed, to secondary round the upper corner of the trench.

Description

METHODS FOR FORMING ISOLATION LAYER OF SEMICONDUCTOR DEVICE

1A to 1C are cross-sectional views of processes for explaining a method of forming a device isolation film of a semiconductor device according to the related art.

2 is a cross-sectional view for explaining a problem according to the prior art.

3A to 3F are cross-sectional views illustrating processes of forming a device isolation film of a semiconductor device in accordance with an embodiment of the present invention.

Explanation of symbols on main parts of drawing

20 silicon substrate 21 pad oxide film

22: pad nitride film 23: trench

21a: patterned pad oxide film 22a: patterned pad nitride film

24: buried oxide film 25: N2 annealing process

24a: device separator 26: oxygen ion implantation process

B: rounding profile

The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method of forming a device isolation film of a semiconductor device for improving the reliability of the device.

With the progress of semiconductor technology, the speed and the high integration of semiconductor devices are progressing rapidly, and with this, the demand for refinement | miniaturization of a pattern and high precision of a pattern dimension is increasing. This requirement applies not only to patterns formed in device regions, but also to device isolation films that occupy a relatively large area. This is because the width of the device region must decrease in order to increase the width of the device region in the trend that the width of the device region is decreasing toward the highly integrated device.

Here, a conventional device isolation film has been formed by a LOCOS process, and the device isolation film by the LOCOS process, as is well known, has a bird's-beak having a beak shape at its edge portion. Since it is generated, there is a disadvantage in that a leakage current is generated while increasing the area of the device isolation film.

Therefore, instead of the method of forming a device isolation film by the LOCOS process, a method of forming a device isolation film using a shallow trench isolation (STI) process having a small width and excellent device isolation characteristics has been proposed. The device is an STI process to form a device isolation film.

1A to 1C are cross-sectional views illustrating processes of forming a device isolation film of a semiconductor device according to the related art.

A method of forming an isolation layer of a conventional semiconductor device to which the STI process is applied will be briefly described with reference to FIGS. 1A to 1C.                         

In the method of forming a device isolation film of a conventional semiconductor device, as shown in FIG. 1A, first, a pad oxide film 11 is formed on a silicon substrate 10 having an active region (not shown) and a field region (not shown). The pad nitride film 12 is formed in sequence. In this case, the pad oxide film 11 is formed to a thickness of 100 ~ 150Å, the pad nitride film 12 is formed to a thickness of 1500 ~ 2000Å.

Subsequently, as illustrated in FIG. 1B, the pad nitride film and the pad oxide film are patterned to expose the field region of the substrate 10. Next, the trench 13 is formed by etching the field region of the exposed substrate 10. In this case, reference numeral 11a, which is not described in FIG. 1A, shows a patterned pad oxide film, and 12a shows a patterned pad nitride film.

Then, although not shown in the figure, an oxidation process is carried out to round the top corner of the trench 13 to the surface of the trench 13. Here, the oxidation process is performed by the wet oxidation (wet oxidation) at a temperature of 1100 ℃ to form a sacrificial oxide (not shown) having a thickness of 200 Å.

Subsequently, as shown in FIG. 1C, a gap-fill oxide 14 is formed to fill the trench 13 over the entire substrate. In this case, the buried oxide film 14 is formed to a thickness of 5000 ~ 6000Å using a high density plasma (HDP) oxide film. Subsequently, an N2 annealing process 15 for densifying the buried oxide film 14 made of the HDP oxide film is performed. At this time, the N2 annealing process 15 is carried out for 30 minutes at a temperature of 1000 ℃.

Then, although not shown in the drawing, the buried oxide film is chemically mechanically polished (CMP) until the pad nitride film is exposed to form an isolation layer, and then the pad nitride film and the pad oxide film are formed. Remove

2 is a cross-sectional view illustrating a problem according to the prior art.

In the prior art, even if a wet oxidation process for rounding the upper corner of the trench is performed, the rounding effect thereof is not so large. As shown in FIG. 2, the upper corner portion of the trench 13 is sharp. You have one profile (A).

As a result, gate thinning occurs during subsequent gate oxide film formation, resulting in a hump phenomenon in the drain current and drain voltage characteristics of the transistor, and a power supply voltage Vcc required to operate the device may be applied to the gate. When the electric field concentration effect is generated in which the size of the electric field is selectively increased in the upper corner portion of the trench 13, leakage current is increased to deteriorate the gate oxide integrity (GOI) characteristic of the device. This causes a problem that the reliability of the device is lowered.

Accordingly, the present invention has been made to solve the above problems, by improving the rounding profile of the upper corner of the trench, to provide a device isolation film forming method of a semiconductor device that can improve the GOI characteristics and reliability of the device. The purpose is.

According to an aspect of the present invention, there is provided a method of forming an isolation layer of a semiconductor device, the method including: providing a silicon substrate having active and field regions defined therein; Sequentially forming a pad oxide film and a pad nitride film exposing the field region on the silicon substrate; Etching a field region of the exposed substrate to form a trench; Forming a buried oxide film over the resulting substrate; Forming a device isolation film by CMPing the buried oxide film and the pad nitride film to a predetermined thickness; Removing an upper portion of the isolation layer to expose an upper corner of the trench; First rounding the upper corner of the trench by partially etching the substrate, the pad oxide layer, and the pad nitride layer adjacent to the upper corner of the trench; Removing the remaining pad nitride film; Performing an oxygen ion implantation process on the upper corner of the trench using the remaining pad oxide film as an ion implantation mask; And performing a oxidation process on the upper corner of the trench in which the oxygen ion implantation process is completed, to secondary round the upper corner of the trench.

Here, the step of removing the upper portion of the device isolation film, using a HF solution to remove by a thickness of 100 ~ 150Å. In addition, the first rounding process is performed by etching for 10 minutes at a temperature of 80 ℃ using the SC-1 (NH4OH / H2O2 / H20) solution as an etching solution. In addition, the oxygen ion implantation step is performed using a dose of 3E15 ion / cm 2 and an energy of 30 KeV using O 2 as an ion implantation source.                     

(Example)

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

3A to 3F are cross-sectional views illustrating processes of forming a device isolation film of a semiconductor device according to an exemplary embodiment of the present invention.

In the method of forming an isolation layer of a semiconductor device according to an embodiment of the present invention, as shown in FIG. 3A, first, a pad is formed on a silicon substrate 20 in which an active region (not shown) and a field region (not shown) are defined. The oxide film 21 and the pad nitride film 22 are sequentially formed. In this case, the pad oxide film 21 is formed to a thickness of 100 ~ 150Å, the pad nitride film 22 is formed to a thickness of 1500 ~ 2000Å.

Subsequently, as shown in FIG. 3B, the pad nitride film and the pad oxide film are patterned to expose the field region of the substrate 20. Thereafter, the field region of the exposed substrate 20 is etched to form a trench 23 having a predetermined depth. In this case, reference numeral 21a, which is not described in FIG. 3B, shows a patterned pad oxide film and 22a shows a patterned pad nitride film, respectively.

Next, as shown in FIG. 3C, a buried oxide film 24 is formed to bury the trench 23 in the entire surface of the resultant substrate. In this case, the buried oxide film 24 is formed to a thickness of 5000 ~ 6000Å by using an HDP oxide film.

Next, an N2 annealing process 25 for densifying the buried oxide film 24 made of the HDP oxide film is performed. At this time, the N2 annealing process 25 is carried out for 30 minutes at a temperature of 1000 ℃.

Then, as shown in FIG. 3D, the buried oxide film and the patterned pad nitride film 22a are CMP formed to a predetermined thickness to form the device isolation film 24a.

Next, as shown in FIG. 3E, the upper portion of the device isolation layer 24a is removed to expose the upper corner of the trench 23. Here, when removing the upper portion of the device isolation layer 24a using a HF solution to remove by a thickness of 100 ~ 150Å.

Subsequently, the substrate 20 adjacent to the upper corner of the trench 23, the pad oxide layer 21, and the pad nitride layer are partially etched to first round the upper corner of the trench 23. Here, the first rounding process is performed by etching for 10 minutes at a temperature of 80 ℃ using an SC-1 (NH 4 OH / H 2 O 2 / H 20) solution as an etching solution.

Then, after removing the remaining pad nitride film using a phosphoric acid solution, an oxygen ion implantation step 26 is performed at the upper corner of the trench 23 using the remaining pad oxide film 21a as an ion implantation mask. do. In this case, the oxygen ion implantation step 26 is performed using a dose of 3E15 ions / cm 2 and an energy of 30 KeV using O 2 as an ion implantation source.

On the other hand, the oxygen ion implantation process 26 serves to maximize the rounding effect of the upper corner of the trench 23 by the wet oxidation process to be performed later.

Thereafter, as illustrated in FIG. 3F, an oxidation process (not shown) is performed at the upper corner of the trench 23 in which the oxygen ion implantation is completed, to round the upper corner of the trench 23. Here, the oxidation process is performed by the wet oxidation process using H2 and O2 at a temperature of 1100 ℃ to form a sacrificial oxide film (not shown) having a thickness of 200Å.

In this way, the final rounding profile B of the upper corner of the trench 23 is improved compared to the conventional one, so that a gate thinning phenomenon can be prevented from occurring when forming a subsequent gate oxide film.

As described above, according to the present invention, after forming the device isolation layer in the trench, and removing a portion of the upper portion of the device isolation layer to expose the upper corner of the trench, and then etching the substrate corresponding to the upper corner of the exposed trench, By sequentially performing the oxygen ion implantation and the oxidation process, the rounding profile of the trench upper corner can be improved as compared with the conventional one.

Therefore, the gate thinning phenomenon can be prevented from occurring when the subsequent gate oxide film is formed, so that the GOI characteristics of the device can be improved, thereby improving the reliability of the device.

Claims (4)

Providing a silicon substrate in which an active region and a field region are defined; Sequentially forming a pad oxide film and a pad nitride film exposing the field region on the silicon substrate; Etching a field region of the exposed substrate to form a trench; Forming a buried oxide film over the resulting substrate; Forming a device isolation film by CMPing the buried oxide film and the pad nitride film to a predetermined thickness; Removing an upper portion of the isolation layer to expose an upper corner of the trench; First rounding the upper corner of the trench by partially etching the substrate, the pad oxide layer, and the pad nitride layer adjacent to the upper corner of the trench; Removing the remaining pad nitride film; Performing an oxygen ion implantation process on the upper corner of the trench using the remaining pad oxide film as an ion implantation mask; And And performing a second rounding of the upper corner of the trench by performing an oxidation process on the upper corner of the trench in which the oxygen ion implantation process is completed. The method of claim 1, wherein the removing of the upper portion of the device isolation layer comprises removing the upper portion of the device isolation layer by a thickness of about 100 to about 150 microns using an HF solution. The device of claim 1, wherein the first rounding process is performed by etching at a temperature of 80 ° C. for 10 minutes using an SC-1 (NH 4 OH / H 2 O 2 / H 20) solution as an etching solution. Separator Formation Method. The method of claim 1, wherein the oxygen ion implantation step is performed using a dose of 3E15 ions / cm 2 and an energy of 30 KeV using O 2 as an ion implantation source.

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