KR20060000375A - Apparatus for processing a semi-conductor substrate - Google Patents

Abstract

In the semiconductor substrate processing apparatus including the identification unit, the lot number formed in the flat zone of the semiconductor substrate is identified by the identification unit disposed adjacent to the flat zone aligner. The identified lot number is provided to the control unit to determine the suitability of this machining process. When a semiconductor substrate that is not suitable for the present machining process is loaded into the flat zone aligner, the control unit temporarily pauses the semiconductor substrate machining process to prevent process accidents. Therefore, the economic time loss due to the semiconductor substrate loading accident can be greatly reduced, and the production yield can also be maximized.

Description

Semiconductor substrate processing equipment {APPARATUS FOR PROCESSING A SEMI-CONDUCTOR SUBSTRATE}

1 is a schematic diagram illustrating a semiconductor substrate processing apparatus according to an embodiment of the present invention.

FIG. 2 is a schematic perspective view for explaining the identification unit shown in FIG. 1.

<Explanation of symbols for the main parts of the drawings>

100: semiconductor manufacturing apparatus 101: process chamber unit

110: process chamber 112: chuck

121: first load lock chamber 122: second load lock chamber

130: Flat zone aligner 140: Identification unit

151: first gate 152: second gate

153: Third gate 154: Fourth gate

161: first cassette 162: second cassette

171: First robot arm 172: Second robot arm

180: control unit F: flat zone

L: Lot number W: Semiconductor board

The present invention relates to a semiconductor substrate processing apparatus. More particularly, the present invention relates to a semiconductor substrate processing apparatus for performing a semiconductor substrate processing process in a lot unit.

Current research on semiconductor devices is progressing toward high integration and high performance in order to process more data in a short time. In general, a semiconductor device is manufactured through processing processes such as photolithography, etching, deposition, diffusion, ion implantation, and metal deposition on a semiconductor substrate.

The semiconductor substrates are managed by a certain number of sheets until they are manufactured into semiconductor devices through the above processing processes. In more detail, the semiconductor substrates are stored in a lot box accommodating 25 sheets and moved to a processing apparatus. The semiconductor substrates are processed in a lot unit of 25 sheets in a processing apparatus.

The lot box consists of a carrier box, a cassette, and a cover. 25 slots are formed in the cassette, and a semiconductor substrate is disposed on each slot. The cassette into which the semiconductor substrates are inserted is accommodated in a carrier box. The cover is coupled over the carrier box to cover the opening of the carrier box, protecting the semiconductor substrates from external contamination.

The semiconductor substrates are accommodated in the lot box and moved to the processing apparatus, and then separated from the lot box while inserted in the cassette. Thereafter, the semiconductor substrates are loaded into the processing apparatus while being inserted into the cassette. After all the processing processes for the lot of semiconductor substrates are completed, the semiconductor substrates are unloaded from the processing apparatus while being inserted into the cassette. The semiconductor substrates are inserted into the lot box and inserted into the cassette and then transferred to the processing apparatus for performing the next processing process. In this case, the same unique lot number is marked on the lot box and the semiconductor substrates accommodated in the lot box.

The semiconductor substrates stored in the lot box are tracked by the lot number marked on the lot box. However, accidents often occur in actual production sites where one semiconductor substrate or a plurality of semiconductor substrates is accommodated in a lot box of a different lot number. For example, in the case of separating the cassette from the lot box, loading the cassette into the processing apparatus, unloading the cassette from the processing apparatus, and putting the cassette back into the lot box, one semiconductor may be caused by an operator error. Substrates or multiple semiconductor substrates are housed in lot boxes of different lot numbers.

The semiconductor substrate processing process is managed as a lot number marked on a lot box. Therefore, when a semiconductor substrate of a lot number different from the lot number of the lot box is inserted into the lot box, the semiconductor substrate may be put into an incorrect processing process. In order to prevent this, the lot number of the semiconductor substrate inserted into the cassette and the lot number of the lot box should be checked before loading the cassette into the processing apparatus, but it is not well observed in actual production sites.

Currently, the cost of semiconductor substrates continues to increase with the trend of large diameter, and the price of semiconductor substrates formed up to semiconductor devices is quite high. If the expensive semiconductor substrate is put into the wrong processing process, significant financial and time loss occurs. In addition, in view of the current trend of research into semiconductor devices in the direction of high integration and high performance, it is emerging as a problem that must be solved.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems of the prior art, and an object of the present invention is to provide a semiconductor substrate processing apparatus capable of identifying a loaded semiconductor substrate and performing an accurate processing process.

In order to achieve the above object of the present invention, a semiconductor substrate processing apparatus according to a preferred embodiment of the present invention, the flat zone aligner for aligning the semiconductor substrate, the lot number of the semiconductor substrate loaded on the flat zone aligner An identification unit, a load lock chamber receiving a semiconductor substrate aligned from a flat zone aligner, a process chamber unit receiving the aligned semiconductor substrate from a load lock chamber and performing a semiconductor substrate processing process, and an identification unit And a control unit for controlling the semiconductor substrate processing process according to the lot number. In this case, the lot number is represented by numerals, English letters, barcodes, and a combination thereof, and the identification unit includes a CCD camera or a barcode scanner capable of character recognition.

Hereinafter, a semiconductor substrate processing apparatus according to exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings, but the present invention is not limited or limited by the following examples.

FIG. 1 is a schematic diagram illustrating a semiconductor substrate processing apparatus according to an embodiment of the present invention, and FIG. 2 is a schematic perspective view illustrating the identification unit illustrated in FIG. 1.

First, referring to FIG. 1, the semiconductor manufacturing apparatus 100 may include a process chamber unit 101, a first load lock chamber 121, a second load lock chamber 122, a flat zone aligner 130, and an identification unit ( 140, and control unit 180.

The first load lock chamber 121 is connected to one side of the process chamber unit 101, and the second load lock chamber 122 is connected to the other side of the process chamber unit 101. A first gate 151 is installed between the first load lock chamber 121 and the process chamber unit 101, and a second gate 152 between the second load lock chamber 122 and the process chamber unit 101. Is installed.

The first cassette 161 is disposed adjacent to the first load lock chamber 121, and the second cassette 162 is disposed adjacent to the second load lock chamber 122. In this case, the distance between the first load lock chamber 121 and the first cassette 161 is wider than the distance between the second load lock chamber 122 and the second cassette 162.

The flat zone aligner 130 is disposed between the first load lock chamber 121 and the first cassette 161. The identification unit 140 is disposed on the semiconductor substrate W loaded on the flat zone aligner 130.

The control unit 180 is connected to the process chamber unit 101, the first load lock chamber 121, the second load lock chamber 122, the flat zone aligner 130, and the identification unit 140. Although FIG. 1 shows that the control unit 180 is connected only to the first load lock chamber 121, in practice, the control unit 180 is connected to the process chamber unit 101 and the second through the first load lock chamber 121. Connected to the load lock chamber 122.

In addition, a third gate 153 is installed at one side of the first load lock chamber 121 adjacent to the flat zone aligner 130 and the second load lock chamber 122 adjacent to the second cassette 162. One side is provided with a fourth gate 154.

The process chamber unit 101 includes a process chamber 110 and a chuck 112. The process chamber 110 defines a space for processing the semiconductor substrate W. FIG. The chuck 112 for supporting the semiconductor substrate W is disposed in the process chamber 110. The semiconductor substrate processing process is performed in the process chamber 110. In the semiconductor substrate processing process, various semiconductor substrate processing processes such as deposition, etching, exposure, ashing, ion implantation, and metal deposition may be performed. The process chamber 110 receives the semiconductor substrate W from the first load lock chamber 121.

A first robot arm 171 is provided in the first load lock chamber 121 to receive the semiconductor substrate W from the flat zone aligner 130 and provide the semiconductor substrate W to the process chamber 110. A second robot arm 172 is installed inside the second load lock chamber 122 to hold the semiconductor substrate W in the process chamber 110 and to insert the semiconductor wafer W into the second cassette 162.

The first robot arm 171 exits the first load lock chamber 121 through the third gate 153 to grip the semiconductor substrate W disposed on the flat zone aligner 130. The first robot arm 171 holding the semiconductor substrate W returns to the outside of the first load lock chamber 121. When the inside of the first load lock chamber 121 is formed in a vacuum, the first gate 151 is opened, and the first robot arm 171 provides the semiconductor substrate W into the process chamber 110. The semiconductor substrate W is processed in the process chamber 110. In this case, the inside of the process chamber 110 is maintained in a high vacuum state to improve process accuracy.

When the processing is completed, the second robot arm 172 enters the process chamber 110 through the second gate 152 to carry out the semiconductor substrate W in the process chamber 110. The second robot arm 172 holding the semiconductor substrate W returns to the outside of the second load lock chamber 122. In this case, the inside of the second load lock chamber 122 is in a vacuum state. When the fourth gate 154 is opened, the second robot arm 172 inserts the semiconductor substrate W into the second cassette 162.

The semiconductor substrate processing process performed in the process chamber unit 101 is performed in a lot unit. The lot unit means the number of semiconductor substrates W accommodated in one lot box. Generally, 25 semiconductor substrates W are accommodated in one lot box, and in this embodiment, 25 semiconductor substrates W are defined in a lot unit.

In order to process the semiconductor substrate W of one lot unit, first, the cassette 161 stored in the said lot box is arrange | positioned adjacent to the flat zone aligner 130. FIG. The semiconductor substrates W stored in the cassette 161 are moved to the flat zone aligner 130 one by one and aligned. In this case, the semiconductor substrate W is aligned with respect to the flat zone F in the flat zone aligner 130. When the alignment of the semiconductor substrate W is completed, the flat zone F of the aligned semiconductor substrate W is positioned below the flat zone aligner 130.

The flat zone F is formed based on the crystal structure of the semiconductor substrate W in order to distinguish the structure of the semiconductor substrate. In the flat zone F, one scribe line passes in the vertical direction and the other scribe line passes in the horizontal direction. The scribe line is a cutting line for cutting the semiconductor substrate W into an area without a unit or a circuit.

In the flat zone F, a lot number L for identifying the semiconductor substrate W is displayed. The lot number (L) is preferably represented by numbers, alphabets, bar codes, and combinations thereof. When the lot number L is input to a process control device (not shown), information on the semiconductor substrate W can be confirmed. The information includes specifications of the semiconductor substrate W, a list of processes performed on the semiconductor substrate W to date, a list of processes to be performed on the semiconductor substrate W, and the like.

The semiconductor substrate W should be housed in a lot box (not shown) having the same lot number L as the lot number L indicated on itself. However, as described above in the prior art, an accident in which the semiconductor substrate W is accommodated in a lot box (not shown) having a different lot number L often occurs. In the present invention, the accident is prevented by using the identification unit 140.

Referring to FIG. 2, the identification unit 140 is installed adjacent to the flat zone aligner 130 positioned above the flat zone F of the aligned semiconductor substrate W. As shown in FIG. The identification unit 140 is substantially irrelevant to any position as long as it is easy to recognize the lot number L displayed on the flat zone F of the semiconductor substrate W. As shown in FIG. Preferably, the identification unit 140 is arranged side by side with the flat zone aligner 130, is arranged on the same straight line, or is disposed above the flat zone aligner 130.

The identification unit 140 preferably comprises a camera, a barcode scanner or a reader in combination to identify the lot number L. For example, when the lot number L is a number, an English letter, or a combination thereof, the CCD camera with a character recognition function is selected. If the lot number (L) is a barcode, select the barcode scanner. The identification unit 140 should select corresponding to the type of the lot number L, which is too obvious to those skilled in the art.

The lot number L identified from the identification unit 140 is encoded and passed to the control unit 180. In the control unit 180, process information to be performed in the process chamber unit 101 is stored in advance. The control unit 180 determines whether the process information to be performed on the identified semiconductor substrate W matches the previously stored process information. When the identified semiconductor substrate W is inconsistent with previously stored process information, the semiconductor manufacturing apparatus 100 is paused.

Process information to be processed in the process chamber unit 101 is set based on the lot number of the lot box in which the semiconductor substrate W is stored. Therefore, according to the present exemplary embodiment, it is possible to automatically determine whether the lot number L displayed on the semiconductor substrate W matches the lot number of the lot box in which the semiconductor substrate W is stored. It is also possible to automatically check whether the semiconductor substrate W is stored incorrectly in a lot box having a different lot number.

The semiconductor substrate W identified as being suitable for the process is moved into the first load lock chamber 121 by the first robot arm 171. When the inside of the first load lock chamber 121 is formed in a vacuum, the first gate 151 is opened, and the first robot arm 171 provides the semiconductor substrate W into the process chamber 110. The semiconductor substrate W is processed in the process chamber 110 in a high vacuum state and then transported into the second load lock chamber 122 by the second robot arm 172. When the second gate 152 is closed and the fourth gate 154 is opened, the vacuum in the second load lock chamber 122 is released. The semiconductor substrate W is again carried out to the second load lock chamber 122 by the second robot arm 172 and inserted into the second cassette 162. As a result, one processing process for one semiconductor substrate W is completed, and the processing for the semiconductor substrates W for one lot is performed in the order as described above.

In this embodiment, the flat zone aligner 130 and the identification unit 140 are installed outside the first load lock chamber 121. However, in further development, the identification unit 140 or the flat zone aligner 130 including the identification unit 140 may be installed in the first load lock chamber 121. When both the flat zone aligner 130 and the identification unit 140 are installed in the first load lock chamber 121, the number of vacuum compositions of the first load lock chamber 121 may be reduced.

According to the present embodiment, by checking the lot number of the semiconductor substrate W before performing the machining process, it is possible to prevent the semiconductor substrate W from being incorrectly loaded into the process chamber unit 101.

According to the present invention, accidental loading of the semiconductor substrate into the process chamber unit can be prevented, thereby greatly reducing economic and time losses. As a result, the efficiency and production yield of the process can be greatly improved, and the error rate in subsequent processes can also be drastically reduced.

As described above, although described with reference to preferred embodiments of the present invention, those skilled in the art will be variously modified and modified within the scope of the present invention without departing from the spirit and scope of the present invention described in the claims below. It will be appreciated that it can be changed.

Claims (6)

A flat zone aligner for aligning the semiconductor substrate; An identification unit disposed adjacent to the flat zone aligner and identifying a lot number of a semiconductor substrate loaded in the flat zone aligner; A load lock chamber provided with the semiconductor substrate aligned from the flat zone aligner; A process chamber unit receiving the aligned semiconductor substrate from the load lock chamber and performing a semiconductor substrate processing process; And And a control unit for controlling the semiconductor substrate processing step in accordance with the lot number identified from the identification unit. The semiconductor substrate processing apparatus according to claim 1, wherein the lot number is displayed adjacent to a flat zone of the semiconductor substrate. The semiconductor substrate processing apparatus of claim 1, wherein the lot number is represented by a number, an English letter, or a combination of numbers and an English letter. The semiconductor substrate processing apparatus of claim 1, wherein the identification unit comprises a CCD camera. The semiconductor substrate processing apparatus of claim 1, wherein the lot number is represented by a barcode. 6. The apparatus of claim 5, wherein the identification unit comprises a barcode scanner.

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