KR20050096748A - Fabrication method of liquid crystal display device using atmospheric plasma - Google Patents

Abstract

The present invention relates to a method for manufacturing a liquid crystal display device using an atmospheric pressure plasma device, and more particularly, to a liquid crystal display by applying an atmospheric pressure plasma device while preventing the active layer of the thin film transistor from being damaged by the atmospheric pressure plasma device during the manufacturing process of the liquid crystal display device. It aims at manufacturing an element. The present invention further forms an anti-essing thin film on the conductive layer for forming the source and drain electrodes, and the anti-ashing thin film and the conductive layer in the ashing process of the photoresist to prevent damage to the active layer by ashing and to the anti-ashing thin film Since the source and drain electrodes are patterned, a liquid crystal display device can be manufactured without damaging the active layer while easily performing an ashing process and an etching process using an atmospheric pressure plasma apparatus.

Description

Method for manufacturing liquid crystal display device using atmospheric pressure plasma {FABRICATION METHOD OF LIQUID CRYSTAL DISPLAY DEVICE USING ATMOSPHERIC PLASMA}

The present invention relates to a method for manufacturing a liquid crystal display device, and more particularly, to a method for manufacturing a liquid crystal display device using an atmospheric pressure plasma (AP plasma).

A liquid crystal display device is a switching element, a TFT array substrate in which thin film transistors (TFTs) are formed for each unit pixel, and a color filter for displaying an image in color while facing the TFT array substrate. And a liquid crystal layer filled between the filter substrate and the TFT array substrate and the color filter substrate.

The M array lines are formed in the TFT array substrate in parallel with each other, and N data lines perpendicular to the gate lines are formed, and M x N unit pixels are defined by the intersection of the gate lines and the data lines.

Each of the unit pixels is a thin film transistor (TFT) formed as a switching element for driving the unit pixel for each unit pixel, and each TFT is formed at an intersection point of the gate line and the data line.

The TFT is composed of a plurality of thin films, and the manufacturing process of the TFT array substrate mainly consists of forming the TFT.

Hereinafter, a manufacturing process of a TFT formed for each unit pixel of a TFT array substrate will be described with reference to FIGS. 1A to 1G.

Usually, a TFT array substrate uses a transparent material such as glass. As shown in FIG. 1A, a plurality of gate electrodes 102 are formed on a flat plate such as glass. In the gate line forming process, a metal film such as an aluminum alloy is formed on the substrate 101, and then a predetermined gate line pattern is formed by applying a photolithography process. A gate electrode is formed on the gate line by branching.

After the gate electrode 102 is formed, a gate insulating layer 103 composed of a silicon oxide film or a silicon nitride film on the gate electrode 102 and a semiconductor layer composed of amorphous silicon (as shown in FIG. 1B) 104, the ohmic contact layer 105 which is a high concentration impurity layer for ohmic contact of the source and drain electrodes and the active layer, and the conductive layer 106 forming the source and drain electrodes are formed in succession. The gate insulating layer 103, the semiconductor layer and the ohmic contact layer 105 may be formed by a plasma enhanced chemical vapor deposition (PECVD) method, and the conductive layer 106 may be formed by a sputtering method. Can be formed.

Subsequently, as shown in FIG. 1C, a photoresist is applied on the conductive layer 106 and exposed using a diffraction mask (not shown) so that the channel region of the thin film transistor is relatively thinner than the remaining region. The resist pattern 107 is formed. The active region of the thin film transistor is defined by the photoresist pattern 107.

Although not shown in the drawing, the photoresist pattern 107 is formed through a photoresist coating process, an exposure process, and a developing process.

Next, as shown in FIG. 1D, the conductive layer 106, the ohmic contact layer 105, and the semiconductor layer 104 are etched by applying the diffracted photoresist pattern 107 as a mask to form a thin film transistor. An active layer including a channel is defined.

Subsequently, a part of the photoresist pattern 107 formed on the conductive layer 106 is removed through an ashing process. The ashing process is a process of removing the photoresist by oxidizing a gas containing an oxygen active species and the photoresist of the organic film component. The photoresist diffracted and exposed on the channel region is removed through the ashing process and the channel region is removed. Of conductive layer 106 is exposed (FIG. 1E).

The source and drain electrodes 106a and 106b are formed by removing the conductive layer 106 and the ohmic contact layer 105 on the channel region by applying the ashed photoresist pattern 107a as a mask. The conductive layer 106 may be removed by applying wet etching, and the ohmic contact layer 105 may be effectively removed by applying dry etching.

As a result, as shown in FIG. 1F, the source and drain electrodes 106a and 106b are formed and the active layer is exposed in the spaced apart region of the source and drain electrodes, that is, the channel region 120. The conductive layer and the ohmic contact layer of the channel region 120 are removed to electrically separate the source and drain electrodes.

After the source and drain electrodes 106a and 106b are formed, the photoresist pattern 107a remaining on the source and drain electrodes is removed by applying a photoresist strip process.

Subsequently, a protective layer 108 formed of a silicon nitride film or a silicon oxide film is formed on the source and drain electrodes 106a and 106b, and a contact hole is formed in the protective layer 108 on the drain electrode 106b. An electrode 109 is formed to complete the liquid crystal display device.

The above process describes the process of applying four masks in the process of forming a thin film transistor of a liquid crystal display device. In the process, a plurality of thin film forming processes are performed through a photoresist coating process, exposure, development, and stripping process of the photoresist. In particular, in the process of removing the photoresist remaining on the source and drain electrodes, the active layer is damaged by the photoresist stripper.

In addition, the process of ashing the photoresist during the photoresist pattern forming process is performed in an ashing chamber composed of a vacuum and has a separate chamber for ashing. Therefore, the manufacturing process of the liquid crystal display device using the ashing chamber is delayed. It is the cause.

Accordingly, an object of the present invention is to manufacture a liquid crystal display device by using an atmospheric pressure plasma technique capable of an ashing process, a cleaning and a surface treatment process in an atmosphere of low temperature and atmospheric pressure. In addition, an atmospheric pressure plasma apparatus is used for the ashing of the photoresist used in the liquid crystal display device manufacturing process. In particular, an object of the present invention is to manufacture a liquid crystal display device while preventing the active layer from being damaged by plasma when ashing by the atmospheric pressure plasma device.

In order to achieve the above object, a method of manufacturing a liquid crystal display device according to the present invention includes forming a gate electrode on a substrate, and successively forming a first insulating layer, a semiconductor layer, an ohmic contact layer, a conductive layer, and an ashing blocking layer on the gate electrode. Forming a photoresist pattern on the ashing blocking layer by diffraction exposure; Defining an active region by applying the photoresist pattern, ashing the photoresist pattern, applying the ashed photoresist pattern as a mask, and removing the ashing blocking layer on an upper portion of the channel region; Removing the plasma layer; applying the ash blocking layer as a mask; removing the conductive layer on the channel region to form source and drain electrodes; removing the ash blocking layer and the ohmic contact layer on the channel region. And forming a passivation layer on the source and drain electrodes, and forming a pixel electrode on the passivation layer.

In the manufacturing process of the liquid crystal display device, a plurality of thin film forming processes are performed. The thin film forming process requires a mask process using a photoresist and a photoresist strip process of removing the photoresist. However, the stripper applied to the photoresist strip process is not only harmful to the environment but also expensive, and causes a problem that the active layer of the thin film transistor is damaged by the photoresist stripper. In addition, when the ashing process is applied to remove the photoresist, a separate chamber for ashing is required.

In order to solve the above problems, an atmospheric pressure plasma apparatus capable of generating plasma at room temperature has been developed to effectively remove photoresist from a substrate.

Atmospheric plasma (AP plasma) is a method that can generate a plasma at room temperature by a method such as glow discharge (arc discharge) or arc discharge (arc discharge).

The principle of the AP plasma is to apply a voltage of about several hundred volts at both ends of the electrode to collide the cations in the plasma to the electrode of the electrode, and the secondary electrons generated at this time is accelerated by an electric field applied from the outside and the neutral gas and A series of processes that collide to form ions instantaneously repeat, generating an avalanche to generate plasma.

The atmospheric pressure plasma has the advantage of being able to form a plasma at a relatively low temperature at a relatively low temperature compared to the conventional plasma equipment, the process of ashing the photoresist, the process of cleaning the substrate, the surface treatment and etching of the substrate (etch) process can be applied.

The atmospheric pressure plasma technology has a concentration of reactive active species of 100 to 1000 times higher than that of a conventional vacuum plasma, and the plasma generation temperature is low to room temperature to 150 ° C., particularly in the manufacturing process of a liquid crystal display device using glass as a substrate. useful.

Hereinafter, a remote type atmospheric pressure plasma processing device which is one type of the atmospheric pressure plasma generating device will be described with reference to FIG. 2.

As shown in FIG. 2, the remote atmospheric pressure plasma processing apparatus includes a chamber 201 having a gas inlet opening 209, and first and second plates 203 formed to face each other in the left and right directions in the chamber 201. 204, an RF power source 206 for generating RF to apply RF to the first plate 203, and a reaction gas or an atmosphere gas through the gas inlet opening 209 of the chamber 201. The gas supply part 207 and the filter 208 which filter the reaction gas or atmospheric gas supplied from the said gas supply part 207 to the chamber 201 are comprised. Here, the second plate 204 is grounded.

As described above, the operation of the configured remote atmospheric plasma processing apparatus is as follows.

In the remote atmospheric pressure plasma processing apparatus, when RF is applied to the first plate 203, a glow plasma is generated between the first and second plates 203 and 204. In addition, surface treatment due to the glow plasma occurs on the substrate 200 disposed below the chamber 201 in a direction perpendicular to the second plates 203 and 204.

The substrate 200 is transferred by the transfer device 202, which is processed in-line.

In the remote atmospheric plasma processing apparatus, the first and second plates 203 and 204 are positioned in a direction perpendicular to the substrate, and the substrate 200 is located outside the chamber 201 and moves inline. An ashing and surface treatment are performed on the substrate 200 outside the chamber 201. Accordingly, since ashing and surface treatment are performed on the substrate 200 outside the chamber 201, gases that come out of the glow plasma state through a predetermined outlet react with the substrate 200 without requiring a separate exhaust system. At the same time, substances other than the reaction are forced out.

However, when the above-described four-mask liquid crystal display device manufacturing process is performed by applying the atmospheric pressure plasma apparatus, there is a problem in that the active layer is exposed to plasma gas and damaged in the ashing process. An ashing process using an atmospheric plasma requires a relatively long time (tens of tens to hundreds of seconds), in which the active layer is damaged by the plasma.

Therefore, the present invention proposes a method for manufacturing a liquid crystal display device by applying an atmospheric pressure plasma apparatus, while manufacturing a liquid crystal display device without damaging the active layer by the atmospheric pressure plasma.

Hereinafter, a method of manufacturing a liquid crystal display device using an atmospheric pressure plasma according to an embodiment of the present invention will be described with reference to FIGS. 3A to 3F.

As shown in FIG. 3A, a metal thin film made of aluminum alloy or molybdenum (Mo) is formed on the transparent substrate 301 made of glass by sputtering. Subsequently, a photoresist is applied on the metal thin film and a mask process is performed.

The mask process is a process of arranging a mask including a predetermined pattern on the photosensitive film and forming a predetermined photosensitive film pattern through an exposure process and a developing process.

A photoresist pattern is formed on the substrate 301 through the mask process, and the gate electrode 302 is formed by applying the photoresist pattern as an etching mask. That is, the gate electrode 302 is formed by applying the photoresist pattern as a mask and etching the metal thin film formed on the substrate through wet or dry etching.

After the gate electrode 302 is formed on the substrate 301, as shown in FIG. 3B, the first insulating layer 303, the semiconductor layer 304, and the ohmic contact layer 305 are formed on the gate electrode 302. ), The conductive layer 306 and the ashing blocking film 307 are successively formed.

The first insulating layer 303 is for electrically separating the gate electrode from the upper thin film. The first insulating layer 303 may be formed of a silicon nitride film or a silicon oxide film and may have a thickness of several thousand micrometers. The first insulating layer 303 may be formed by a chemical vapor deposition method (CVD) or a plasma chemical vapor deposition method (PECVD).

The semiconductor layer 304 may be formed of an amorphous silicon layer by PECVD, and may be formed to a thickness of several hundreds of microseconds. The semiconductor layer 304 will form an active layer of a thin film transistor in the future.

The ohmic contact layer 305 may be formed by injecting a high concentration of impurity ions into the semiconductor layer, and separately depositing the semiconductor layer on the semiconductor layer 304 by PECVD in an atmosphere containing high concentration of impurities. It may be. The nature of the ohmic contact layer 305 is a semiconductor layer implanted with a high concentration of impurities. When the source and drain electrodes are in direct contact with a semiconductor layer made of amorphous silicon, no ohmic contact is made, so that leakage current and reverse current are generated. It is a means to prevent doing.

 The conductive layer 306 may be formed of a conductive metal layer, or may be formed of a metallized silicon layer by implanting a high concentration of impurities. The conductive layer 306 is later patterned to form source and drain electrodes, and is formed on the ohmic contact layer 305 through a sputtering method.

The ash blocking layer 307 is formed on the conductive layer 306 and serves as a mask for patterning the source and drain electrodes. The ash blocking layer 307 may be formed of an inorganic film such as a silicon nitride film or a silicon oxide film, and may be formed of an indium tin oxide (ITO) film. In addition, the ash blocking layer 307 may be configured to 500 kW or less.

The ash blocking layer 307 is not limited to an inorganic film and an ITO film, and may be any thin film having a selective etching ratio with the conductive layer 306.

Next, a photosensitive film is coated on the ashing blocking film 307 and a photomask process is performed by applying a diffraction mask (not shown). As a result of the photo masking process, a stepped photoresist pattern 310 having a thinner photoresist layer is formed on the ashing blocking layer 307 compared to other regions. As shown in FIG. 3B, the stepped photoresist region defines a channel region 320.

Subsequently, the diffractive photoresist pattern 310 is applied as a mask to continuously etch the ashing blocking layer 307, the conductive layer 306, the ohmic contact layer 305, and the semiconductor layer 304 to define an active region. do. The result can be confirmed through FIG. 3C.

Subsequently, the slit exposed photoresist layer pattern 310 is ashed by an atmospheric pressure plasma apparatus to completely remove the photoresist layer formed on the channel region 320. When the atmospheric pressure plasma apparatus is applied to the manufacturing of the liquid crystal display device formed on the large glass substrate, the ashing process can be easily performed through the atmospheric pressure plasma apparatus in the atmosphere of normal temperature and normal pressure, and the substrate is transferred through the conveyor belt. The ashing process can be performed continuously on the enteric substrate, which is excellent in productivity.

As a result of ashing the slit exposed photoresist pattern 310, an ashing blocking layer 307 of the channel region 320 is exposed as illustrated in FIG. 3C. The ashing blocking layer 307 of the channel region 320 is removed by dry etching by applying the ashed photoresist pattern 310a as a mask.

Thereafter, the ashed photoresist pattern 310a is completely removed using an atmospheric pressure plasma apparatus. As a result, as illustrated in FIG. 3D, an ashing blocking layer 307 having a channel region open is formed on the conductive layer 306. In this process, even if the ashed photoresist pattern 310a is ashed by the atmospheric pressure plasma apparatus, the channel region is protected by the conductive layer 306, so that the active layer is not damaged.

As described above, the ashing blocking layer 307 is formed of a silicon nitride film or an ITO film having an optional etching ratio with the conductive layer 306, so that the ashing blocking film 307 is applied as a mask to the channel region 320. The conductive layer 307 is etched. In this case, when the silicon nitride film is used as the ashing blocking film, the silicon nitride film has a property of resisting wet etching and the conductive layer 306 is relatively well removed by wet etching, thereby applying a wet angle to the channel region 320. The conductive layer is removed.

As a result, the conductive layer 306 is separated to form source and drain electrodes 306a and 306b.

Subsequently, the ohmic contact layer 305 of the channel region and the ash blocking layer 307 formed on the source and drain electrodes 306a and 306b are simultaneously removed by dry etching. Since the ohmic contact layer 305 of the channel region and the ohmic contact layer 305 formed on the source and drain electrodes 306a and 306b can be removed by etching in a short time within several tens of seconds, the active layer of the channel region by etching. There is no fear that 304 will be compromised.

As a result, as shown in FIG. 3E, the semiconductor layer 304 of the channel region 320 is exposed while the source and drain electrodes 306a and 306b are electrically separated.

Subsequently, as shown in FIG. 3F, a protective layer 308 composed of a silicon oxide film or a silicon nitride film is formed on the source and drain electrodes 306a and 306b by PECVD and is formed on the drain electrode. A contact hole is formed in the layer 308. The contact hole forming process may be formed using a photoresist film and a mask process. After forming the contact hole, the remaining photoresist film may be removed by an atmospheric pressure plasma. However, the photoresist film remaining after forming the contact hole may be formed by a photoresist stripper.

After forming the contact hole, the transparent electrode ITO is formed on the protective layer 309 and patterned by a photolithography process to form the pixel electrode 309.

As described above, the present invention for preventing the active layer from being damaged during the process of removing the photosensitive film by the atmospheric pressure plasma generator, characterized in that the ashing blocking film is formed on the conductive layer for forming the source and drain electrodes Hereinafter, another embodiment of the present invention will be described with reference to FIGS. 4A and 4B.

4A to 4B show another method of manufacturing a liquid crystal display device using an inorganic film of a silicon nitride film or a silicon oxide film as the ashing blocking film of the present invention.

According to the second embodiment of the present invention, the process from forming the gate electrode 302 on the substrate 301 to forming the ashing blocking layer 307 pattern on the conductive layer 306 is the same as that of the first embodiment. same.

After the pattern of the ashing blocking layer 307 is formed, the conductive layer 307 and the ohmic contact layer 305 of the channel region 320 are applied by applying the ashing blocking layer 307 as an etch mask, as shown in FIG. 4A. Is removed to form source and drain electrodes.

Subsequently, after the source and drain electrodes are formed, the protective layer 308 is formed immediately as shown in FIG. 4B without removing the ashing blocking layer 307.

After forming the protective layer 308, a photo mask process is performed to form contact holes on the drain electrode 306b. In the process of forming the contact hole, the ash blocking film 307 on the drain electrode 306b is simultaneously removed to expose the drain electrode 306b.

In particular, when the inorganic layer of the silicon nitride film or the silicon oxide film is used as the protective layer 308, the protective layer 308 and the ashing blocking layer 307 are formed under the same etching conditions because the same composition as the ashing blocking layer 307 is performed. This can be removed to form contact holes.

After the contact hole is formed, the pixel electrode 309 connected to the drain electrode 306b is formed through the contact hole, thereby completing the liquid crystal display device.

Even when an indium tin oxide (ITO) film is used as the ash blocking film of the present invention, the liquid crystal display device manufacturing process may be performed without removing the ITO film.

A manufacturing process of a liquid crystal display device according to a third embodiment of the present invention will be described with reference to FIGS. 5A to 5B.

From the step of forming the gate electrode 302 on the substrate 301 to the step of forming the pattern of the ashing blocking film 307 made of ITO on the conductive layer 306 for forming the source and drain electrodes Same as the first embodiment.

Next, the source and drain electrodes 306a and 306b are formed by removing the conductive layer 306 and the ohmic contact layer 305 of the channel region 320 by applying the ashing blocking layer 307 formed of the TIO as an etch mask. do.

Subsequently, a protective layer 308 is formed on the source and drain electrodes 306a and 306b and the contact hole exposing the drain electrode 306b is formed without removing the ash blocking layer 307. The contact hole is formed through a photo mask process, and is formed on the drain electrode 306b in the process of forming the contact hole and is left without removing the ashing blocking layer 307 made of ITO. Since the ashing blocking film 307 according to the third embodiment of the present invention is made of conductive ITO, there is no problem in applying a data signal to the pixel electrode through the drain electrode. In addition, when the ITO film is used as the ash blocking film, contact characteristics can be improved with the pixel electrode mainly using the ITO film as the pixel electrode material.

After forming the contact hole, the liquid crystal display device is completed by forming the pixel electrode 309 connected to the drain electrode 306b through the contact hole.

By the above process, the liquid crystal display device can be manufactured so that the active layer is not damaged while the ashing process is performed by applying the atmospheric pressure plasma apparatus.

That is, the present invention forms an ashing blocking film on the source and drain electrode forming conductive films in the process of forming a thin film transistor to prevent the active layer from being damaged during the ashing process of the photoresist by the atmospheric pressure plasma generator. In addition, the ash blocking layer is formed of a source and a drain electrode by using a pattern of the ashing blocking layer as an etching mask by selecting a material having a selective etching ratio with the conductive layer.

Therefore, according to the present invention, the active layer is exposed in the photoresist strip process and the ashing process as the diffraction mask is applied, thereby improving the problem of damaging the active layer. In addition, the present invention is not limited to the above embodiment, but may be applied to any liquid crystal display device manufacturing process in which an active layer is exposed and damaged in a process of removing a photoresist.

According to the present invention, since the liquid crystal display device is manufactured using an atmospheric pressure plasma apparatus, the liquid crystal display device can be manufactured at normal pressure and low temperature. In addition, the present invention can be configured in-line the liquid crystal display device manufacturing process in the atmosphere of atmospheric pressure, which is advantageous for mass production. In addition, since the present invention performs an ashing process using an atmospheric pressure plasma apparatus, it is suitable to be applied to the manufacturing process of a liquid crystal display device using a large glass as a substrate.

In addition, the liquid crystal display device may be manufactured by providing an anti-ashing film to prevent damage to the active layer in an ashing process using an atmospheric pressure plasma apparatus.

1A to 1G are flow charts illustrating a manufacturing process of a liquid crystal display device using four masks.

2 is a perspective view showing a schematic structure of an atmospheric pressure plasma apparatus of the present invention.

3A to 3F are flow charts illustrating a process for manufacturing a liquid crystal display device of the present invention.

4A to 4B are flowcharts illustrating a process of manufacturing a liquid crystal display device according to another embodiment of the present invention.

5A through 5B are flowcharts illustrating a process of manufacturing a liquid crystal display device according to still another embodiment of the present invention.

***** Explanation of symbols for main parts of drawing *****

301: substrate 302: gate electrode

303: gate insulating layer 304: semiconductor layer

305: ohmic contact layer 306: conductive layer

307: an ashing blocking film 310; photoresist pattern

308: protective layer 309: pixel electrode

Claims (14)

Forming a gate electrode on the substrate; Sequentially forming a gate insulating layer, a semiconductor layer, an ohmic contact layer, a conductive layer, and an ashing blocking layer on the gate electrode; Forming a photoresist pattern on the ashing blocking layer by diffraction exposure; Defining an active region by applying the photoresist pattern as a mask; Removing a portion of the photoresist pattern and removing an ashing blocking layer over the channel region; Removing the photoresist pattern; Applying the ash blocking layer as a mask and etching the conductive layer to form source and drain electrodes; Forming a protective layer on the source and drain electrodes; And forming a pixel electrode on the passivation layer. The method of claim 1, wherein the ashing blocking layer is a thin film having a selective etching ratio with the conductive layer. The method of claim 1, wherein the ashing blocking film is selected from an inorganic film or an indium-tin-oxide (ITO) film. The method of claim 3, wherein the inorganic film is a silicon nitride film or a silicon oxide film. The method of claim 1, wherein the removing of the photoresist layer on the channel region of the photoresist pattern is performed by atmospheric pressure plasma. The method of claim 1, wherein the removing of the photoresist pattern is performed by an atmospheric pressure plasma. The method of claim 1, wherein the removing of the ash blocking layer and the ohmic contact layer on the channel region is performed at the same time. The method of claim 1, wherein defining the active region by applying the photoresist pattern as a mask includes: And etching the ashing blocking layer, the conductive layer, the ohmic contact layer, and the semiconductor layer in sequence by applying the photoresist pattern as a mask. The method of claim 1, further comprising simultaneously removing the ash blocking layer formed on the source and drain electrodes and the ohmic contact layer in the channel region. The method of claim 1, further comprising forming a contact hole by removing the protective layer and the ash blocking layer interposed between the protective layer and the drain electrode. 4. The method of claim 3, further comprising: forming a protective film while forming an ashing blocking film made of ITO on the source and drain electrodes; And forming a contact hole exposing the ashing blocking film. In the bottom gate type liquid crystal display device manufacturing method, Continuously forming a conductive layer and an ashing blocking film on the semiconductor layer; Forming a photoresist pattern formed on the ashing blocking layer by diffraction exposure; Defining an active region by applying the photoresist pattern as a mask; Removing a portion of the photoresist pattern and patterning the ashing blocking layer to correspond to source and drain electrodes; Removing the photoresist pattern; And forming a source and a drain electrode by applying the ashing blocking layer as a mask. The method of claim 12, wherein the removing of the photosensitive film pattern is performed by an atmospheric pressure plasma. 13. The method of claim 12, further comprising forming a passivation layer on the source and drain electrodes and forming a pixel electrode on the passivation layer.