KR20050051336A - Apparatus and method for interface of time division multiplexing bus in exchange system - Google Patents

Abstract

The present invention provides a matching device for a time division multiplex bus in an exchange system, comprising: a transceiver for transmitting and receiving a signal having an LVDS level; A reception matching unit for matching data received through the transceiver with local clock / frame synchronization; A clock / frame synchronization generator for supplying clock and frame synchronization to the reception matching unit, the transmission matching unit, and the slave TDM controller; By including a transmission matching unit for transmitting the data transmitted from the slave TDM controller to the transceiver unit in synchronization with the external clock and frame synchronization, the clock and frame synchronization of the TDM bus controller of the slave board is not directly received from the master board. By providing the local frame synchronization and clock of the slave board, it is possible to prevent the function of the TDM bus controller of the slave board from being lost by the influence of external noise.

Description

Apparatus and method for interface of time division multiplexing bus in exchange system}

The present invention relates to a matching device of a time division multiplex (TDM) bus in an exchange system. In particular, the clock and frame synchronization of a TDM bus controller of a slave board is controlled by a master board. Provided as Local Frame Synchronous and Clock of slave board instead of receiving directly from Master Board, so that it is suitable to prevent the function of slave board's TDM bus controller from being lost by the influence of external noise. A matching device for a time division multiplex bus in a system.

In general, an exchange detects a connection request coming from an incoming line of a switch network and selects an outgoing line to establish a transfer path between an incoming line and an outgoing line to form a transmission path between two or more persons who exchange doctors and data information. Then it refers to a series of operations that monitor and cut the status of incoming and outgoing and performing charges.

The exchange is a device that forms a communication path between telephone terminals, and is a local exchange that is installed in a telephone station to establish a connection between a public telecommunication network and a general subscriber, and is installed by an enterprise, a group, or an individual, and performs connection between each subscriber terminal inside. It can be divided into private exchanges. In the exchange system constituting such an exchanger, boards are configured for each component.

On the other hand, TDM is a method in which a plurality of signals are combined to transmit using one communication line or channel, and each signal is divided into several segments having very short durations. The circuit that combines the signals in the source communication link is called a multiplexer. The multiplexer receives input from each individual user, divides it into segments, and then alternately allocates each segment in the mixed signal. Thus, the mixed signal contains data from all users. On the other side of the long distance cable, each signal is separated into individual signals by a circuit device called a demultiplexer and then sent to each user as appropriate. For bidirectional communication circuits, multiplexers / demultiplexers must be present at each stage, and high speed communication cables are also required.

If many signals need to be sent on one long line, careful design is needed to ensure that the system does its job properly. The advantage of TDM is its flexibility. This scheme allows for variations in the number of signals sent along the line, and continuously adjusts the time interval to best use the available frequency band.

1 is a block diagram of a general exchange system.

Where reference numerals 1 and 2 are master boards on the A and B sides performing overall control in the switching system, and 3 to 5 are slave boards.

Therefore, the conventional exchange system transmits and receives information for IPC (Inter Processor Communication) or maintenance in the form of various buses.

In addition, the TDM bus, which is frequently used in an exchange system, is operated by a redundant master board (1) (2) and a plurality of slaves (3 to 5).

In addition, the master board (1) (2) is composed of a clock / frame synchronization generator, the transceiver (Transiver) and the TDM master controller for the synchronization of the entire bus, the slave board (3 ~ 5) is composed of a transceiver and TDM slave controller .

2 is a block diagram of a matching device of a time division multiplex bus in a conventional switching system.

This shows the configuration of the master board (1) (2), wherein reference numeral 11 is a master TDM controller, 12 is a clock / frame synchronization generator, 13 is a transceiver, and 14 is a slave TDM controller.

And the connection between the master board (1) (2) and the slave board (3 ~ 5) is connected by a cable or a backboard pattern.

The operation of the prior art will be described in detail with reference to the accompanying drawings.

To send and receive information for IPC or maintenance over the TDM bus, the master board (1) (2) generates clock and frame synchronization from its own clock / frame synchronization generator (12) for synchronization of the entire bus. .

The clock and frame synchronization generated by the clock / frame synchronization generator 12 are supplied to the slave boards 3 to 5 at a low voltage differential signal (LVDS) level through the transceiver 13.

The slave boards 3 to 5 convert the LVDS signal to a TTL (Transistor Transistor Logic) level through the transceiver and transmit the clock and frame synchronization provided by the master board 1 and 2 to the slave TDM controller 14.

The slave TDM controller 14 receives data input from the master board 1 and 2 in synchronization with this clock and frame synchronization.

In addition, the data is transferred to the master board 1 and 2 in synchronization with the clock and frame synchronization.

However, this conventional technology has the following problems.

That is, according to the prior art, the clock and frame synchronization supplied from the master may cause the clock to become unstable instantaneously due to the unmounting of the cable, the unmounting of the master board, or the mounting of the slave board on the same bus. .

The TDM controller operating in synchronization with the unstable clock and frame synchronization sometimes loses its function due to an error in the internal logic, and even if the clock and frame synchronization are restored to normal, they cannot function normally.

Therefore, the prior art has a very weak vulnerability to external noise because the clock and frame synchronization received from the outside is directly input to the TDM controller.

Accordingly, the present invention has been proposed to solve the above-mentioned general problems, and an object of the present invention is not to directly receive the clock and frame synchronization of the TDM bus controller of the slave board from the master board and to synchronize the local frame of the slave board. The present invention provides a matching device for a time division multiple bus in an exchange system that can be provided as a clock to prevent the function of the slave board's TDM bus controller from being lost.

In order to achieve the above object, a matching device for a time division multiplex bus in an exchange system according to an embodiment of the present invention,

A transceiver for transmitting and receiving an LVDS level signal; A reception matching unit for matching data received through the transceiver with local clock / frame synchronization; A clock / frame synchronization generator for supplying clock and frame synchronization to the reception matching unit, the transmission matching unit, and the slave TDM controller; Technical features of the present invention include a transmission matching unit which transmits data transmitted from the slave TDM controller to the transceiver unit in synchronization with an external clock and frame synchronization.

Hereinafter, an embodiment according to the technical concept of a matching device for a time division multiplex bus in the present invention and the switching system will be described with reference to the accompanying drawings.

3 is a block diagram of a matching device for a time division multiplex bus in an exchange system according to the present invention.

As shown here, a transceiver 20 for transmitting and receiving a signal of LVDS level; A reception matching unit 30 for matching data received through the transceiver 20 with synchronization of a local clock / frame synchronization; A clock / frame synchronization generator 40 for supplying clock and frame synchronization to the reception matching unit 30, the transmission matching unit 50, and the slave TDM controller 60; The transmission matching unit 50 is configured to transmit the data transmitted from the slave TDM controller 60 to the transceiver unit 20 in synchronization with an external clock and frame synchronization.

4 is a detailed block diagram of a reception matching unit in FIG. 3.

As shown therein, time slot information providing unit 31 for providing time slot information; A master clock synchronizer 32 that receives clock, frame synchronization and transmission data from the transceiver 20, receives time slot information from the time slot information providing unit 31, and synchronizes the master clock; A reception buffer 33 for storing a signal of the master clock synchronizer 32; And a slave clock synchronizer 34 which provides a slave clock to the reception buffer 33 and transmits the stored data to the slave TDM controller 60 in synchronization with the slave clock / frame synchronization.

In the above, the master clock synchronizer 32 receives data contained in the corresponding position based on the position of the time slot and the number of time slots among the information provided by the timeslot information providing unit 31. The reception buffer 33 stores the result.

FIG. 5 is a detailed block diagram of a transmission matching unit in FIG. 3.

As shown therein, the slave clock synchronizer 51 receives data from the slave TDM controller 60 and outputs the data according to the slave clock; A transmission buffer 52 for storing a signal output from the slave clock synchronizer 51; A time slot information providing unit 53 for providing time slot information; The master clock synchronizer 54 receives the timeslot information from the timeslot information provider 53, provides a master clock to the transmission buffer 52, and reads the stored signal to the transceiver 20. It is configured by.

In the master clock synchronizer 54, data stored in the transmission buffer 52 is stored in the corresponding time slot by using the position of the time slot and the number of time slots among the information provided from the time slot information providing unit 53. The position of the to be transmitted to the transceiver 20.

The operation of the matching device of the time division multiplex bus in the switching system according to the present invention configured as described above will be described in detail with reference to the accompanying drawings.

First, the present invention is to provide the local frame synchronization and clock of the slave board without directly receiving the clock and frame synchronization of the TDM bus controller of the slave board from the master board.

In the present invention, the flow of data reception in the entire slave board will be described in detail with reference to FIG. 4 as follows.

In order to receive the transmission data TXDATA transmitted from the master board, the slave board transmits to the time slot information providing unit 31 based on the clock (mclock) and frame synchronization (mfrs) supplied from the master from the reception matching unit 30. The data stored in the corresponding position is stored in the reception buffer 33 of the reception matching unit 30 based on the stored time slot position and the number of time slots.

At the same time, the reception matching unit 30 stores the data stored in the reception buffer 33 of the reception matching unit 30 in accordance with the clock and frame synchronization supplied to the slave TDM controller 60 and the local clock and local of the slave board. It transmits to the slave TDM controller 60 in synchronization with the frame synchronization (sfrs).

The slave TDM controller 60 then operates in accordance with the local clock and local frame synchronization.

Meanwhile, the data transmission flow of the entire slave board in the present invention will be described in detail with reference to FIG. 5.

The transmission matching unit 50 of the slave board transmits data transmitted from the slave TDM controller 60 in synchronization with the local clock and local frame synchronization (sfrs) generated by the clock / frame synchronization generator 40. The data is stored in the transmission buffer 52 of the matching section 50.

The data stored in the transmission matching unit 50 is loaded on the position of the corresponding time slot stored in the time slot information storage unit 53 in accordance with the clock mclk and frame synchronization mfrs supplied from the master board. The signal is then converted into an LVDS signal and transmitted to the master board.

6 is a timing diagram of data conversion in the reception buffer of FIG. 4.

Therefore, the clock, frame synchronization, and transmission data transmitted from the master board are extracted from the position of the time slot received from the time slot information providing unit 31 and stored in the reception buffer 33.

Data stored in the receive buffer 33 is sent in accordance with local clock and local frame synchronization for transmission to the slave TDM controller 60.

Here, the received data is processed by the time slot position and the number of time slots registered in the time slot information providing unit 31. In FIG. 6, the position of the time slot is four clocks and the number of time slots is four.

7 is a timing diagram of data conversion in the transmission buffer of FIG. 5.

Therefore, the data transmitted from the slave TDM controller 60 in synchronization with the local clock and the local frame synchronization are first stored in the transmission buffer 52, and the master clock and the master in accordance with the time slot provided by the timeslot information provider 53. It is transmitted to the master board in synchronization with frame synchronization.

Here, the transmission data is processed by the time slot position and the number of time slots registered in the time slot information providing unit 31. In FIG. 6, the time slot position is 4 clocks and the number of time slots is 4 times.

As such, the present invention prevents the function of the TDM bus controller of the slave board from being lost by the influence of external noise.

Although the preferred embodiment of the present invention has been described above, the present invention may use various changes, modifications, and equivalents. It is clear that the present invention can be applied in the same manner by appropriately modifying the above embodiments. Accordingly, the above description does not limit the scope of the invention as defined by the limitations of the following claims.

As described above, in the switching system according to the present invention, the matching device of the time division multiplex bus provides the local frame synchronization and clock of the slave board without directly receiving the clock and frame synchronization of the TDM bus controller of the slave board from the master board. Therefore, it is possible to prevent the function of the TDM bus controller of the slave board from being lost due to the influence of external noise, thereby enabling more stable IPC communication and configuring a maintenance channel.

1 is a block diagram of a general exchange system,

2 is a block diagram of a matching device for a time division multiplex bus in a conventional switching system,

3 is a block diagram of a matching device for a time division multiplex bus in an exchange system according to the present invention;

4 is a detailed block diagram of a reception matching unit in FIG. 3;

5 is a detailed block diagram of a transmission matching unit of FIG. 3;

6 is a timing diagram of data conversion in the reception buffer of FIG. 4.

7 is a data conversion timing diagram of the transmission buffer of FIG. 5.

Explanation of symbols on the main parts of the drawings

1: Master A side 2: Master B side

3, 4, 5: slave 10: board

11: master TDM controller 12: clock / frame synchronization generator

13, 20: transceiver 14: slave TDM controller

30: reception matching unit 31: time slot information providing unit

32: master clock synchronizer 33: receiving buffer

34: slave clock synchronizer 40: clock / frame sync generator

50: transmission matching unit 51: slave clock synchronization unit

52: transmission buffer 53: time slot information providing unit

54: master clock synchronizer 60: slave TDM controller

Claims (5)

A transceiver for transmitting and receiving an LVDS level signal; A reception matching unit for matching data received through the transceiver with local clock / frame synchronization; A clock / frame synchronization generator for supplying clock and frame synchronization to the reception matching unit, the transmission matching unit, and the slave TDM controller; And a transmission matching unit for transmitting data transmitted from the slave TDM controller to the transceiver in synchronization with an external clock and frame synchronization. The method of claim 1, wherein the reception matching unit, A time slot information providing unit for providing time slot information; A master clock synchronizer configured to receive clock, frame synchronization and transmission data from the transceiver, and receive time slot information from the time slot information providing unit to synchronize the master clock; A reception buffer for storing a signal of the master clock synchronizer; And a slave clock synchronizer configured to provide a slave clock to the receive buffer and transmit the stored data to the slave TDM controller in synchronization with a slave clock / frame synchronization. The method of claim 2, wherein the master clock synchronizer, Matching apparatus for a time division multiplex bus in an exchange system, wherein the data stored at a corresponding position based on a time slot position and the number of time slots among information provided by the timeslot information providing unit is stored in a receiving buffer of the receiving matching unit. . The method of claim 1, wherein the transmission matching unit, A slave clock synchronizer which receives data from the slave TDM controller and outputs the data according to a slave clock; A transmission buffer for storing a signal output from the slave clock synchronization unit; A time slot information providing unit for providing time slot information; A time division multiplex bus in a switching system comprising a master clock synchronization unit receiving time slot information from the time slot information providing unit, providing a master clock to the transmission buffer, and reading a stored signal and transmitting the read signal to the transceiver Matching device. The method of claim 4, wherein the master clock synchronizer, In the switching system, characterized in that the data stored in the transmission buffer is loaded to the position of the time slot by using the position of the time slot and the number of time slots of the information provided from the time slot information provider to be transmitted to the transceiver. Matching device for time division multiple buses.