KR20050050867A - Plasma display panel, driving apparatus and method of the same - Google Patents

Abstract

The present invention relates to a plasma display panel, a driving apparatus thereof, and a driving method thereof. The plasma display panel driving apparatus of the present invention is formed separately from a switch applying a sustain voltage to a switching unit for injecting an initial current into an inductor of a power recovery circuit causing resonance with the panel capacitor. In this way, by injecting the same initial current as the inductor causing resonance with the panel capacitor into the parasitic inductance existing on the sustain discharge path, the waveform is distorted by the parasitic inductance component, thereby improving the discharge quality.

Description

Plasma display panel, its driving device and driving method {PLASMA DISPLAY PANEL, DRIVING APPARATUS AND METHOD OF THE SAME}

The present invention relates to a plasma display panel (PDP), a driving apparatus thereof, and a driving method thereof.

Recently, flat display devices such as a liquid crystal display (LCD), a field emission display (FED), and a plasma display panel have been actively developed. Among these flat panel display devices, the plasma display panel has advantages of higher luminance and luminous efficiency and wider viewing angle than other flat panel display devices. Therefore, the plasma display panel is in the spotlight as a display device to replace a conventional cathode ray tube (CRT) in a large display device of 40 inches or more.

A plasma display panel is a flat panel display device that displays characters or images using plasma generated by gas discharge, and tens to millions or more of pixels are arranged in a matrix form according to their size. The plasma display panel is classified into a direct current type and an alternating current type according to a shape of a driving voltage waveform applied and a structure of a discharge cell.

In the DC plasma display panel, the electrode is exposed without the discharge space insulated, so that the current flows in the discharge space while the voltage is applied, and there is a disadvantage in that a resistance for current limitation must be made. On the other hand, in the AC plasma display panel, since the electrode covers the dielectric layer, the current is limited by the formation of a natural capacitance component, and the electrode is protected from the impact of ions during discharge.

In such an AC plasma display panel, scan electrodes and sustain electrodes parallel to each other are formed on one surface thereof, and address electrodes are formed on the other surface in a direction orthogonal to these electrodes. The sustain electrode is formed corresponding to each scan electrode, and one end thereof is connected in common to each other.

In general, the driving method of the AC plasma display panel includes a reset period, an addressing period, and a sustain period.

The reset period is a period of initializing the state of each cell in order to perform an addressing operation smoothly on the cell. The addressing period is an address voltage for a cell (addressed cell) turned on to select a cell that is turned on and a cell that is not turned on in a panel. It is a period of time to perform the operation of accumulating wall charge by applying a. The sustain period is a period in which a discharge for actually displaying an image on the addressed cell is applied by applying a sustain discharge voltage pulse.

On the other hand, the conventional PDP generates sustain discharge voltage pulses in the drive circuit of the sustain electrode and the drive circuit of the scan electrode, respectively. However, since the driving circuit of the scan electrodes performs not only the operation of generating the sustain discharge voltage pulse but also the operation of generating the reset and scan pulses together, many circuit parts are included in comparison with the driving circuit of the sustain electrode.

1 shows a driving circuit of a scanning electrode according to the prior art.

As shown in FIG. 1, the conventional scan electrode driving circuit includes a sustain driver 330 including a power recovery circuit, a reset driver 320 including a main path switch, and a scan driver 310 including a scan IC. Include.

Meanwhile, the conventional scan electrode driving circuit further includes parasitic inductance components L2 and L3 formed by a pattern on the discharging path, in addition to the inductor L1 included in the power recovery circuit.

In applying the sustain discharge voltage to the scan electrode through the scan electrode driving circuit, a circuit is first applied to the inductor of the power recovery circuit, and then the panel capacitor Cp is charged and the sustain discharge voltage is applied. When driving, since the current is injected into the inductor by turning on the switches Yr and Yg, the initial current is injected only into the inductor L1 except the parasitic inductances L2 and L3.

Therefore, when generating the sustain discharge waveform, the initial current of the inductor L1 and the initial current of the parasitic inductances L2, L3, and L4 are different, and the parasitic inductances L2, L3, and L4 are the resonance currents of the inductor L1. Since it acts to suppress the transfer to the panel capacitor Cp, this causes distortion in the sustain discharge waveform, which causes the discharge quality to deteriorate.

SUMMARY OF THE INVENTION The present invention provides a plasma display panel, a driving device, and a driving method thereof for removing waveform distortion by injecting an initial current equal to an inductor causing resonance with a panel capacitor into a parasitic inductance existing on a sustain discharge path. It is to.

According to an aspect of the present invention, a driving apparatus for a plasma display panel includes a plasma display configured to apply a voltage to a first electrode and a second electrode and a panel capacitor formed between the first electrode and the second electrode. As the driving device of the panel,

An inductor having a first end electrically connected to the first electrode; A first switch connected between a second end of the inductor and a first power supply for supplying a first voltage, the first switch operative to charge current through the inductor to the panel capacitor; A second switch connected between the second end of the inductor and the first power source, the second switch operative to discharge current from the panel capacitor through the inductor; A third switch connected between the first electrode and a second power supply for supplying a second voltage, the third switch being operable to apply the second voltage to the first electrode after charging the panel capacitor; A fourth switch connected between the first electrode and a third power supply for supplying a third voltage, the fourth switch being operable to apply the third voltage to the first electrode after discharge of the panel capacitor; A reset driver connected between the first end of the inductor and the first electrode to apply a reset voltage to the first electrode in a reset period; And a fifth switch electrically connected between the reset driver and the contact point of the first electrode and a fourth power supply for supplying a fourth voltage.

Prior to charging the panel capacitor, current is applied to the inductor through a current path formed by turning on the first and fifth switches.

And a sixth switch electrically connected between the reset driver and the contact point of the first electrode and a fifth power supply for supplying a fifth voltage.

Before discharging the panel capacitor, current is applied to the inductor through a current path formed by turning on the second and sixth switches.

A first diode coupled between the second end of the inductor and the first power source to determine a direction of current so that the panel capacitor is charged; And a second diode connected between the second end of the inductor and the first power source to determine a direction of the current so that the panel capacitor is discharged.

The display device may further include a selection circuit connected between the contacts of the fifth and sixth switches and the first electrode and operable to apply a scan voltage to the first electrode in an address period.

The fifth and sixth switches may be mounted on the same board as the selection circuit or on the same board as the reset driver.

Preferably, the fourth voltage is the same as the third voltage, and the fifth voltage is the same as the second voltage.

According to an aspect of the present invention, a plasma display panel includes a panel unit including a panel capacitor including a plurality of first electrodes and a second electrode, and a chassis base on which a board necessary for driving the panel unit is formed.

The chassis base,

A sustain driving board including a circuit for applying a voltage for sustain discharge to the first and second electrodes, and a scan buffer board including a selection circuit operable to apply a scan voltage to the first electrode in an address period; ,

The holding drive board,

An inductor having a first end electrically connected to the first electrode; A first switch connected between a second end of the inductor and a first power supply for supplying a first voltage, the first switch operative to charge current through the inductor to the panel capacitor; A second switch connected between the second end of the inductor and the first power source, the second switch operative to discharge current from the panel capacitor through the inductor; A third switch connected between the first electrode and a second power supply for supplying a second voltage, the third switch being operable to apply the second voltage to the first electrode after charging the panel capacitor; A fourth switch connected between the first electrode and a third power supply for supplying a third voltage, the fourth switch being operable to apply the third voltage to the first electrode after discharge of the panel capacitor; A reset driver connected between the first end of the inductor and the first electrode to apply a reset voltage to the first electrode in a reset period; And a fifth switch electrically connected between the reset driver and the contact point of the first electrode and the second power supply and turned on prior to charging the panel capacitor to apply current to the inductor. And a sixth switch electrically connected between the reset driver and the contact point of the first electrode and the third power supply and configured to apply current to the inductor through a current path that is turned on prior to the discharge of the panel capacitor. do.

According to another aspect of the present invention, a plasma display panel includes a panel unit including a plurality of first electrodes and a second electrode, and a chassis base on which a board necessary for driving the panel unit is formed.

The chassis base,

A sustain driving board including a circuit for applying a voltage for sustain discharge to the first and second electrodes, and a scan buffer board including a selection circuit operable to apply a scan voltage to the first electrode in an address period; ,

The holding drive board,

An inductor having a first end electrically connected to the first electrode; A first switch connected between a second end of the inductor and a first power supply for supplying a first voltage, the first switch operative to charge current through the inductor to the panel capacitor; A second switch connected between the second end of the inductor and the first power source, the second switch operative to discharge current from the panel capacitor through the inductor; A third switch connected between the first electrode and a second power supply for supplying a second voltage, the third switch being operable to apply the second voltage to the first electrode after charging the panel capacitor; And a fourth switch connected between the first electrode and a third power supply for supplying a third voltage, the fourth switch being operable to apply the third voltage to the first electrode after discharge of the panel capacitor.

The scan buffer board,

A fifth switch electrically connected between the reset driver and the contact point of the first electrode and the second power supply and turned on before the panel capacitor is charged to apply current to the inductor; And a sixth switch electrically connected between the reset driver and the contact point of the first electrode and the third power supply and configured to apply current to the inductor through a current path that is turned on prior to the discharge of the panel capacitor. do.

The maintenance drive board,

The electronic device may further include a reset driver connected between the first end of the inductor and the first electrode to apply a reset voltage to the first electrode during a reset period.

According to an aspect of the present invention, there is provided a method of driving a plasma display panel, comprising: injecting a current into the inductor through a path formed by turning on the first switch and the fifth switch; Turning off the fifth switch and charging the panel capacitor by resonance of the inductor and the panel capacitor; And turning off the first switch and turning on the third switch to maintain the voltage of the first electrode at the second voltage.

The driving device of the plasma display panel further includes a sixth switch electrically connected between the reset driver, a contact point of the first electrode, and a fifth power supply for supplying a fifth voltage.

The driving method,

Injecting current into the inductor through a path formed by turning on the second switch and the sixth switch; Turning off the sixth switch and discharging the panel capacitor by resonance of the inductor and the panel capacitor; And turning off the second switch and turning on the fourth switch to maintain the voltage of the first electrode at the third voltage.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention. In the drawings, parts irrelevant to the description are omitted in order to clearly describe the present invention. Like parts are designated by like reference numerals throughout the specification.

A plasma display panel, a driving device, and a driving method thereof according to an embodiment of the present invention will now be described in detail with reference to the accompanying drawings.

First, a schematic structure of a plasma display panel device according to an embodiment of the present invention will be described in detail with reference to FIGS. 2 to 4. 2 is an exploded perspective view of a plasma display panel device according to an embodiment of the present invention, Figure 3 is a schematic plan view of a plasma panel according to an embodiment of the present invention. 4 is a schematic plan view of a chassis base according to an embodiment of the present invention.

As shown in FIG. 2, the plasma display panel device includes a plasma panel 10, a chassis base 20, a front case 30, and a rear case 40. The chassis base 20 is disposed on the opposite side of the surface on which the image is displayed on the plasma panel 10 and is coupled to the plasma panel 10. The front and rear cases 30 and 40 are disposed at the front of the plasma panel 10 and the rear of the chassis base 20, respectively, and are combined with the plasma panel 10 and the chassis base 20 to form a plasma display panel device. do.

Referring to FIG. 3, the plasma panel 10 includes a plurality of address electrodes A1-Am arranged in the column direction, and a plurality of scan electrodes Y1-Yn and a plurality of sustain electrodes arranged zigzag in the row direction. (X1-Xn). The sustain electrodes X1-Xn are formed corresponding to the scan electrodes Y1-Yn, and generally have one end connected in common with each other. The plasma panel 10 includes a glass substrate on which sustain and scan electrodes X 1 to X n and Y 1 to Y n are arranged, and a glass substrate on which address electrodes A 1 to Am are arranged. The two glass substrates are disposed to face each other with the discharge space therebetween so that the scan electrodes Y1-Yn and the address electrodes A1-Am and the sustain electrodes X1-Xn and the address electrodes A1-Am are orthogonal to each other. . At this time, the discharge space at the intersection of the address electrodes A1-Am and the sustain and scan electrodes X1-Xn and Y1-Yn forms the discharge cells 11.

As shown in FIG. 4, boards 100-600 necessary for driving the plasma panel 10 are formed in the chassis base 20. The address buffer board 100 is formed on the upper and lower portions of the chassis base 20, respectively, and may be formed of a single board or a plurality of boards. In FIG. 4, a plasma display panel device for dual driving is described as an example. However, in the case of a single driving, the address buffer board 100 is disposed at one of the upper and lower portions of the chassis base 20. The address buffer board 100 receives an address driving control signal from the image processing and logic board 500 and applies a voltage to each address electrode A1-Am to select a discharge cell to be displayed.

The scan and sustain drive boards 200 and 300 are disposed on the left and right sides of the chassis base 20, respectively, and the scan board 200 is electrically connected to the scan electrodes Y1-Yn via the scan buffer board 400. It is connected. The scan buffer board 400 performs an operation necessary for scanning the scan electrodes Y1-Yn. The scan and sustain drive boards 200 and 300 receive a sustain discharge signal from the image processing and logic board 500 and alternately input sustain discharge pulses to the scan and sustain electrodes Y1-Yn and X1-Xn. Then, sustain discharge occurs in the discharge cell selected by the input sustain discharge pulse. In FIG. 3, the scan and sustain drive boards 200 and 300 are separated and described, but the two boards 200 and 300 may be formed as a single board, and the scan buffer board 400 may also be the drive board 200. It may be formed integrally with.

The image processing and logic board 500 receives an image signal from the outside, generates an address driving control signal and a sustain discharge signal, and applies them to the address driving board 100 and the scan and sustain driving boards 200 and 300, respectively. The power supply board 600 supplies power for driving the plasma display panel device. The image processing and logic board 500 and the power board 600 are disposed in the center of the chassis base.

Hereinafter, the structure and operation of the Y electrode driving circuit included in the scan and sustain driving boards 200 and 300 will be described in detail with reference to FIGS. 5 to 7.

5 is a diagram illustrating a configuration of a Y electrode driving circuit according to an embodiment of the present invention.

As shown in FIG. 5, the Y electrode driving circuit according to the exemplary embodiment of the present invention includes a scan driver 310, a reset driver 320, a sustain driver 330, and a boosting switching unit 340.

The scan driver 310 applies a scan signal to the Y electrode during the address period, and includes a power supply VscH, a capacitor Csc, and a scan IC.

The reset driver 320 applies a rising waveform and a falling waveform to the Y electrode during the reset period, and includes a capacitor Cset, a rising lamp switch Yrr, and a falling lamp switch Yfr that charge the voltage Vset. . In addition, the reset driver 325 further includes a switch Yaux for supplying the voltage Vs in the reset period, the clamping diodes Ds and Dg, and the switches Ypp and Ynp formed in the main path. The switch Yaux may use a switch having a small capacity.

In addition, the reset driver 325 according to the embodiment of the present invention further includes a switch YscL for applying the scan voltage VscL to the Y electrode in the scan period, and the scan voltage VscL and the final voltage of the falling ramp waveform. (Vnf) can be set to the same value, and in this case, only one lamp switch (Yfr) can be driven without using the switches (YscL) and (Yfr) separately.

In addition, in the reset driving unit 325 according to the embodiment of the present invention, the switch YscL is connected in a back-to-back manner to withstand the breakdown voltage, and the lamp switch Yfr is a switch whose direction is reversed to block the path by the body diode. The two were connected in series.

The sustain driver 330 applies a voltage (Vs) for sustain discharge to the Y electrode in the sustain period, and switches (Ys, Yg) and clamping diodes (Dys, Dyg) connected in series between the power supply (Vs) and the ground terminal. , A capacitor (Cyr) charged with a voltage (Vs / 2), a switch (Yr) and a diode (Dr) forming a charge path, a switch (Yf) and a diode (Df), a panel capacitor (Cp) forming a discharge path. ) And an inductor (L1) to charge and discharge the panel capacitor (Cp) by causing the LC resonance.

The boosting switching unit 340 injects an initial current into the inductor L1 and the parasitic inductances L2, L3, and L4 in the sustaining period, and switches the switches Yss and Ygg connected in series between the power supply Vs and the ground terminal. Include. In this case, the switches Yss and Ygg may be connected to a separate power source instead of the voltage Vs and the ground terminal.

Next, with reference to FIGS. 6 and 7A to 7H, a time-series operation change in the holding section of the driving circuit according to the embodiment of the present invention will be described. Here, the operation change is performed in eight modes M1 to M8, and the mode change is generated by the operation of the switch. The phenomenon referred to herein as resonance is not a continuous oscillation but a change in voltage and current due to the combination of the inductor L1 and the panel capacitor Cp occurring at the turn-on of the switches Xr and Xf.

6 is a driving timing diagram of a Y electrode driving circuit according to an embodiment of the present invention, and FIGS. 7A to 7H are diagrams illustrating current paths of respective modes in which a panel capacitor is charged and discharged in a Y electrode driving circuit according to an embodiment of the present invention. It is a figure which shows.

In the embodiment of the present invention, it is assumed that the voltage V, V = Vs / 2 is charged in the capacitor Cyr before the mode 1 M1 starts.

① Mode 1 (M1)-see FIG. 7A

Referring to M1 of FIG. 6, in the mode 1 section, the switches Ygg and Yr are turned on. Then, as illustrated in FIG. 7A, a current path is formed by the capacitor Cyr, the switch Yr, the inductor L1, and the switch Ygg.

Therefore, as shown in FIG. 6, the current I _L1 flowing in the inductor L1 increases linearly with a slope of V / L, and magnetic energy is accumulated in the inductor L1.

In addition, the initial current is also injected into the parasitic inductances L2, L3, L4 formed on the current path.

② Mode 2 (M2)-see FIG. 7B

Referring to M2 of FIG. 6, in the mode 2 section, the switch Ygg is turned off while the switch Yr is turned on. Then, as shown in FIG. 7B, a current path is formed by the capacitor Cyr, the switch Yr, the inductor L1, and the panel capacitor Cp, so that resonance occurs between the inductor L1 and the panel capacitor Cp. do. The panel capacitor Cp is charged by this resonance, and the Y electrode voltage Vy of the panel capacitor Cp rises to the voltage Vs.

At this time, since the current is also injected into the parasitic inductances L2, L3, and L4 including the inductor L1 in the mode 1, when the resonance occurs between the inductor L1 and the panel capacitor Cp, the resonance current is generated by the panel capacitor Cp. ) Can be delivered smoothly.

③ Mode 3 (M3)-see FIG. 7C

Referring to M3 of FIG. 6, in the mode 3 section, the switch Ys is turned on while the switch Yr is turned on, so that the body diode of the capacitor Cyr, the switch Yr, the inductor L1, and the switch Ys is turned on. And a current path of the switch Ys and the panel capacitor Cp are formed.

Therefore, the Y electrode voltage Vy of the panel capacitor Cp is maintained at the voltage Vs, and the panel emits light. The current I _L1 flowing in the inductor L1 decreases linearly with a slope of-(Vs-V) / L. In other words, the energy stored in the inductor L1 is recovered to the capacitor Cyr.

④ Mode 4 (M4)-see FIG. 7D

Referring to M4 of FIG. 6, in the mode 4 section, when the current I _L1 flowing in the inductor L1 decreases to 0A, the switch Yr is turned off. At this time, since the switch Ys is turned on, the Y electrode voltage Vy of the panel capacitor Cp is maintained at the voltage Vs.

⑤ Mode 5 (M5)-see FIG. 7E

Referring to M5 of FIG. 6, in the mode 5 section, the switch Ys is turned off and the switches Yf and Yss are turned on. Then, as illustrated in FIG. 7E, a current path is formed by the switch Yss, the inductor L1, the switch Yf, and the capacitor Cyr.

Therefore, in the mode 5 section, the current I _L1 flowing in the inductor L1 decreases linearly with the slope-(Vs-V) / L, and magnetic energy is accumulated in the inductor L1.

In addition, the initial current is also injected into the parasitic inductances L2, L3, L4 formed on the current path.

⑥ Mode 6 (M6)-see FIG. 7F

Referring to M6 of FIG. 6, in the mode 6 section, the switch Yss is turned off while the switch Yf is turned on. Then, as shown in FIG. 7F, a current path is formed by the panel capacitor Cp, the inductor L1, the switch Yf, and the capacitor Cyr, and resonance occurs between the inductor L1 and the panel capacitor Cp. do. By this resonance, the Y electrode voltage Vy of the panel capacitor Cp decreases to 0V. That is, the panel capacitor Cp is discharged.

At this time, since the current is also injected into the parasitic inductances L2, L3, and L4 including the inductor L1 in the mode 5, when the resonance occurs between the inductor L1 and the panel capacitor Cp, the resonance current is generated from the panel capacitor Cp. ) Can be delivered smoothly.

⑦ Mode 7 (M7)-see FIG. 7G

Referring to M7 of FIG. 6, in the mode 7 section, the switch Yg is turned on while the switch Yf is turned on. Therefore, the Y electrode voltage Vy of the panel capacitor Cp is maintained at 0V.

The current I _L1 flowing through the inductor L1 increases with the slope of V / L through the path of the body diode of the switch Yg, the inductor L1, the switch Yf, and the capacitor Cyr. That is, energy stored in the inductor L1 is recovered to the capacitor Cyr through the switch Yf.

⑧ Mode 8 (M8)-see FIG. 7H

Referring to M8 of FIG. 6, in the mode 8 section, when the current I _L1 flowing in the inductor L1 increases to 0, the switch Yf is turned off. At this time, since the switch Yg is turned on, the Y electrode voltage Vy of the panel capacitor Cp is continuously maintained at 0V.

As described above, the panel voltage Vy may swing between Vs and 0V through the processes of the modes 1 to 8 (M1 to M8).

On the other hand, the boosting switching unit 340 according to an embodiment of the present invention is preferably disposed at the position as close as possible to the Y electrode driving circuit in order to minimize the influence of the parasitic inductance component.

8A to 8B illustrate an arrangement of the boosting switching unit 340 according to the embodiment of the present invention.

That is, as shown in FIG. 8A, the boosting switching unit 340 according to the embodiment of the present invention has an end of the scan driving board 200 adjacent to the scan buffer board 400 or as shown in FIG. 8B. The scan driving board 200 may be disposed at an end of the scan buffer board 400 adjacent to the scan driving board 200.

Although the preferred embodiment of the present invention has been described in detail above, the present invention is not limited thereto, and various other changes and modifications are possible.

As described above, according to the present invention, by injecting the same initial current as the inductor causing resonance with the panel capacitor into the parasitic inductance existing on the sustain discharge path, the waveform is distorted by the parasitic inductance component to solve the discharge quality. Can improve.

1 is a view showing a Y electrode driving circuit according to the prior art.

2 is an exploded perspective view of a plasma display panel device according to an embodiment of the present invention.

3 is a schematic plan view of a plasma panel according to an embodiment of the present invention.

4 is a schematic plan view of a chassis base according to an embodiment of the present invention.

5 is a diagram illustrating a configuration of a Y electrode driving circuit according to an embodiment of the present invention.

6 is a driving timing diagram of a Y electrode driving circuit according to an embodiment of the present invention.

7A to 7H are diagrams illustrating current paths of respective modes in which a panel capacitor is charged and discharged in a Y electrode driving circuit according to an exemplary embodiment of the present invention.

8A to 8B are diagrams illustrating an arrangement of a boosting switching unit according to an exemplary embodiment of the present invention.

Claims (15)

In the driving apparatus of the plasma display panel for applying a voltage to the first electrode and the second electrode and the panel capacitor formed between the first electrode and the second electrode, An inductor having a first end electrically connected to the first electrode; A first switch connected between a second end of the inductor and a first power supply for supplying a first voltage, the first switch operative to charge current through the inductor to the panel capacitor; A second switch connected between the second end of the inductor and the first power source, the second switch operative to discharge current from the panel capacitor through the inductor; A third switch connected between the first electrode and a second power supply for supplying a second voltage, the third switch being operable to apply the second voltage to the first electrode after charging the panel capacitor; A fourth switch connected between the first electrode and a third power supply for supplying a third voltage, the fourth switch being operable to apply the third voltage to the first electrode after discharge of the panel capacitor; A reset driver connected between the first end of the inductor and the first electrode to apply a reset voltage to the first electrode in a reset period; And A fifth switch electrically connected between the reset driver and the contact point of the first electrode and a fourth power supply for supplying a fourth voltage; Driving device of the plasma display panel comprising a. The method of claim 1, Prior to charging the panel capacitor, applying current to the inductor through a current path formed by turning on the first and fifth switches Driving device of plasma display panel. The method of claim 1, A sixth switch electrically connected between the reset driver and a contact point of the first electrode and a fifth power supply for supplying a fifth voltage; Driving device for a plasma display panel further comprising. The method of claim 3, Prior to discharging the panel capacitor, current is applied to the inductor through a current path formed by turning on the second and sixth switches. Driving device of plasma display panel. The method according to claim 1 or 3, A first diode coupled between the second end of the inductor and the first power source to determine a direction of current so that the panel capacitor is charged; And A second diode connected between the second end of the inductor and the first power source to determine a direction of current so that the panel capacitor is discharged Driving device for a plasma display panel further comprising. The method according to claim 1 or 3, A selection circuit connected between the contacts of the fifth and sixth switches and the first electrode and operative to apply a scan voltage to the first electrode in an address period; Driving device for a plasma display panel further comprising. The method of claim 6, The fifth and sixth switches are mounted on the same board as the selection circuit. Driving device of plasma display panel. The method according to claim 1 or 3, The fifth and sixth switches are mounted on the same board as the reset driver. Driving device of plasma display panel. The method according to claim 1 or 3, The fourth voltage is equal to the third voltage, and the fifth voltage is equal to the second voltage. Driving device of plasma display panel. A panel portion including a panel capacitor including a plurality of first electrodes and a second electrode, and a chassis base on which a board necessary for driving the panel portion is formed, The chassis base, A sustain driving board including a circuit for applying a voltage for sustain discharge to the first and second electrodes, and a scan buffer board including a selection circuit operable to apply a scan voltage to the first electrode in an address period; , The holding drive board, An inductor having a first end electrically connected to the first electrode; A first switch connected between a second end of the inductor and a first power supply for supplying a first voltage, the first switch operative to charge current through the inductor to the panel capacitor; A second switch connected between the second end of the inductor and the first power source, the second switch operative to discharge current from the panel capacitor through the inductor; A third switch connected between the first electrode and a second power supply for supplying a second voltage, the third switch being operable to apply the second voltage to the first electrode after charging the panel capacitor; A fourth switch connected between the first electrode and a third power supply for supplying a third voltage, the fourth switch being operable to apply the third voltage to the first electrode after discharge of the panel capacitor; A reset driver connected between the first end of the inductor and the first electrode to apply a reset voltage to the first electrode in a reset period; And A fifth switch electrically connected between the reset driver and the contact point of the first electrode and the second power supply and turned on before the panel capacitor is charged to apply current to the inductor; And A sixth switch electrically connected between the reset driver and the contact point of the first electrode and the third power supply and configured to apply current to the inductor through a current path that is turned on before discharging the panel capacitor; Plasma display panel comprising a. A panel portion including a plurality of first electrodes and a second electrode, and a chassis base on which a board necessary for driving the panel portion is formed, The chassis base, A sustain driving board including a circuit for applying a voltage for sustain discharge to the first and second electrodes, and a scan buffer board including a selection circuit operable to apply a scan voltage to the first electrode in an address period; , The holding drive board, An inductor having a first end electrically connected to the first electrode; A first switch connected between a second end of the inductor and a first power supply for supplying a first voltage, the first switch operative to charge current through the inductor to the panel capacitor; A second switch connected between the second end of the inductor and the first power source, the second switch operative to discharge current from the panel capacitor through the inductor; A third switch connected between the first electrode and a second power supply for supplying a second voltage, the third switch being operable to apply the second voltage to the first electrode after charging the panel capacitor; And A fourth switch connected between the first electrode and a third power supply for supplying a third voltage, the fourth switch being operable to apply the third voltage to the first electrode after discharge of the panel capacitor, The scan buffer board, A fifth switch electrically connected between the reset driver and the contact point of the first electrode and the second power supply and turned on before the panel capacitor is charged to apply current to the inductor; And A sixth switch electrically connected between the reset driver and the contact point of the first electrode and the third power supply and configured to apply current to the inductor through a current path that is turned on before discharging the panel capacitor; Plasma display panel comprising a. The method according to claim 10 or 11, wherein The maintenance drive board, A reset driver connected between the first end of the inductor and the first electrode to apply a reset voltage to the first electrode in a reset period; Plasma display panel further comprising. The method according to claim 10 or 11, wherein Current is applied to the inductor through a current path formed by turning on the first and sixth switches before charging the panel capacitor. The current is applied to the inductor through a current path formed by turning on the second and fifth switches before the panel capacitor is discharged. Plasma display panel. In the driving method of the plasma display panel drive device according to claim 1, Injecting current into the inductor through a path formed by turning on the first switch and the fifth switch; Turning off the fifth switch and charging the panel capacitor by resonance of the inductor and the panel capacitor; And Turning off the first switch and turning on the third switch to maintain the voltage of the first electrode at the second voltage; Method of driving a plasma display panel comprising a. The method of claim 14, The driving device of the plasma display panel further includes a sixth switch electrically connected between the reset driver, a contact point of the first electrode, and a fifth power supply for supplying a fifth voltage. The driving method, Injecting current into the inductor through a path formed by turning on the second switch and the sixth switch; Turning off the sixth switch and discharging the panel capacitor by resonance of the inductor and the panel capacitor; And Turning off the second switch and turning on the fourth switch to maintain the voltage of the first electrode at the third voltage; Method of driving a plasma display panel further comprising.