KR20050050847A - Plasma display panel - Google Patents

Abstract

The present invention provides a plasma display panel and a driving method thereof capable of preventing damage to the plasma display panel even when a circuit to which the reset falling waveform is applied is broken.

The present invention provides a plasma display panel including a drive unit including address electrodes arranged to intersect the scan electrodes and the sustain electrodes arranged side by side, and applying a driving waveform to the electrodes during a reset period, an address period, and a sustain period. A scan electrode driver for driving the scan electrodes, the falling waveform applying unit being applied to the scan electrodes to reset and applying a falling waveform gradually falling from the first voltage to the second voltage; And a scan selection voltage application unit for applying a scan selection voltage waveform of a third voltage applied for addressing the scan electrode, wherein the falling waveform application unit is connected to an output terminal of the falling waveform.

According to the present invention, by connecting an element acting as a fuse to each of the output terminal of the falling lamp applying unit and the output terminal of the scanning selection voltage applying unit, it is possible to prevent sustain discharge from occurring in all discharge cells regardless of the address data due to breakage of the falling lamp applying unit. You can prevent it.

Description

Plasma display panel

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display panel (PDP) and a driving method thereof, and more particularly, to a plasma display panel capable of increasing display brightness and a driving method thereof.

Recently, flat display devices such as a liquid crystal display (LCD), a field emission display (FED), and a plasma display panel have been actively developed. Among the flat panel display devices, the plasma display panel has advantages of higher luminance and luminous efficiency and wider viewing angle than other flat panel display devices. Accordingly, the plasma display panel is in the spotlight as a display device to replace the conventional cathode ray tube (CRT) in a large display device of 40 inches or more.

First, a structure of a general plasma display panel will be described with reference to FIG. 1.

1 is a partially exploded perspective view illustrating a structure of a general plasma display panel.

As shown in FIG. 1, the scan electrode 4 and the sustain electrode 5 covered with the dielectric layer 2 and the protective film 3 are arranged in parallel on the first glass substrate 1. A plurality of address electrodes 8 covered with the insulator layer 7 are provided on the second glass substrate 6. A partition 9 is formed on the insulator layer 7 between the address electrodes 8 in parallel with the address electrode 8. In addition, the phosphor 10 is formed on the surface of the insulator layer 7 and on both side surfaces of the partition wall 9. The first glass substrate 1 and the second glass substrate 6 have a discharge space 11 therebetween so that the scan electrode 4 and the address electrode 8 and the sustain electrode 5 and the address electrode 8 are orthogonal to each other. They are arranged to face each other. The discharge space at the intersection of the address electrode 8 and the pair of the scanning electrode 4 and the sustain electrode 5 forms a discharge cell 12.

FIG. 2 is a diagram schematically illustrating an arrangement of electrodes of the plasma display panel of FIG. 1.

As shown in FIG. 2, the electrodes of the plasma display panel have a matrix configuration of m × n. Specifically, the address electrodes A1 to Am are arranged in the column direction and the scan electrodes of n rows in the row direction. (Y1 to Yn) (hereinafter referred to as Y electrode) and sustain electrodes X1 to Xn (hereinafter referred to as X electrode) are alternately arranged. That is, the X electrodes X1 to Xn and the Y electrodes Y1 to Yn are formed in a predetermined pattern on the back of the first glass substrate 1 to be orthogonal to the address electrodes A1 to Am. Discharge cells 12 are formed at each crossing point. The plasma forming gas is sealed in the discharge space of the discharge cell 12 and discharged by a pulse applied to the three electrodes to display an image.

As a method of driving the plasma display panel 1 having the above structure, an address and display period separated (ADS) driving method in which a subfield is driven by being divided into a reset period, an address period, and a sustain period is disclosed in the United States. It is disclosed in patent no.

3 is a view showing a driving waveform of a subfield of the plasma display panel used in the address-display separation driving method.

As shown in Fig. 3, each subfield is composed of a reset period, an address period, and a sustain period. The reset period serves to erase the wall charge state of the previous sustain discharge and to set up wall charge in order to stably perform the next address discharge.

Here, the wall charges refer to electric charges formed on the walls of the discharge cells (eg, dielectric layers) close to each electrode and accumulated in the electrodes. Such wall charges are not actually in contact with the electrodes themselves, but here wall charges are described as "formed", "accumulated" or "stacked" on the electrodes. In addition, the wall voltage refers to a potential difference formed on the wall of the discharge cell by the wall charge.

The address period is a period in which wall charges are accumulated on cells (addressed cells) that are turned on by selecting cells that are turned on and cells that are not turned on in the panel. The sustain period is a period in which a discharge for actually displaying an image on the addressed cells is performed.

FIG. 4 is a view illustrating driving waveforms that may occur when a driving circuit that applies a falling ramp waveform for erasing wall charges during a reset period in a plasma display panel driven by the driving method of FIG. 3 is broken.

In the reset period, a waveform including a rising lamp and a falling lamp is applied to the Y electrode to erase the wall charges applied by the sustain discharge. However, when the circuit for applying the falling ramp waveform is broken and the falling ramp waveform is not output, as shown in FIG. 4, the voltage Vr is maintained after the rising lamp is terminated and the wall charge applied by the sustain discharge is not erased. When the address voltage (-Vsc) for addressing is applied while the voltage Vr is maintained, the voltage of the Y electrode falls from the voltage Vr to the voltage (-Vsc). When such a malfunction occurs, the address data (Address) sustain discharge occurs in all discharge cells without data).

On the other hand, in order to control the power consumption of the plasma display panel, the number of sustain pulses is adjusted by the amount of the address data turned on. Specifically, in the case of a white gray that outputs a bright luminance with a large number of cells to be turned on, the power consumption is reduced by reducing the number of sustain discharges, and a black gray that outputs a dark luminance with a small number of cells turned on gray), the number of sustain discharges is increased to increase luminance.

However, when the number of sustain discharges is adjusted because of black gradation, as described above, if the circuit to which the down ramp waveform is applied is not damaged due to breakage of the wall charges, all discharge cells are addressed to generate sustain discharge. This greatly exceeds the power consumption control range. That is, according to the address data, when the sustain discharge occurs in all the power generation cells in a state where the number of sustain discharges is largely increased because the number of sustain discharges is small, the power consumption specified is greatly exceeded. This may not only damage the plasma display panel but also cause a fire or other problems.

SUMMARY OF THE INVENTION The present invention has been made in an effort to provide a plasma display panel and a driving method thereof capable of preventing damage to the plasma display panel even when a circuit for applying a reset down ramp waveform is broken.

The plasma display panel according to the first aspect of the present invention for solving the above technical problem,

10. A plasma display panel comprising: address electrodes arranged to intersect with scan electrodes and sustain electrodes arranged side by side; and a driving unit for applying a driving waveform to the electrodes during a reset period, an address period, and a sustain period;

Scan electrode driving unit for driving the scan electrode

A falling waveform applying unit applied to the scan electrode for resetting and applying a falling waveform gradually falling from a first voltage to a second voltage; And

A scan select voltage applying unit configured to apply a scan select voltage waveform of a third voltage applied for addressing the scan electrodes;

The falling waveform applying unit is connected to the output terminal of the falling waveform fuse element.

Here, the output terminal of the falling waveform applying unit may be connected in parallel with the output terminal of the scanning selection voltage applying unit.

An output terminal of the scan selection voltage application unit may be connected in parallel to an output terminal of the falling waveform application unit to which the fuse device is connected.

An output terminal of the falling waveform application unit may be connected in parallel to an output terminal of the scan selection voltage application unit to which the fuse device is connected.

A fuse device may be connected to an output terminal of the scan selection voltage applying unit.

The output terminal of the falling waveform applying unit may be an output terminal of the falling waveform.

The output terminal of the scan selection voltage applying unit may be an output terminal of the scan selection voltage waveform.

Plasma display panel according to a second aspect of the present invention,

10. A plasma display panel comprising: address electrodes arranged to intersect with scan electrodes and sustain electrodes arranged side by side; and a driving unit for applying a driving waveform to the electrodes during a reset period, an address period, and a sustain period;

Scan electrode driving unit for driving the scan electrode

A falling waveform applying unit applied to the scan electrode for resetting and applying a falling waveform gradually falling from a first voltage to a second voltage; And

A scan select voltage applying unit configured to apply a scan select voltage waveform of a third voltage applied for addressing the scan electrodes;

A fuse element is connected to a common output terminal of the falling waveform applying unit and the scan selection voltage applying unit.

 The output terminal of the falling waveform applying unit may be connected in parallel with the output terminal of the scan selection voltage applying unit.

Hereinafter, with reference to the accompanying drawings will be described in detail embodiments of the present invention.

5 is a diagram illustrating a scan electrode driving circuit applying a driving waveform applied to a scan electrode of a plasma display panel.

As shown in FIG. 5, the scan electrode driving circuit 200 includes a sustain voltage applying unit 210, a rising lamp applying unit 220, a falling lamp applying unit 230, and a scan driving unit 240.

In addition, the scan driver 240 includes a scan voltage applying unit 243 for applying a high level in the address period, a scan selection voltage applying unit 245 for applying a low level, and a scan IC for transmitting the voltage to be applied to the scan electrode ( 247).

The scan selection voltage applying unit 245 uses a transistor YscL and may be formed back to back to withstand high voltage although not shown.

The rising ramp applying unit 220 applies a rising ramp waveform that gradually rises to the voltage Vset using the transistor Yrr.

The falling ramp application unit 230 applies a falling ramp waveform that gradually descends from the voltage Vr to the voltage -VscL using the transistor Yfr.

Since the -VscL voltage is lower than the Vr voltage, a current path may be formed through the body diode of the transistor Yfr at the turn-on of the transistor YscL. In order to block this current path, although not shown, a transistor in which a body diode is formed in a direction opposite to the body diode of the transistor Yfr may be further formed.

The sustain voltage applying unit 210 applies a sustain pulse applied for sustain discharge in the sustain period of FIG. 3.

6 is a diagram illustrating a scan electrode driver circuit 300 according to a first embodiment of the present invention.

In the scanning electrode driving circuit 300 according to the first embodiment, the falling lamp applying unit 230 is damaged so that the falling ramp waveform is not applied and the voltage Vr is not continuously applied to the scanning electrode. The device 201 further includes a device 201 serving as a fuse at the output terminal of the applying unit 230 and a device 203 serving as a fuse at the output terminal of the scan selection voltage applying unit 245.

Therefore, in the scan electrode driving circuit 200 according to the first embodiment, when the voltage Vr is continuously applied, the element 201 is destroyed and no voltage is applied to the scan electrode anymore. This can prevent the discharge from occurring in all the discharge cells.

7 is a diagram illustrating a scan electrode driving circuit 400 according to a second embodiment of the present invention.

In the scan electrode driving circuit 400 according to the second exemplary embodiment, the falling lamp applying unit 230 is damaged so that the falling lamp waveform is not applied and the voltage Vr is not continuously applied to the scan electrode. The device 205, which functions as a fuse, is further included at the output terminals of the applying unit 230 and the scan selection voltage applying unit 245.

Therefore, in the scan electrode driving circuit 200 according to the first embodiment, when the voltage Vr is continuously applied, the element 205 is destroyed and no voltage is applied to the scan electrode anymore. This can prevent the discharge from occurring in all the discharge cells.

Also, in the second embodiment, the down ramp applying unit 230 and the scan selection voltage applying unit 245 share an output path, and more precisely, share an element 205 serving as a fuse to protect the entire panel. . Therefore, the element 205 is destroyed even if either the falling ramp application unit 230 or the scan selection voltage application unit 245 is destroyed.

That is, if the element serving as a fuse is shared, the falling lamp application unit 230 is broken and the scan selection voltage application unit is output when the fuse is blown, so that the voltage required for scanning is not supplied to the scan electrode. The problem that the discharge cell is turned on does not occur. Therefore, the screen remains black.

Although the present invention has been described above based on the preferred embodiments, the embodiments are intended to illustrate and not limit the invention. It will be apparent to those skilled in the art that various changes, modifications, and the like can be made to the embodiments without departing from the spirit of the invention. Therefore, the protection scope of the present invention will be limited only by the appended claims, and should be construed as including all changes or modifications.

According to the present invention, by connecting an element acting as a fuse to each of the output terminal of the falling lamp applying unit and the output terminal of the scanning selection voltage applying unit, it is possible to prevent sustain discharge from occurring in all discharge cells regardless of the address data due to breakage of the falling lamp applying unit. You can prevent it.

Or by sharing the output terminals of the falling lamp application section and the scan selection voltage application section and connecting the elements acting as fuses to the output terminals so that the falling lamp application section and the scan selection voltage application section share the fuse elements, the fuse element is destroyed and disconnected. In this case, since the scan selection voltage applying unit is outputted, the scan electrode is not supplied with the voltage required for scanning, so that all the discharge cells are turned on as in the prior art.

Therefore, in the case of adjusting to increase the number of sustain discharges because of black gradation, a large exceeding power consumption control range does not occur, and problems such as destruction of the plasma display panel and fire do not occur.

1 is a partially exploded perspective view illustrating a structure of a general plasma display panel.

FIG. 2 is a diagram schematically illustrating an arrangement of electrodes of the plasma display panel of FIG. 1.

3 is a diagram illustrating driving waveforms of a subfield of a plasma display panel having three electrodes described above.

FIG. 4 is a view illustrating driving waveforms that may occur when a driving circuit for applying a falling ramp waveform during a reset period is broken in a plasma display panel driven by the driving method of FIG. 3.

5 is a diagram illustrating a scan electrode driving circuit applying a driving waveform applied to a scan electrode of a plasma display panel.

6 is a diagram illustrating a scan electrode driver circuit 300 according to a first embodiment of the present invention.

7 is a diagram illustrating a scan electrode driving circuit 400 according to a second embodiment of the present invention.

Claims (9)

A plasma display panel comprising: a driving unit configured to apply a driving waveform to the electrodes for a reset period, an address period, and a sustain period; Scan electrode driving unit for driving the scan electrode A falling waveform applying unit applied to the scan electrode for resetting and applying a falling waveform gradually falling from a first voltage to a second voltage; And A scan select voltage applying unit configured to apply a scan select voltage waveform of a third voltage applied for addressing the scan electrodes; The falling waveform applying unit is a plasma display panel in which a fuse element is connected to the output terminal of the falling waveform. The method of claim 1, And an output terminal of the falling waveform applying unit is connected in parallel with an output terminal of the scanning selection voltage applying unit. The method of claim 2, And an output terminal of the scan selection voltage application unit connected in parallel to an output terminal of the falling waveform application unit to which the fuse element is connected. The method of claim 3, And an output terminal of the falling waveform application unit connected in parallel to an output terminal of the scan selection voltage applying unit to which the fuse element is connected. The method of claim 1, And a fuse device connected to an output terminal of the scan selection voltage applying unit. The method according to claim 1, wherein And an output terminal of the falling waveform applying unit is an output terminal of the falling waveform. The method according to claim 1, wherein And an output terminal of the scan selection voltage applying unit is an output terminal of the scan selection voltage waveform. A plasma display panel comprising: a driving unit configured to apply a driving waveform to the electrodes for a reset period, an address period, and a sustain period; Scan electrode driving unit for driving the scan electrode A falling waveform applying unit applied to the scan electrode for resetting and applying a falling waveform gradually falling from a first voltage to a second voltage; And A scan select voltage applying unit configured to apply a scan select voltage waveform of a third voltage applied for addressing the scan electrodes; And a fuse element connected to a common output terminal of the falling waveform applying unit and the scan selection voltage applying unit. The method of claim 8, And an output terminal of the falling waveform applying unit is connected in parallel with an output terminal of the scanning selection voltage applying unit.