KR100553207B1 - Plasma display panel and Method for driving the same - Google Patents

Abstract

The present invention provides a method of driving a plasma display panel which can reduce an address period by improving a driving waveform applied to an X electrode in an address period.

The present invention relates to a plasma display panel in which first and second electrode lines are alternately arranged side by side, address electrodes are arranged to cross the lines, and a driving waveform including a reset period, an address period, and a sustain period is applied and driven. It is a driving method. During the address period, a scan pulse of the first voltage is sequentially applied to each of the first electrodes, and a pulse of the second voltage is sequentially applied when the scan pulse of the first voltage is applied to each of the second electrodes. The second voltage is a ground voltage, and a voltage higher than the second voltage is continuously applied to each of the second electrodes before and after the pulse of the second voltage is applied.

Plasma Display Panel, Reset Period, Address Discharge, Scanning

Description

Plasma display panel and method for driving the same

1 is a partially exploded perspective view illustrating a structure of a general plasma display panel.

FIG. 2 is a diagram schematically illustrating an arrangement of electrodes of the plasma display panel of FIG. 1.

3 is a diagram illustrating driving waveforms of a subfield of a plasma display panel having three electrodes described above.

4 illustrates a driving waveform applied to a plasma display panel according to an exemplary embodiment of the present invention.

5 is a diagram schematically illustrating a configuration of a plasma display panel according to the present invention.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display panel (PDP) and a driving method thereof, and more particularly, to a plasma display panel capable of increasing display brightness and a driving method thereof.

Recently, flat display devices such as a liquid crystal display (LCD), a field emission display (FED), and a plasma display panel have been actively developed. Among the flat panel display devices, the plasma display panel has advantages of higher luminance and luminous efficiency and wider viewing angle than other flat panel display devices. Accordingly, the plasma display panel is in the spotlight as a display device to replace the conventional cathode ray tube (CRT) in a large display device of 40 inches or more.

First, a structure of a general plasma display panel will be described with reference to FIGS. 1 and 2.

1 is a partially exploded perspective view illustrating a structure of a general plasma display panel.

As shown in FIG. 1, the scan electrode 4 and the sustain electrode 5 covered with the dielectric layer 2 and the protective film 3 are arranged in parallel on the first glass substrate 1. A plurality of address electrodes 8 covered with the insulator layer 7 are provided on the second glass substrate 6. A partition 9 is formed on the insulator layer 7 between the address electrodes 8 in parallel with the address electrode 8. In addition, the phosphor 10 is formed on the surface of the insulator layer 7 and on both side surfaces of the partition wall 9. The first glass substrate 1 and the second glass substrate 6 have a discharge space 11 therebetween so that the scan electrode 4 and the address electrode 8 and the sustain electrode 5 and the address electrode 8 are orthogonal to each other. They are arranged to face each other. The discharge space at the intersection of the address electrode 8 and the pair of the scanning electrode 4 and the sustain electrode 5 forms a discharge cell 12.

FIG. 2 is a diagram schematically illustrating an arrangement of electrodes of the plasma display panel of FIG. 1.

As shown in FIG. 2, the electrodes of the plasma display panel have a matrix configuration of m × n. Specifically, the address electrodes A1 to Am are arranged in the column direction and the scan electrodes of n rows in the row direction. (Y1 to Yn) (hereinafter referred to as Y electrode) and sustain electrodes X1 to Xn (hereinafter referred to as X electrode) are alternately arranged. That is, the X electrodes X1 to Xn and the Y electrodes Y1 to Yn are formed in a predetermined pattern on the back of the first glass substrate 1 to be orthogonal to the address electrodes A1 to Am. Discharge cells 12 are formed at each crossing point. The plasma forming gas is sealed in the discharge space of the discharge cell 12 and discharged by a pulse applied to the three electrodes to display an image.

As a driving method of the plasma display panel 1 having the above structure, an address-display separation (ADS) driving method in which a subfield is driven by dividing into a reset period, an address period, and a sustain period is US. It is disclosed in patent no.

3 is a view showing a driving waveform of a subfield of the plasma display panel used in the address-display separation driving method.

As shown in FIG. 3, each subfield includes a reset period, an address period, and a sustain period.

The reset period serves to erase the wall charge state of the previous sustain discharge and to set up wall charge in order to stably perform the next address discharge. The address period is a period during which the wall charges are accumulated on the turned on cells (addressed cells) by selecting the turned on cells and the turned off cells on the panel. The sustain period is a period in which a discharge for actually displaying an image on the addressed cells is performed.

Here, the wall charge refers to a charge formed in the wall of the discharge cell (for example, the dielectric layer) close to each electrode and accumulated in the electrode. Such wall charges are not actually in contact with the electrodes themselves, but here wall charges are described as "formed", "accumulated" or "stacked" on the electrodes. In addition, the wall voltage refers to a potential difference formed on the wall of the discharge cell by the wall charge.

In such an address-display separation driving method, during the address period, as shown in FIG. 3, scan pulses of the scan voltage Vscl are sequentially applied to the Y electrodes Y1 to Yn, and a predetermined predetermined value is commonly applied to the X electrodes. The voltage Vb is continuously applied. That is, after the reset period ends, negative charges accumulate on the X electrode and the Y electrode, positive charges accumulate on the address electrode A, and an address discharge occurs when the scan pulse and the address pulse are simultaneously applied in the address period. Will occur.

Sufficient address discharge will not occur until a predetermined time has passed after the scanning pulse and the address pulse were applied. The delay time until sufficient address discharge occurs is called an address discharge delay time. This address discharge delay is a cause of failing to shorten an address period especially in driving a large panel or an HD display panel, and is a barrier to high speed driving.

 SUMMARY OF THE INVENTION The present invention has been made in an effort to provide a plasma display panel and a driving method thereof capable of reducing an address period by improving a driving waveform applied to an X electrode in an address period.

The driving method of the plasma display panel according to an aspect of the present invention for solving the above technical problem,

A method of driving a plasma display panel in which first and second electrode lines are alternately arranged side by side, address electrodes are arranged to cross the lines, and a driving waveform including a reset period, an address period, and a sustain period is applied and driven. ,

During the address period,
Sequentially applying a scanning pulse of a first voltage to each of the first electrodes; And

A second voltage lower than the predetermined voltage to the second electrode corresponding to the first electrode when a predetermined voltage is continuously applied to each of the second electrodes and a scan pulse of the first voltage is applied to the first electrode; Sequentially applying a pulse of voltage.
The second voltage may be a ground voltage.

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A voltage higher than the second voltage may be continuously applied to each of the second electrodes before and after the pulse of the second voltage is applied.

Plasma display panel according to another aspect of the present invention,

A display panel in which scan and sustain electrodes are alternately arranged side by side and address electrodes are arranged to cross the lines; And

A driving unit which applies a corresponding driving waveform for each of the reset period, the address period, and the sustain period to the scan and sustain electrodes, wherein a scan pulse of a first voltage is applied to a selected electrode of the scan electrodes during the address period and is not selected. A voltage higher than the first voltage is applied to an electrode, and a pulse of the second voltage is applied to a selection electrode of the sustain electrodes when a scan pulse of the first voltage is applied, and a voltage higher than the second voltage is applied to an electrode not selected. It includes a driver for applying a high voltage.

Hereinafter, with reference to the accompanying drawings will be described in detail embodiments of the present invention.

4 illustrates a driving waveform applied to a plasma display panel according to an exemplary embodiment of the present invention.

First, during the reset-period, a waveform including a rising ramp section rising from the potential Vs to the potential Vset and a falling ramp section falling from the potential Vs to the potential Vnf is applied to the Y electrode. Is approved. This waveform is applied to form the wall charges of all the discharge cells in the same state after the last sustain period ends. Therefore, regardless of whether discharge occurred during the last sustain period or not, discharge cells accumulate on the Y electrode in the rising lamp section and weakly discharge the wall charges accumulated in the falling lamp section in all discharge cells. The charges are in the same state.

Next, during the address period (Address-period), the scan high voltage Vsch is applied to each of the Y electrodes Y1 to Yn, and the scan pulse a of the scan low voltage Vscl is sequentially applied and scanned. At the same time, a voltage Vb is continuously applied to each of the X electrodes X1 to Xn, and then a pulse b of a voltage lower than the voltage Vb is sequentially applied. When the Y electrode is scanned, the address voltage Va is applied to the address electrode of the cell requiring addressing to perform addressing.

That is, the scanning pulse a1 is applied to the electrode Y1, and the pulse b1 is also applied to the electrode X1 at the same time. At the same time as the scanning pulse a1 is applied, the address pulse of the voltage Va is applied to the address electrodes of the cells that need addressing among the address electrodes A1 to Am to perform addressing.

In this way, by applying pulses not only to the Y electrode but also to the X electrode during the address period, the electrons accumulated on the X electrode and the electrons accumulated on the Y electrode immediately participate in address discharge as space charges at the same time. The address discharge delay time can be shortened. Therefore, the address period can be shortened and high-speed driving of the display panel can be realized.

In addition, the electrons accumulated on the X electrode and the electrons accumulated on the Y electrode simultaneously participate in address discharge. Even if the address voltage Va applied to the address electrode is lowered in the address period, sufficient address discharge can occur.

When the positive voltage Vb is applied to the X electrode again after the pulse b is applied, electrons in the space charge generated by the address discharge are accumulated on the X electrode. As a result, the negative charge generated by the address discharge is accumulated on the X electrode, and the positive electrode is accumulated on the Y electrode, thereby achieving effective and reliable addressing.

5 is a diagram schematically illustrating a configuration of a plasma display panel according to the present invention.

As shown in FIG. 5, the plasma display panel according to the present invention includes a plasma panel 100, a controller 200, an address driver 300, an X electrode driver 400, and a Y electrode driver 500.

The plasma panel 100 includes a plurality of address electrodes A1 to Am arranged in a column direction, a plurality of sustain electrodes X1 to Xn arranged in a row direction, and a scan electrode Y1 to Yn. .

The controller 200 receives the image signal from the outside and controls the X electrode driving driving circuit signal, the Y electrode driving driving signal, and the address electrode driving signal to be output.

The X electrode driver 400 receives the X electrode driving control signal from the controller 200 and applies a driving voltage to the X electrode.

The Y electrode driver 500 receives a Y electrode driving control signal from the controller 200 and applies a driving voltage to the Y electrode.

Specifically, as shown in FIG. 4, the Y electrode driver 200 applies the scan high voltage Vsch to the Y electrodes Y1 to Yn during the address period (period), and sequentially applies the scan low voltage Vscl. The scanning pulse a is applied.

Like the Y electrode, the X electrode driver 400 continuously applies the voltage Vb to the X electrodes X1 to Xn and sequentially applies the pulse b of the ground voltage.

When the scan pulse is applied to the Y electrode, the address driver 300 applies the address voltage Va to the address electrode of the cell to which the address is required to perform addressing.

For example, the Y electrode driver 500 applies the scan pulse a1 to the electrode Y1, and at the same time, the X electrode driver 400 also applies the pulse b1 to the electrode X1. At the same time the scan pulse a1 is applied, the address driver 300 applies the address pulse of the voltage Va to the address electrode of the cell that needs addressing among the address electrodes A1 to Am.

In this way, the address period can be shortened, and high-speed driving of the display panel can be realized.

Although the present invention has been described above based on the preferred embodiments, the embodiments are intended to illustrate and not limit the invention. It will be apparent to those skilled in the art that various changes, modifications, and the like can be made to the embodiments without departing from the spirit of the invention. Therefore, the protection scope of the present invention will be limited only by the appended claims, and should be construed as including all changes or modifications.

According to the present invention, the address discharge delay time can be shortened by applying pulse voltage to the X electrodes as well as the X electrodes sequentially. That is, by shortening the address discharge delay time, the address period can be shortened and high-speed driving of the display panel can be realized.

Further, immediately after the reset period, electrons accumulated in the Y electrode and the X electrode can all participate in the address discharge, so that sufficient address discharge can occur even at a low address voltage, thereby reducing power consumption of the entire plasma display panel.

Claims (4)

In the driving method of the plasma display panel in which the first and second electrode lines are arranged side by side alternately, the address electrodes are arranged to cross the lines, and a driving waveform including a reset period, an address period and a sustain period is applied and driven. In During the address period, Sequentially applying a scanning pulse of a first voltage to each of the first electrodes; And A second voltage lower than the predetermined voltage to the second electrode corresponding to the first electrode when a predetermined voltage is continuously applied to each of the second electrodes and a scan pulse of the first voltage is applied to the first electrode; A method of driving a plasma display panel comprising sequentially applying a pulse of voltage. The method of claim 1, And the second voltage is a ground voltage. The method of claim 1, And a constant voltage higher than the second voltage is continuously applied to each of the second electrodes before and after the pulse of the second voltage is applied. In the plasma display panel, A display panel in which scan and sustain electrodes are alternately arranged side by side and address electrodes are arranged to cross the lines; And A driving unit which applies a corresponding driving waveform to each of the scan and sustain electrodes for a reset period, an address period, and a sustain period. A voltage higher than the first voltage is applied to the second electrode, and when a scan pulse of the first voltage is applied to a selection electrode of the sustain electrodes, a pulse of the second voltage is applied and an electrode higher than the second voltage to an electrode not selected. Driver for applying voltage Plasma display panel comprising a.

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