KR20040095829A - Liquid crystal display device comprising metal shield line and fabrication method thereof - Google Patents

Abstract

PURPOSE: An LCD(Liquid Crystal Display) including a metal shield line and a method for manufacturing the LCD are provided to form a redundancy pattern to prevent back light from affecting data lines. CONSTITUTION: An LCD includes a TFT(Thin Film Transistor) array substrate(300) on which a plurality of gate lines(301), data lines(306) intersecting the gate lines, metal shield lines(302) and a TFT are formed, a color filter substrate facing the TFT array substrate, liquid crystal, the first and second polarizers, and a back light unit. The metal shield lines are formed on the plane on which the gate lines are formed. The data lines are superposed on the metal shield lines. The TFT is formed at each of the intersections of the gate lines and data lines. The liquid crystal is filled between the array substrate and color filter substrate. The first polarizer is formed on the bottom face of the TFT array substrate. The second polarizer is formed on the top face of the color filter substrate. The back light unit is located under the first polarizer.

Description

Liquid crystal display device including metal shield line and manufacturing method thereof {LIQUID CRYSTAL DISPLAY DEVICE COMPRISING METAL SHIELD LINE AND FABRICATION METHOD THEREOF}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to the structure of a TFT array substrate constituting one panel of a liquid crystal display device, and more particularly, to forming a metal shield line under a data line of a TFT array substrate.

The liquid crystal display device is largely classified into a TFT array substrate including a switching element for controlling the driving of a unit element and a color filter substrate for representing information in color.

In the above description, an array substrate including a thin film transistor is also called a TFT array substrate because a thin film transistor (TFT) is mainly used as the switching element.

A lower portion of the TFT array substrate is provided with a first polarizing plate for polarizing light irradiated onto the substrate and a backlight as a light source irradiated with the first polarizing plate and the TFT array substrate.

A schematic structure of the liquid crystal display device will be described in detail with reference to FIG. 1.

As shown in FIG. 1, the liquid crystal display may be divided into a first substrate 101 including a TFT element and a second substrate 102 including a color filter layer.

The first polarizing plate 103 for polarizing the light irradiated to the first substrate side is positioned below the first substrate including the TFT element, and the backlight 104 is used as a light source for the light irradiated to the first polarizing plate and the first substrate side. It is provided.

One side of the second substrate 102 is provided with a sub color filter layer of an organic material for displaying information in color and a second polarizing plate 105 for polarizing transmitted light.

In some cases, as illustrated in FIG. 1, a quarter wave length film (106, 107) for rotating a phase of transmitted light by 90 degrees may be disposed between the TFT array substrate 101 and the first polarizing plate 103. One each may be placed between the color filter substrate 102 and the second polarizer 105.

In addition, the liquid crystal is filled between the TFT array substrate 101 and the color filter substrate 102.

The light oscillated from the backlight is polarized into light that vibrates only in a predetermined direction while passing through the first polarizing plate 103.

The light passing through the first polarizing plate 103 passes through the liquid crystal having dielectric anisotropy and passes through the first polarizing plate 103 and the second polarizing plate 105 arranged at 90 degrees with the polarization direction thereof.

The liquid crystal has a property that the arrangement direction thereof may be changed by an electric field applied by the pixel electrode 108 on the TFT substrate 101 and a common electrode (not shown) on the color filter substrate 102. The phase difference is shown depending on which direction the liquid crystal passes through.

That is, the phase difference does not occur when the polarized light passes the long axis of the liquid crystal, and the phase difference occurs when the polarized light passes the short axis of the liquid crystal. The light passing through the short axis of the liquid crystal exhibits a phase difference of up to 180 degrees, and the light passing through the liquid crystal changes its vibration direction by 90 degrees. Depending on the angle at which light passes between the long and short axes of the liquid crystal, the phase difference varies between 0 degrees and 180 degrees and the vibration direction of the light varies between 0 degrees and 90 degrees.

The light passes through the liquid crystal display in order of the first polarizing plate 103, the liquid crystal, and the second polarizing plate 105, and adjusts the transmittance of the light to display information on the screen.

The 1/4 λ films 106 and 107 may change circularly polarized light into linearly polarized light or linearly polarized light into circularly polarized light, and may increase the contrast ratio of the liquid crystal display and widen the viewing angle.

The backlight 104 is usually composed of a fluorescent lamp and is divided into a corner type and a direct type according to its position. Corner type backlights are suitable for video display devices, such as laptops and monitors, which require a thin screen, and direct type backlights are suitable for video display devices, where the brightness is more important than the thickness of video display devices.

Referring to the TFT array substrate of the liquid crystal display device, the TFT array substrate includes a gate line, a gate insulating film for insulating the gate line, a semiconductor layer serving as a channel on the gate insulating film, the semiconductor layer and a source / drain electrode; And a high concentration N layer for ohmic contact, a conductive film for source / drain electrodes, a protective film for protecting the TFT element, and a pixel electrode.

In particular, when the cross-section of the liquid crystal display device is shown with the cut line J of FIG. 1, the liquid crystal display device has a gate insulating film 203 deposited on the substrate 200, and an active layer 204 on the gate insulating film. ) And a high concentration N layer 205 which is in ohmic contact with the data line 206 and serves as a redundancy wiring in the event of a short circuit of the data line. The data line 206 is wired on the N + layer 205 described above.

However, when the light energy irradiated from the backlight is irradiated to the active layer formed under the data line, the electrons present in the active are activated by the backlight light and interact with the electrons flowing through the data line, that is, the data signal. There is a problem in that it distorts the data signal and acts as noise on the screen.

The present invention forms a redundancy pattern in the step of forming a gate line in order to solve the problem that distortion occurs in the flow of electrons flowing through the data line by the light energy of the backlight as a result and noise occurs on the screen. This aims to block back light from affecting the data line.

In addition, when the gate wiring is formed through wet etching, the etching liquid is blocked by the metal shield line, and an object thereof is prevented.

1 is a perspective view schematically showing the structure of a conventional liquid crystal display device.

FIG. 2 is a cross-sectional view taken along line J of FIG. 1. FIG.

3 is a perspective view schematically showing the structure of a TFT array substrate of a liquid crystal display device of the present invention;

4 is a cross-sectional view of the substrate, taken along line K of FIG. 3;

5 is a cross-sectional view showing a metal shield line structure of the present invention.

6A to 6E are flowcharts illustrating a process of manufacturing a TFT array substrate including the metal shield line of the present invention.

*********** Explanation of symbols for the main parts of the present invention **********

300: substrate 302: metal shield line

403: gate insulating film 404: amorphous silicon film

405: N + layer 306: data wiring

307: pixel electrode 308: protective film

The liquid crystal display device of the present invention includes a plurality of gate wirings arranged horizontally in rows, data wirings perpendicular to the gate wirings, metal shield lines overlapping the data wirings and formed on the same plane as the gate wirings, the gate wirings and the data. A TFT array substrate including TFTs as switching elements formed at intersections of wirings, a color filter substrate facing the TFT array substrate and displaying images in color, and filled between the color filter substrate and the TFT array substrate And a liquid crystal, a first polarizing plate provided at a lower end of the TFT array substrate, a second polarizing plate provided at an upper end of the color filter substrate, and a back light formed at a lower end of the first polarizing plate and serving as a light source. It features.

In particular, the metal shield line formed on the TFT array substrate is characterized in that formed in a plurality of patterns divided into islands.

As shown in FIG. 1, the liquid crystal display device of the present invention is a TFT array including a first polarizing plate, a first 1/4 lambda film for converting circularly polarized light into linearly polarized light or circularly polarized light, and a TFT as a switching element. An upper portion of the liquid crystal display device including a lower substrate of a liquid crystal display device including a substrate, a color filter substrate for displaying information displayed by the liquid crystal display device in color, and a second 1 / 4λ film and a second polarizing plate. It consists of a substrate. One side of the lower substrate is provided with a backlight for supplying light to the liquid crystal panel. In addition, the liquid crystal is filled between the upper substrate and the lower substrate.

The device to be improved by the present invention relates to a TFT array substrate of liquid crystal display devices, and the TFT array substrate of the present invention will be described with reference to FIGS. 3 and 4. FIG. 3 is a schematic view of the TFT array substrate of the present invention, and FIG. 4 is a view showing a cut surface of the TFT array substrate when the K line of FIG. 3 is a cut line.

The TFT array substrate of the present invention has a metal shield line 302 and a gate wiring (300) which prevent the light of the backlight from being directly irradiated to the data line 306 and the gate wiring 301 formed at regular intervals in rows on the substrate. A gate insulating film 403 that protects and insulates the 301 and the metal shield line 302 is formed over the entire substrate.

Then, active layers 404 and 405 are formed on the substrate on which the gate insulating film 403 is formed as a channel layer of the TFT. The active layer is composed of an amorphous silicon layer 404 and a highly doped N layer 405. The N + layer 405 is conductive for ohmic contact with a source / drain electrode (not shown) to be formed on top of the N + layer. In addition, the N + layer 405 also serves as a redundancy pattern to compensate for a short circuit occurring in the data line 306 including the source electrode.

Since the N + layer 405 functions as a redundancy pattern of the data line 306, the N + layer 405 is formed in the same pattern as the data line.

As shown in FIG. 4, the amorphous silicon layer 404 does not need to exist as the semiconductor layer, but the amorphous silicon layer 404 and the N + layer 405 are formed in succession, and the N + layer 405 is a data line 306. Since it is used as a redundancy pattern, an active layer may exist as shown in FIG. 4 to pattern the active layer and the pattern of the N + layer 405 with one mask.

After formation of the semiconductor layer, a source, a drain electrode pattern (not shown), and a data line 306 are formed on the semiconductor layer. The data wiring 306 including the source electrode is configured to match the pattern of the N + layer formed on the semiconductor layer as mentioned above.

A pixel electrode 307 having a protective film 308 formed on the data line 306 and making electrical contact with the drain electrode and applying an electric field to the liquid crystal through a contact hole (not shown) formed on the protective film. Is formed.

In particular, the metal shield line 302 is subjected to a wet etching and cleaning process. In the wet etching and cleaning process, the metal shield line acts as an obstacle to the discharge of foreign matter, and is divided into an island shape to improve the problem that the foreign matter is not easily removed. Metal shield lines may be formed.

5 is a view illustrating the shape of the metal shield line 302 of the present invention, and the metal shield lines may be formed in island-like patterns separated by a predetermined distance, respectively. In particular, the direction in which the metal shield lines are separated is an etchant. It forms so that it may coincide with the longitudinal direction of the gate wiring by which an etching advances by dispersion. This is because the smooth flow of food solution on the substrate is important for preventing foreign matter from remaining on the substrate. In addition, the shape of the divided metal shield line may be streamlined for the smooth flow of the cleaning liquid or the etching liquid. (B of FIG. 5).

The manufacturing process of the TFT array substrate of the liquid crystal display element of this invention is demonstrated through FIG.

6 is a cross-sectional view illustrating a process of forming a cross section when the line K of FIG. 3 is used as a cut surface.

A gate metal layer for forming a gate electrode and gate wiring and a metal shield line on the TFT array substrate is deposited by a sputtering method. The metal shield line is the same kind of metal as the gate metal, and aluminum (Al) or Al alloy may be used as the metal used. FIG. 6A illustrates a metal shield line 601 formed on the substrate 600.

Referring to the process of forming the metal shield line pattern on the substrate 600 in more detail to form a thin film of Al on a transparent glass substrate. The Al thin film is formed on the glass substrate through the sputtering method. The sputtering method is a technique in which an inert gas ionized by electrons accelerated at high speed by a magnetic field collides with a target material, and scattered particles are formed as thin films on the substrate. Argon (Ar) gas is mainly used as an inert gas.

After the gate metal is formed on the substrate, a pre-cleaning process is performed to remove foreign substances generated during the sputtering process.

The photoresist is coated on the substrate after the cleaning process by spin coating. After the PR is coated, a PR pattern for forming a gate electrode pattern, a gate wiring pattern, and a metal shield line is formed on the substrate using a mask.

There are two types of PR, positive type and negative type, which cannot be removed at first, but PR which removes the PR area exposed to light when it is exposed to light is called positive PR. Is called negative PR. Positive type PR or negative type PR can be selected and used according to a use.

Next, a developing process is performed to remove the exposed PR. The shape step is to remove PR exposed by the mask using a developing solution.

An etch process is performed on the developed substrate. The etching process can be divided into wet etching and dry etching. Wet etching is a method of removing a metal thin film not covered with PR using an etching solution, and dry etching removes a metal thin film on a substrate not covered with PR through a plasma gas. It is a process to do it.

In general, the pattern of the metal formed through wet etching shows isotropic etching property, and the etching made through dry etching shows anisotropic property. Types of wet etching include dip etching, which forms the entire substrate in an etching solution, and spray etching, which sprays the etching solution with a spray method. The dip etching method is excellent in isotropic properties, and the spray etching method may form anisotropic etching.

Wet etching is mainly used to form a tapered metal pattern. The tapered gate pattern is an essential process in order to reduce a step in a future process.

If the step pattern is too high, a short circuit may occur due to the step difference in the gate pattern in the deposition process of the thin film. In particular, when the spray etching method is used, the substrate moves perpendicularly to the spray injection direction, and the direction is the length direction of the gate wiring. Therefore, the metal shield line formed on the same substrate perpendicular to the gate wiring serves as an obstacle to prevent the sprayed etchant from flowing smoothly on the substrate.

Therefore, it is necessary to form a metal shield line by dividing so that the etchant flows smoothly on the substrate. In particular, the metal shield line is divided to be parallel to the longitudinal direction of the gate line to help the flow of the etchant.

When aluminum is used as the gate metal, a mixed solution of H ₃ PO ₄ , HNO ₃ and CH ₃ COOH is mainly used as a wet etching solution. CH ₃ COOH is a determinant of acid concentration and HNO ₃ is a chemical added for the purpose of etching tapered shapes.

After the etching process, the PR forming the pattern should be completely removed. The PR stripping process is a PR stripping process, which includes a wet stripping process in a strip solution and a dry stripping process using plasma gas.

The dry strip process oxidizes and blows away the remaining PR by blowing oxygen active species into the substrate on which the strip process is to be performed.

The substrate after the above process must completely remove foreign substances remaining in the etching process or the PR removal process. If the foreign matter is not properly removed, the foreign matter acts as a factor for generating a step in the subsequent process, which causes a short circuit in the wiring.

Therefore, the post-cleaning process is performed to a board | substrate after PR removal is complete.

The post-cleaning process removes the foreign matter by passing the substrate under the nozzle through which the cleaning solution is injected, which often occurs when the foreign matter is caught in the metal shield line and is not completely removed. Such foreign matters cause a step and cause defects.

Since the metal shield line is a bad factor in removing the foreign matter, it is another reason for improving the shape of the metal shield line.

According to the present invention, the shape of the metal shield line is divided into island-shaped structures so that foreign materials can easily escape the metal shield line during the cleaning process. In addition, the metal shield line is streamlined to remove foreign materials more easily. You can do that.

The metal shield line is formed to prevent light energy oscillating from the backlight under the substrate directly affecting the mobility of electrons flowing through the data line by directly irradiating the active layer below the data line. When forming the shield line, some backlight light energy may be transmitted to the data line, but due to the effect, the metal shield line is divided into island-like structures as described above to remove foreign substances during the wet etching or cleaning process. Effective in

After the gate wiring and the metal shield line are formed, as shown in FIG. 6B, the gate insulating layer 602 is formed on the metal shield line. The gate insulating film may be formed by a PECVD method. PECVD is a technique of generating a plasma gas and particles decomposed by the plasma gas recombine on a substrate to form a thin film. Usually, an inorganic film is formed by PECVD method. As the gate insulating film, a silicon nitride film (SiNx), a silicon oxide film (SiO ₂ ), or the like is mainly used.

After the gate insulating film 602 is formed, a semiconductor layer used as an active layer is formed. The semiconductor layer is composed of an amorphous silicon film 603 and a high concentration of N layer 604, and the amorphous silicon film and the N + film are successively deposited.

A conductive film 605 to be used as the source, drain electrode and data line is formed on the semiconductor layer.

FIG. 6C illustrates a semiconductor layer and the conductive film formed on the gate metal in succession, and a PR 606 is applied thereon. The PR is formed through a photolithography process, and the semiconductor layer 603 and 604 and the conductive film 605 for forming data lines are etched and removed by applying the PR pattern as a mask.

FIG. 6D shows the patterned PR film 606a, and FIG. 6E shows the semiconductor layers 603 and 604 and the data lines on the patterned metal shield line 601 by etching. The metal shield line 601 overlaps the data line 605 vertically to protect the data line 605 from backlight light and to prevent the generation of noise in the data line.

The N + layer 604 is formed to coincide with the data line 605 to serve as a redundancy pattern of the data line.

As described above, the active layer under the N + layer may overlap the data line and may not exist below the data line, but in the configuration of the present invention in which a data redundancy pattern is formed, the N + layer and the active layer are stacked to simplify the process. The structure is suitable.

After the data line is formed, the passivation layer 608 is formed to protect the data line, and the pixel electrode 607 is formed on the passivation layer. The pixel electrode serves to apply an electric field to the liquid crystal along with a common electrode formed on the color filter substrate. In addition, it is connected to the drain electrode through a contact hole formed on the passivation layer 608.

The finest part of the manufacturing process of a TFT array substrate is the manufacturing process of TFT demonstrated above. After the TFT device is formed on the substrate, the defect of each unit device is tested, and if there is no defect, an alignment film for initial alignment of the liquid crystal is formed and a rubbing process is performed. After the rubbing process, a seal pattern is formed outside the pixel region of the TFT array substrate to maintain the liquid crystal in the space generated by bonding with the color filter formed through a separate process and to maintain the space between the substrates. Next, the TFT array substrate forming one panel of the liquid crystal display device is completed by dispersing the spacers in the resultant product.

The present invention forms a metal shield line coincident with the gate data line when forming the gate wiring so that light emitted from the backlight is not directly irradiated to the data line, thereby preventing the data signal applied through the data line from shaking. In addition, it is possible to prevent noise of the pixel generated due to the shaking of the data signal.

In addition, by separating the metal shield line into an island shape, foreign matters are not smoothly removed by the metal shield line during the cleaning process. By removing the foreign matter smoothly during the cleaning process, there is an effect of preventing the step caused by the foreign matter and preventing the short circuit of the wiring due to the step.

Claims (11)

A plurality of gate wirings formed on the substrate; A plurality of data lines perpendicular to the gate lines; A thin film transistor formed at each intersection of the gate line and the data line and including a gate electrode, a gate insulating layer, a channel layer, and a source / drain electrode; A pixel electrode connected to the drain electrode; And a metal shield line formed along the data line to block light emitted to the data line. The TFT array substrate as claimed in claim 1, wherein the metal shield line is divided into a plurality of islands. 3. The TFT array substrate as claimed in claim 2, wherein the gate shield line is streamlined. 3. The TFT array substrate according to claim 2, wherein the mecha shield line is divided in a direction parallel to the gate wiring. The TFT array substrate according to claim 1, wherein the metal shield line and the data line are separated from each other by an insulating layer and an active layer. The TFT array substrate according to claim 1, wherein the metal shield line is formed on the same plane as the gate wiring. 6. The TFT array substrate according to claim 5, wherein the metal shield line is insulated from the gate wiring. Forming a gate wiring and a metal shield line on the substrate; Forming a gate insulating film on the gate wiring and the metal shield line; Forming an active layer on the insulating film; Forming a source / drain electrode and a data wiring; Forming a protective film; A method of manufacturing a TFT array substrate comprising a metal shield line, comprising forming a pixel electrode. 8. The method of claim 7, wherein the metal shield line is divided into a plurality of islands and patterned. The method of claim 7, wherein the metal shield line is formed along a data line to block light irradiated onto the data line. The method of claim 7, wherein the gate line and the metal shield line are insulated from each other.