KR20040090585A - Energy recovery apparatus and method of plasma display panel - Google Patents

Abstract

PURPOSE: An energy recovery apparatus of a plasma display panel and a recovery method thereof are provided to limit a current flowing in an inductor according to a period of a sustain waveform. CONSTITUTION: A panel capacitor(Cp) is formed equivalently in the first and the second electrode. A sustain voltage source(Vs) generates a sustain voltage(Vs), and the first switch(Q1) is connected between the sustain voltage source and the first electrode of the panel capacitor. The second switch(Q2) is connected between the first switch and a ground voltage source(GND). The third switch(Q3) is connected the sustain voltage source(+Vs) and the second electrode of the panel capacitor. The fourth switch(Q4) is connected between the third switch and the ground voltage source. The first and the second inductor(L1,L2) are connected to the panel capacitor in parallel. And the fifth and the sixth switch(Q5,Q6) are connected between the first and the second inductor, and are connected to the second inductor in parallel.

Description

Energy recovery apparatus and recovery method of plasma display panel {ENERGY RECOVERY APPARATUS AND METHOD OF PLASMA DISPLAY PANEL}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an energy recovery apparatus and a recovery method of a plasma display panel, and more particularly, to an energy recovery apparatus and a recovery method of a plasma display panel that can limit a current flowing in an inductor according to a period of a sustain waveform.

Recently, various flat panel displays have been developed to reduce weight and volume, which are disadvantages of cathode ray tubes. Such flat panel displays include liquid crystal displays (LCDs), field emission displays (FEDs), plasma display panels (hereinafter referred to as "PDPs"), and electroluminescence (Electro). -Luminescence (EL) display.

PDP is a display device using a gas discharge has the advantage that it is easy to manufacture a large panel. As a PDP, a three-electrode AC surface discharge type PDP having three electrodes and driven by an alternating voltage is typical.

Referring to FIG. 1, a discharge cell of a three-electrode AC surface discharge type PDP includes a first electrode 12Y and a second electrode 12Z formed on the upper substrate 10, and an address formed on the lower substrate 18. An electrode 20X is provided.

The upper dielectric layer 14 and the passivation layer 16 are stacked on the upper substrate 10 having the first electrode 12Y and the second electrode 12Z side by side. Wall charges generated during plasma discharge are accumulated in the upper dielectric layer 14. The protective layer 16 prevents damage to the upper dielectric layer 14 due to sputtering generated during plasma discharge, and increases emission efficiency of secondary electrons. As the protective film 16, magnesium oxide (MgO) is usually used.

The lower dielectric layer 22 and the partition wall 24 are formed on the lower substrate 18 on which the address electrode 20X is formed, and the phosphor 26 is coated on the surfaces of the lower dielectric layer 22 and the partition wall 24. The address electrode 20X is formed in the direction crossing the first electrode 12Y and the second electrode 12Z. The partition wall 24 is formed in parallel with the address electrode 20X to prevent ultraviolet rays and visible light generated by the discharge from leaking to the adjacent discharge cells.

The phosphor 26 is excited by ultraviolet rays generated during plasma discharge to generate visible light of any one of red, green, and blue. Inert gas for gas discharge is injected into the discharge space provided between the upper and lower plates and the partition wall.

The three-electrode AC surface discharge type PDP is driven by being divided into a plurality of subfields, and gray scale display is performed by emitting light a number of times proportional to the weight of video data in each subfield period. The subfield is driven again by being divided into an initialization period, an address period, a sustain period, and an erase period.

Here, the initialization period is a period during which uniform wall charges are formed in the discharge cells, the address period is a period during which selective address discharge occurs according to the logic value of the video data, and the sustain period is a discharge cell in which the address discharge has occurred. Is a period for maintaining the discharge. The erasing period is a period of erasing the sustain discharge generated in the sustain period.

The address discharge and the sustain discharge of the AC surface discharge PDP driven in this way require a high voltage of several hundred volts or more. Therefore, an energy recovery apparatus is used to minimize the driving power required for the address discharge and the sustain discharge. The energy recovery apparatus recovers the voltage between the first electrode 12Y and the second electrode 12Z and uses the voltage recovered as the drive voltage at the next discharge.

Referring to FIG. 2, the energy recovery devices 30 and 32 of the plasma display panel proposed by Weber (USP-5081400) are symmetrically installed with the panel capacitor Cp interposed therebetween. Here, the panel capacitor Cp equivalently represents the capacitance formed between the first electrode Y and the second electrode Z. FIG. The first energy recovery device 30 supplies a sustain pulse to the first electrode (Y). The second energy recovery device 32 supplies a sustain pulse to the second electrode Z while operating alternately with the first energy recovery device 30.

The configuration of the energy recovery devices 30 and 32 of the conventional plasma display panel will be described with reference to the first energy recovery device 30. The first energy recovery device 30 includes the inductor L connected between the panel capacitor Cp and the source capacitor Cs, and the first and the first connected in parallel between the source capacitor Cs and the inductor L. Three switches S1 and S3 and second and fourth switches S2 and S4 connected in parallel between the panel capacitor Cp and the inductor L are provided.

The second switch S2 is connected to the sustain voltage source Vs, and the fourth switch S4 is connected to the ground voltage source GND. The source capacitor Cs recovers and charges a voltage charged in the panel capacitor Cp during sustain discharge, and supplies the charged voltage to the panel capacitor Cp again. The source capacitor Cs is charged with a voltage of Vs / 2 corresponding to half of the sustain voltage source Vs. The inductor L forms a resonance circuit together with the panel capacitor Cp. The first to fourth switches S1 to S4 control the flow of current.

Meanwhile, the fifth and sixth diodes D5 and D6 respectively provided between the first and second switches S1 and S2 and the inductor L prevent the current from flowing in the reverse direction.

3 is a timing diagram and waveform diagrams illustrating on / off timing of the first energy recovery device switches and an output waveform of the panel capacitor.

The operation process will be described in detail assuming that the panel capacitor Cp is charged with a voltage of 0 volts and the source capacitor Cs is charged with a voltage of Vs / 2 before the T1 period.

In the T1 period, the first switch S1 is turned on to form a current path from the source capacitor Cs to the first switch S1, the inductor L, and the panel capacitor Cp. When the current path is formed, the voltage of Vs / 2 charged in the source capacitor Cs is supplied to the panel capacitor Cp. At this time, since the inductor L and the panel capacitor Cp form a series resonant circuit, the panel capacitor Cp is charged with a Vs voltage that is twice the voltage of the source capacitor Cs.

In the T2 period, the second switch S2 is turned on. When the second switch S2 is turned on, the voltage of the sustain voltage source Vs is supplied to the first electrode Y. The voltage of the sustain voltage source Vs supplied to the first electrode Y prevents the voltage of the panel capacitor Cp from falling below the sustain voltage source Vs so that the sustain discharge occurs normally. On the other hand, since the voltage of the panel capacitor Cp has risen to Vs in the period T1, the driving power supplied from the outside to cause the sustain discharge is minimized.

In the T3 period, the first switch S1 is turned off. At this time, the first electrode Y maintains the voltage of the sustain voltage source Vs for the period of T3. In the T4 period, the second switch S2 is turned off and the third switch S3 is turned on. When the third switch S3 is turned on, a current path is formed from the panel capacitor Cp to the source capacitor Cs through the inductor L and the third switch S3 to charge the panel capacitor Cp. The voltage is recovered to the source capacitor Cs. At this time, the source capacitor Cs is charged with a voltage of Vs / 2.

In the T5 period, the third switch S3 is turned off and the fourth switch S4 is turned on. When the fourth switch S4 is turned on, a current path is formed between the panel capacitor Cp and the base voltage source GND, so that the voltage of the panel capacitor Cp drops to zero volts. In the T6 period, the state of T5 is maintained for a certain time. In fact, the AC drive pulses supplied to the first electrode Y and the second electrode Z are obtained by periodically repeating the periods T1 to T6.

Meanwhile, the second energy recovery device 32 alternately operates with the first energy recovery device 30 to supply a driving voltage to the panel capacitor Cp. Accordingly, the sustain capacitor voltage Vs having opposite polarities are supplied to the panel capacitor Cp. As described above, since the sustain pulse voltage Vs having opposite polarities are supplied to the panel capacitor Cp, sustain discharge occurs in the discharge cells.

However, these conventional energy recovery devices 30 and 32 are the first energy recovery device 30 provided on the first electrode (Y) side and the second energy recovery device (32) provided on the second electrode (Z) side. Each operation requires a large number of circuit components (switching elements, etc.), thereby increasing the manufacturing cost. In addition, a large amount of power is consumed due to the conduction loss of a plurality of switches on the path of current.

On the other hand, referring to Figure 4, the energy recovery device of the plasma display panel proposed by 'NEC (USP-5670974) is equivalent to the capacitance formed between the scan electrode and the sustain electrode of the plasma display panel (1) The panel capacitor 40 shown, the charge-discharge circuit part 2 and the voltage clamp part 3 connected in parallel with the panel capacitor Cp are provided. In particular, the charge / discharge circuit part 2 is connected to the panel capacitor 40 of the panel 1 in parallel and the coil 8 to recharge to the reverse polarity of the resonant current generated during the discharge of the panel capacitor 40, and 2 Two switches 12, 13. These two switches 12, 13 form a bidirectional switch with respect to the coil 8. That is, one side of the panel capacitor 40 has two switches 12 and 13 formed by the N-channel FET controlled by each of the other switch driving input signals IN5 and IN6 supplied to the gate terminal and each of the two switches 12 and 13. Reverse current blocking diodes 10, 11 connected in series to the switches 12, 13 are connected in series. On the other side of the panel capacitor 40, a coil 8 connected in parallel and one end of the resistor 9 are connected. At this time, the other ends of the coils 8 and the resistors 9 connected in parallel are commonly connected to the other ends of the diodes 10 and 11. The panel capacitor 40 and the charge / discharge circuit 2 of the panel 1 described above form a parallel resonance circuit. On the other hand, the resistor 9 connected in parallel to the coil 8 of the charge / discharge circuit part 2 is a dumping resistor provided in order to prevent vibration of a waveform.

The voltage clamp part 3 is composed of first to fourth switches 4, 5, 6 and 7, wherein the first and third switches 4 and 6 are connected to one end of the panel capacitor 40. The power supply voltage sources GND and -VS are respectively connected, and the second and fourth switches 6 and 7 are connected to the other end of the panel capacitor 40 and the power supply voltage sources GND and -VS. The first and second switches 4, 5 are P-channel FETs, the third and fourth switches 6, 7 are N-channel FETs, the switches 4, 6 and the switches 5, 7. ) Are each formed in a CMOS circuit configuration.

The energy recovery apparatus of the plasma display panel forms a parallel resonant circuit using the panel capacitor 40 of the panel 1 and the coil 8 of the charge / discharge circuit unit 2, and the switches 4, 5, 6, 7) Repetitive charging and discharging of the panel capacitor 40 by each driving reduces the reactive power.

5 is a waveform diagram of a driving voltage and a driving current waveform of the panel shown in FIG. 4. Referring to FIG. 5, the waveforms IN1 to IN6 are input waveforms for driving the FET switches 12 and 13 and the switches 4, 5, 6, and 7 shown in FIG. 4. The waveform VCP is a voltage waveform at both ends of the panel capacitor 40, and the waveform IL is a current waveform flowing through the coil 8.

In detail, first, the operation process will be described in detail assuming that no charge is charged in the panel capacitor 40 of the panel 1 at t = 0 before the A 'period.

In the period A ', when the second switch 4 and the fourth switch 7 are turned on. As shown in FIG. 6A, a current path is formed from the base voltage source GND to the first switch 4, the panel capacitor 40, the fourth switch 7, and the reverse voltage source (-VS). When the current path is formed in this way, the panel capacitor 40 is charged with charge.

In the period B, when the switch 12 is turned on, one end of the panel capacitor 40, the other end of the coil 8, the diode 10, the switch 12, and the panel capacitor 40, as shown in FIG. 6B. A current path is formed that leads to. When the current path is formed, the discharge current from the panel capacitor 40 is supplied to the coil 8. At this time, since the counter electromotive force is generated in the coil 8 and the resonant current IL flows, when the current of the panel capacitor 40 reaches zero, the voltage VCP applied to the panel capacitor 40 is maximum. Becomes the reverse voltage (-VS).

In the C period, when the maximum reverse voltage (-VS) is applied to the panel capacitor 40, the second switch 5 and the third switch 6 are turned on so that the base voltage source ( GND), a second switch 5, a panel capacitor 40, a third switch 6 and a current path leading to the reverse voltage source (-VS) are formed. When the current path is formed in this way, one end of the third switch 6 of the panel capacitor 40 is clamped to the reverse voltage (-VS). At this time, the polarity of the panel capacitor 40 becomes reverse polarity in the period A '.

In the D period, the switch 13 is turned on after the second and third switches 5 and 6 are turned off. For this reason, in the period D, a current path is formed that leads to the other end of the panel capacitor 40, the switch 13, the coil 8, and one end of the panel capacitor 40, as shown in FIG. When the current path is formed in this way, the charge stored in the panel capacitor 40 is discharged to the coil 8. That is, the reverse direction IL flows with the B period. On the other hand, when the voltage VCP of the panel capacitor 40 rises to zero, the maximum current flows in the coil 8. Thus, the panel capacitor 40 is recharged with reverse polarity voltage.

In period A, when the recharge of the reverse polarity voltage to the panel capacitor 40 is terminated by the counter electromotive force of the coil 8, the switch 13 is turned off, and as shown in FIG. 6E, the first and fourth switches 4 , 7) is turned on. Thus, the charge of the panel capacitor 40 is maintained until the next cycle. Then, the operation is repeatedly performed from A 'to D period.

In this way, the energy recovery device of the plasma display panel reduces the charge / discharge power of the panel capacitor 40 by the resonance operation that controls the timing of the panel capacitor 40, the coil 8, and each switch, and the next cycle. In the meantime, most of the reactive power of the previous cycle can be recovered as an enemy.

However, the energy recovery device of the plasma display panel proposed by NEC (USP-5670974) requires an energy recovery device and a sustain circuit at each of the scan electrode and the sustain electrode of the plasma display panel 1, which complicates the circuit configuration. . Accordingly, there is a problem that the manufacturing cost is increased. In addition, a large amount of power is consumed due to the conduction loss of a plurality of switches on the path of current.

Accordingly, an object of the present invention is to provide an energy recovery apparatus and a recovery method of a plasma display panel that can limit the current flowing in the inductor according to the period of the sustain waveform.

1 is a perspective view showing a conventional three-electrode AC surface discharge type plasma display panel.

2 is a circuit diagram showing an energy recovery apparatus of a conventional plasma display panel.

FIG. 3 is a timing diagram and waveform diagram showing on / off timing of the switches shown in FIG. 2 and an output waveform of the panel capacitor. FIG.

4 is a circuit diagram showing an energy recovery apparatus of another conventional plasma display panel.

FIG. 5 is a timing diagram and waveform diagram showing on / off timing of the switches shown in FIG. 4 and an output waveform of the panel capacitor. FIG.

FIG. 6A is a circuit diagram showing an on / off state and a current path of a switch element in the period A ′ shown in FIG. 5; FIG.

FIG. 6B is a circuit diagram showing an on / off state and a current path of a switch element in period B shown in FIG. 5; FIG.

FIG. 6C is a circuit diagram showing an on / off state and a current path of a switch element in period C shown in FIG. 5; FIG.

FIG. 6D is a circuit diagram showing an on / off state and a current path of a switch element in period D shown in FIG. 5; FIG.

Fig. 6E is a circuit diagram showing on / off states of switch elements in period A shown in Fig. 5;

7 is a circuit diagram illustrating an energy recovery apparatus of a plasma display panel according to an exemplary embodiment of the present invention.

FIG. 8 is a timing diagram and waveform diagrams illustrating on / off timings of the switches illustrated in FIG. 7 and voltages applied to a panel capacitor.

FIG. 9 is a circuit diagram showing on / off states and current paths of switches in the T0 period shown in FIG. 8; FIG.

FIG. 10 is a circuit diagram showing on / off states and current paths of switches in the T1 period shown in FIG. 8; FIG.

FIG. 11 is a circuit diagram showing on / off states and current paths of switches in the T2 period shown in FIG. 8; FIG.

FIG. 12 is a circuit diagram showing on / off states and current paths of switches in the T3 period shown in FIG. 8; FIG.

FIG. 13 is a timing diagram and waveform diagrams illustrating on / off timings of the switches illustrated in FIG. 7 and voltages applied to a panel capacitor.

FIG. 14 is a circuit diagram showing on / off states and current paths of switches in the T0 period shown in FIG.

FIG. 15 is a circuit diagram showing on / off states and current paths of switches in the T1 period shown in FIG.

FIG. 16 is a circuit diagram showing on / off states and current paths of switches in the T2 period shown in FIG.

FIG. 17 is a circuit diagram showing on / off states and current paths of switches in the T3 period shown in FIG.

<Description of Symbols for Main Parts of Drawings>

1 plasma display panel 2 charging circuit

3: clamp part 4, 5, 6, 7: switch

8: inductor 9: resistance

12, 13: FET 10: upper substrate

12Y: first electrode 12Z: second electrode

14,22 dielectric layer 16: protective film

18: lower substrate 20X: address electrode

24: partition 26: phosphor layer

30, 32: energy recovery device 40: panel capacitor

In order to achieve the above object, an energy recovery apparatus of a plasma display panel according to an embodiment of the present invention, the plasma display panel, switch elements for switching the sustain waveform from a sustain voltage source to be supplied to the panel, parallel to the panel First and second inductors connected to recover energy of the panel and supply the recovered energy to the panel, and the second inductor according to a period of the sustain waveform connected in parallel to the second inductor and supplied to the panel. It characterized in that it comprises a switch for connecting in parallel with the first inductor.

In the energy recovery apparatus, the switch elements include a first switch element connected to the voltage source and one end of the panel, a second switch element connected between the first switch element and a base voltage source, and the other end of the voltage source and the panel. And a third switch element connected to the third switch element and a fourth switch element connected between the third switch element and the ground voltage source.

In the energy recovery device, the first and fourth switch elements form a current path between the voltage source, the panel, and the base voltage source while a positive sustain waveform is supplied to the panel.

In the energy recovery device, the second and third switch elements form a current path between the voltage source, the panel and the base voltage source while the negative sustain waveform is supplied to the panel.

In the energy recovery apparatus, the first to fourth switch elements are all turned off during a period in which the voltage of the panel rises or falls to have a slope.

In the energy recovery device, the switching unit is connected between the fifth and sixth switch elements connected in parallel between the second inductor and one end of the first inductor, and is connected between the fifth switch element and one end of the first inductor. A first diode for blocking a reverse current to a first inductor, and a second diode connected between the sixth switch element and one end of the first inductor to block a reverse current through the sixth switch element; It is characterized by.

In the energy recovery device, the fifth and sixth switches are turned on when the period of the sustain waveform increases and is turned on when the period of the sustain waveform decreases, thereby connecting the second inductor to the first inductor in parallel.

In the energy recovery method of the plasma display panel according to an embodiment of the present invention, in the energy recovery method of the plasma display panel, a second inductor is connected to the first inductor connected in parallel to the panel according to the period of the sustain waveform supplied to the panel. A first step of connecting in parallel, a second step of supplying the sustain waveform to the panel using switch elements and simultaneously charging energy of the sustain waveform to at least one of the first and second inductors; And recovering the energy of the panel using at least one of the first and second inductors and supplying the recovered energy to the panel.

In the energy recovery method, when the period of the sustain waveform increases, the first and second inductors may be turned off by turning off fifth and sixth switch elements connected in parallel between the second inductor and the first inductor. A fourth step of connecting to the panel in parallel and a fifth step of connecting the second inductor to the first inductor in parallel by turning on the fifth and sixth switch elements when the period of the sustain waveform is reduced. Characterized in that.

In the energy recovery method, supplying the sustain waveform to the panel in the second step includes switching a first and fourth switch elements to form a first current path between the sustain voltage source and the panel and the base voltage source. And switching the second and third switch elements to form a second current path between the sustain voltage source and the panel and the base voltage source.

In the energy recovery method, charging the energy of the sustain waveform of the second step into at least one of the first and second inductors may be performed by supplying the sustain waveform supplied via one of the first and third switches. Charging the first inductor with energy, and supplying energy to the second inductor with the energy of the sustain waveform supplied via one of the first and third switches by switching between the fifth and sixth switch elements. Characterized in that it comprises the step of supplying.

In the energy recovery method, the first and fourth switch elements form a current path between the voltage source, the panel and the base voltage source while the positive sustain waveform is supplied to the panel.

In the energy recovery method, the second and third switch elements form a current path between the voltage source, the panel and the base voltage source while the negative sustain waveform is supplied to the panel.

In the energy recovery method, all of the first to fourth switch elements maintain a turn-off state during a period in which the voltage of the panel rises or falls to have a slope.

Other objects and features of the present invention in addition to the above object will be apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 7 to 17.

Referring to FIG. 7, an energy recovery apparatus and a recovery method of a plasma display panel (hereinafter referred to as "PDP") according to an embodiment of the present invention are equivalently formed on the first and second electrodes of the PDP. A panel capacitor Cp, a sustain voltage source Vs for generating the sustain voltage Vs, a first switch Q1 connected between the sustain voltage source Vs and the first electrode of the panel capacitor Cp, and The second switch Q2 connected between the first switch Q1 and the ground voltage source GND, the third switch Q3 connected between the sustain voltage source + Vs and the second electrode of the panel capacitor Cp; The fourth switch Q4 connected between the third switch Q3 and the ground voltage source GND, the first and second inductors L1 and L2 connected in parallel to the panel capacitor Cp, and the first and second switches. And fifth and sixth switches Q5 and Q6 connected between the second inductors L1 and L2 and connected in parallel to the second inductor L1.

The first switch Q1 switches the sustain waveform Vs from the sustain voltage source Vs to the first electrode of the panel capacitor Cp in response to the switching control signal, and the third switch Q3 also switches to the switching control signal. In response, the sustain waveform Vs from the sustain voltage source Vs is switched to the second electrode of the panel capacitor Cp.

The second switch Q2 connects the first electrode of the panel capacitor Cp to the ground voltage source GND in response to the switching control signal, and the fourth switch Q4 connects the panel capacitor Cp in response to the switching control signal. Is connected to the ground voltage source (GND).

The first inductor L1 is connected between the node point N1 between the first and second switches Q1 and Q2 and the node point N2 between the third and fourth switches Q3 and Q4 and is a panel capacitor. In parallel with (Cp). The second inductor L1 is connected between the node point N1 between the first and second switches Q1 and Q2 and the node point N2 between the third and fourth switches Q3 and Q4 and is a panel capacitor. Parallel to Cp and the first inductor L1. In this case, each of the first and second inductors L1 and L2 has the same inductance value. Each of the first and second inductors L1 and L2 is connected in parallel with the panel capacitor Cp to recover and recover energy of the panel capacitor Cp by parallel resonance with the panel capacitor Cp during energy recovery. Energy is supplied to the panel capacitor Cp. At this time, the second inductor L2 determines the parallel connection between the panel capacitor Cp and the first inductor L1 according to the switching of the fifth and sixth switches Q5 and Q6.

The fifth switch Q5 is connected between the second inductor L2 and the second node point N2, and the second inductor L2 is connected to the panel capacitor Cp and the first inductor L1 in response to the switching control signal. Will be connected in parallel. Accordingly, the fifth switch Q5 forms a current path through the second inductor L2 in response to the switching control signal. At this time, a first diode D1 is connected between the fifth switch Q5 and the second node point N2 to cut off the current supplied from the second node to the second inductor L2.

The sixth switch Q6 is connected in parallel with the fifth switch Q5 and forms a current path via the second inductor L2 in response to the switching control signal. At this time, a second diode D2 is provided between the sixth switch Q6 and the second node point N2 to block a current supplied from the second inductor L2 and passing through the sixth switch Q6. Connected.

As such, the first to sixth switches Q1 to Q6 control the flow of current while being turned on and off. Each of the first to sixth switches Q1 to Q6 is a semiconductor switch element, for example, any one of MOS FETs, IGBTs, SCRs, and BJTs. Diodes are connected in parallel to each of the first to sixth switches Q1 to Q6. The diodes may be used as internal diodes of the first to sixth switches Q1 to Q6. Also, diodes can be used as external diodes.

On the other hand, the on and off periods of each of the first to sixth switches Q1 to Q6 vary depending on the period or duty ratio of the sustain waveform Vs supplied to the panel capacitor Cp. For example, an increase in the period of the sustain waveform Vs results in a desired gradation image through sustain discharge during a constant sustain period. When a low gradation image is realized during this sustain period, the number of sustain discharges is discharged from the point of the sustain period. From the rest of the time, there is a rest period. Accordingly, the first to fourth switches Q1 to Q4 have on and off periods that vary depending on the period or duty ratio of the sustain waveform Vs. In this case, the fifth and sixth switches Q5 and Q are turned off when the period of the sustain waveform Vs increases, and is turned on when the period of the sustain waveform Vs decreases. .

As described above, the first and second inductors L1 and L2 are connected in parallel with each other according to the switching of the fifth and sixth switches Q5 and Q6, thereby providing current supplied to each of the first and second inductors L1 and L2. Will be limited. That is, the current supplied to the first and second inductors L1 and L2 increases in proportion to the on time of the first to fourth switches Q1 to Q4, and the inductor is damaged due to the increased current. This can happen.

Accordingly, when the period or duty ratio of the sustain waveform Vs is fast, since the on-times of the first to fourth switches Q1 to Q4 are short, the first and second inductors L1 may be used to recover energy from the panel capacitor Cp. , Energy is recovered by the parallel resonance between the first inductor L1 and the panel capacitor Cp. On the other hand, when the period or duty ratio of the sustain waveform Vs is late, since the on time of the first to fourth switches Q1 to Q4 is long, the panel capacitor Cp and the first when energy is recovered from the panel capacitor Cp. And energy is recovered by parallel resonance with the second inductors L1 and L2. In other words, when the period or duty ratio of the sustain waveform Vs is increased, the inductance value of the inductor is increased using only the first inductor L1, and when the period or duty ratio of the sustain waveform Vs is decreased, the first and second inductors are reduced. By connecting (L1, L2) in parallel, the inductance value of the inductor is reduced.

Accordingly, the energy recovery apparatus of the PDP according to the embodiment of the present invention connects the first and second inductors L1 and L2 connected in parallel to the panel capacitor Cp in parallel with the period or duty ratio of the sustain waveform Vs. As a result, currents flowing through the first and second inductors L1 and L2 are limited to prevent breakage of the first and second inductors L1 and L2.

Referring to FIG. 8, the energy recovery apparatus and the recovery method of the plasma display panel according to the embodiment of the present invention, first, respectively for switching each of the first to fourth switches (Q1, Q2, Q3, Q4) Switching control signals have an on-off time for generating a sustain waveform Vs with an increased period, during which time each of the fifth and sixth switches Q5, Q6 remains off. In addition, it is assumed that the positive sustain waveform (+ Vs) supplied from the sustain voltage source Vs is charged in the panel capacitor Cp before the T0 period.

In the T0 period, the first and fourth switches Q1 and Q4 are turned on, and the second and third switches Q2 and Q3 and the fifth and sixth switches Q5 and Q6 are turned off. As shown in FIG. 9, the sustain voltage source Vs, the first switch Q1, the first node point N1, the panel capacitor Cp, the second node point N2, and the fourth switch Q4, as shown in FIG. A first current path leading to a ground voltage source (GND); Leads to the sustain voltage source Vs, the first switch Q1, the first node point N1, the first inductor L1, the second node point N2, the fourth switch Q4 and the ground voltage source GND. A second current path is formed. Accordingly, the panel capacitor Cp maintains the positive sustain voltage (+ Vs) supplied from the sustain voltage source Vs via the first current path. The first inductor L1 charges energy supplied from the sustain voltage source Vs via the second current path.

In the T1 period, the first and fourth switches Q1 and Q4 are turned off, and the second and third switches Q2 and Q3 and the fifth and sixth switches Q5 and Q6 are turned off. As a result, as shown in FIG. 10, current paths are formed to the panel capacitor Cp, the first node point N1, the first inductor L1, the second node point N2, and the panel capacitor Cp. . Accordingly, the first inductor L1 recovers energy from the panel capacitor Cp via the current path and supplies the recovered energy back to the panel capacitor Cp. Accordingly, the panel capacitor Cp is lowered to the negative sustain voltage (-Vs) by the energy supplied from the first inductor L1.

In the T2 period, the second and third switches Q2 and Q3 are turned on, and the first and fourth switches Q1 and Q4 and the fifth and sixth switches Q5 and Q6 are turned off. As shown in FIG. 11, the sustain voltage source Vs, the third switch Q3, the second node point N2, the panel capacitor Cp, the first node point N1, and the second switch Q2 are maintained. A first current path leading to a ground voltage source (GND); Leads to a sustain voltage source Vs, a third switch Q3, a second node point N2, a second inductor L2, a first node point N1, a second switch Q2 and a ground voltage source GND. A second current path is formed. Accordingly, the panel capacitor Cp maintains the negative sustain voltage by the sustain voltage (+ Vs) supplied from the sustain voltage source Vs via the first current path. The first inductor L1 charges energy supplied from the sustain voltage source Vs via the second current path.

In the T3 period, the second and third switches Q2 and Q3 are turned off, and the first and fourth switches Q1 and Q4 and the fifth and sixth switches Q5 and Q6 are turned off. As a result, the current paths leading to the panel capacitor Cp, the second node point N2, the first inductor L1, the first node point N1, and the panel capacitor Cp are formed as shown in FIG. . Accordingly, the first inductor L1 recovers energy from the panel capacitor Cp via the current path and supplies the recovered energy back to the panel capacitor Cp. Therefore, the panel capacitor Cp rises to the positive sustain voltage (+ Vs) by the energy supplied from the first inductor L1.

As such, the periods T0 to T3 are periodically repeated, an increased AC sustain pulse is supplied to the panel capacitor Cp. In fact, the AC driving pulses supplied to the first electrode Y and the second electrode Z of the plasma display panel are generated while the above-described T0 to T3 periods are periodically repeated.

The apparatus and method for recovering energy of a PDP according to an embodiment of the present invention includes the fifth and sixth switches Q5 and Q6 when the period or duty ratio of the sustain waveform Vs supplied to the panel capacitor Cp is increased. When the energy is recovered, only the first inductor L1 of the first and second inductors L1 and L2 is connected to the panel capacitor Cp in parallel to increase the inductance value of the inductor to increase the energy of the panel capacitor Cp. Is recovered and the recovered energy is supplied to the panel capacitor Cp. Accordingly, the PDP of the present invention prevents damage to the inductor by limiting the current of the inductor that increases in proportion to the ON time of the switches.

Meanwhile, referring to FIG. 13, each of the switching control signals for switching each of the first to fourth switches Q1, Q2, Q3, and Q4 is turned on to generate a sustain waveform Vs having a reduced period. It has an off time, during which time each of the fifth and sixth switches Q5 and Q6 remain on. In addition, it is assumed that the positive sustain voltage (+ Vs) supplied from the sustain voltage source Vs is charged in the panel capacitor Cp before the T0 period.

In the T0 period, the first and fourth switches Q1 and Q4 are turned on, the fifth and sixth switches Q5 and Q6 are turned on, and the second and third switches Q2 and Q3 are turned on. By maintaining the OFF state, the sustain voltage source Vs, the first switch Q1, the first node point N1, the panel capacitor Cp, the second node point N2, and the fourth switch as shown in FIG. A first current path leading to Q4 and a ground voltage source GND; Leads to the sustain voltage source Vs, the first switch Q1, the first node point N1, the first inductor L1, the second node point N2, the fourth switch Q4 and the ground voltage source GND. A second current path; The sustain voltage source Vs, the first switch Q1, the first node point N1, the second inductor L2, the fifth switch Q5, the second node point N2, the fourth switch Q4, and A third current path is formed that leads to the ground voltage source GND. Accordingly, the panel capacitor Cp maintains the positive sustain voltage (+ Vs) supplied from the sustain voltage source Vs via the first current path. The first inductor L1 charges energy supplied from the sustain voltage source Vs via the second current path, and the second inductor L2 charges energy supplied from the sustain voltage source Vs via the third current path. Will charge.

In the T1 period, the first and fourth switches Q1 and Q4 are turned off, the second and third switches Q2 and Q3 are turned off, and the fifth and sixth switches Q5 and Q6 are turned off. The first state leading to the panel capacitor Cp, the first node point N1, the first inductor L1, the second node point N2 and the panel capacitor Cp as shown in FIG. A current path; A second current path is formed that leads to the panel capacitor Cp, the first node point N1, the second inductor L2, the fifth switch Q5, the second node point N2, and the panel capacitor Cp. . As a result, the first and second inductors L1 and L2 are connected in parallel to the panel capacitor Cp, thereby reducing the inductance value of the inductor. Accordingly, the first inductor L1 recovers energy from the panel capacitor Cp via the first current path and supplies the recovered energy back to the panel capacitor Cp, and the second inductor L2 The energy from the panel capacitor Cp is recovered through the second current path, and the recovered energy is supplied to the panel capacitor Cp again. Accordingly, the panel capacitor Cp is lowered to the negative sustain voltage (-Vs) by the energy supplied from the first and second inductors L1 and L2.

In the T2 period, the second and third switches Q2 and Q3 are turned on, the first and fourth switches Q1 and Q4 are turned off, and the fifth and sixth switches Q5 and Q6 are turned on. By maintaining the on state, as shown in FIG. 16, the sustain voltage source Vs, the third switch Q3, the second node point N2, the panel capacitor Cp, the first node point N1, and the second switch are shown. A first current path leading to Q2 and a ground voltage source GND; Leads to the sustain voltage source Vs, the third switch Q3, the second node point N2, the first inductor L1, the first node point N1, the second switch Q2, and the ground voltage source GND. A second current path; The sustain voltage source Vs, the third switch Q3, the second node point N2, the sixth switch Q6, the second inductor L2, the first node point N1, the second switch Q2, and A third current path is formed that leads to the ground voltage source GND. As a result, the first and second inductors L1 and L2 are connected in parallel to the panel capacitor Cp, thereby reducing the inductance value of the inductor. Accordingly, the panel capacitor Cp maintains the negative sustain voltage by the sustain voltage (+ Vs) supplied from the sustain voltage source Vs via the first current path. The first inductor L1 charges the energy supplied from the sustain voltage source Vs via the second current path, and the first inductor L1 is supplied from the sustain voltage source Vs via the third current path. It will charge energy.

In the T3 period, the second and third switches Q2 and Q3 are turned off, and the first and fourth switches Q1 and Q4 remain turned off, and the fifth and sixth switches Q5 and Q6. By maintaining the turn-on state, the panel capacitor Cp, the second node point N2, the first inductor L1, the first node point N1 and the panel capacitor Cp as shown in FIG. A subsequent first current path; A second current path is formed that leads to the panel capacitor Cp, the second node point N2, the sixth switch Q6, the second inductor L2, the first node point N1, and the panel capacitor Cp. . As a result, the first and second inductors L1 and L2 are connected in parallel to the panel capacitor Cp, thereby reducing the inductance value of the inductor. Accordingly, the first inductor L1 recovers energy from the panel capacitor Cp via the first current path and supplies the recovered energy back to the panel capacitor Cp, and the second inductor L2 The energy from the panel capacitor Cp is recovered through the second current path, and the recovered energy is supplied to the panel capacitor Cp again. Accordingly, the panel capacitor Cp rises to the positive sustain voltage (+ Vs) by the energy supplied from the first and second inductors L1 and L2.

As such, the periods T0 to T3 are periodically repeated, the reduced AC sustain pulse is supplied to the panel capacitor Cp. In fact, the AC driving pulses supplied to the first electrode Y and the second electrode Z of the plasma display panel are generated while the above-described T0 to T3 periods are periodically repeated.

The apparatus and method for recovering energy of a PDP according to an embodiment of the present invention includes the fifth and sixth switches Q5 and Q6 when the period or duty ratio of the sustain waveform Vs supplied to the panel capacitor Cp is increased. Turn on to recover the energy of the panel capacitor Cp by reducing the inductance value of the inductor by connecting the first and second inductors L1 and L2 to the panel capacitor Cp in parallel during energy recovery. Supply to the panel capacitor (Cp). Accordingly, the PDP of the present invention prevents damage to the inductor by limiting the current of the inductor that increases in proportion to the ON time of the switches.

As described above, the energy recovery apparatus and recovery method of the plasma display panel according to an embodiment of the present invention is a panel capacitor according to the period or duty ratio of the sustain waveform of at least one of the first and second inductors connected in parallel to the panel capacitor Connected in parallel with the switch elements for adjusting the inductance value of the inductor. Accordingly, the present invention prevents damage to the inductor by limiting the current of the inductor that increases in proportion to the ON time of the switches.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (14)

Plasma display panel, Switch elements for switching a sustain waveform from a sustain voltage source to the panel; First and second inductors connected in parallel to the panel and recovering energy of the panel and supplying the recovered energy to the panel; And a switching unit for connecting the second inductor in parallel with the first inductor according to a period of the sustain waveform which is connected in parallel with the second inductor and supplied to the panel. The method of claim 1, The switch elements, A first switch element connected to said voltage source and one end of said panel, A second switch element connected between said first switch element and a ground voltage source, A third switch element connected to the voltage source and the other end of the panel; And a fourth switch element connected between the third switch element and the base voltage source. The method of claim 2, And the first and fourth switch elements form a current path between the voltage source, the panel and the base voltage source while a positive sustain waveform is supplied to the panel. The method of claim 2, And the second and third switch elements form a current path between the voltage source, the panel and the base voltage source while the negative sustain waveform is supplied to the panel. The method of claim 2, And the first to fourth switch elements are all turned off during the period when the voltage of the panel rises or falls to have a slope. The method of claim 1, The switch unit, Fifth and sixth switch elements connected in parallel between the second inductor and one end of the first inductor; A first diode connected between the fifth switch element and one end of the first inductor to block a reverse current to the first inductor; And a second diode connected between the sixth switch element and one end of the first inductor to block a reverse current passing through the sixth switch element. The method of claim 6, The fifth and sixth switches are turned on when the period of the sustain waveform is increased, and is turned on when the period of the sustain waveform is decreased, thereby connecting the second inductor to the first inductor in parallel. Device. In the energy recovery method of the plasma display panel, A first step of connecting a second inductor in parallel to a first inductor connected in parallel with the panel according to a period of the sustain waveform supplied to the panel; Supplying the sustain waveform to the panel using switch elements and simultaneously charging energy of the sustain waveform to at least one of the first and second inductors; And recovering the energy of the panel by using at least one of the first and second inductors, and supplying the recovered energy to the panel. The method of claim 8, The first step is, A fourth step of turning off the fifth and sixth switch elements connected in parallel between the second inductor and the first inductor when the period of the sustain waveform increases, connecting only the first inductor to the panel in parallel; And a fifth step of connecting the second inductor to the first inductor in parallel by turning on the fifth and sixth switch elements when the period of the sustain waveform decreases. Recovery method. The method of claim 9, The step of supplying the sustain waveform to the panel of the second step, Switching first and fourth switch elements to form a first current path between the sustain voltage source and the panel and the ground voltage source; Switching between the second and third switch elements to form a second current path between the sustain voltage source and the panel and the base voltage source. The method of claim 10, Charging the energy of the sustain waveform of the second step to at least one of the first and second inductors, Charging the first inductor with energy of the sustain waveform supplied via one of the first and third switches; And supplying energy of the sustain waveform supplied via any one of the first and third switches to the second inductor by switching between the fifth and sixth switch elements. Panel energy recovery method. The method of claim 10, And the first and fourth switch elements form a current path between the voltage source, the panel, and the base voltage source while the positive sustain waveform is supplied to the panel. The method of claim 10, And the second and third switch elements form a current path between the voltage source, the panel and the base voltage source while the negative sustain waveform is supplied to the panel. The method of claim 10, And the first to fourth switch elements maintain a turn-off state during a period when the voltage of the panel rises or falls to have a slope.