KR101058142B1 - Energy recovery device and recovery method of plasma display panel - Google Patents

Abstract

The present invention relates to an energy recovery apparatus and a recovery method of a plasma display panel to simplify the circuit configuration and improve driving efficiency.

An energy recovery apparatus for a plasma display panel according to the present invention includes a plasma display panel having first and second electrodes for sustain discharge; A sustain voltage source for supplying a sustain voltage to the panel; An inductor for storing energy from the sustain voltage source and supplying the stored energy to the panel by resonance with the panel; And a plurality of switches for inducing a reverse voltage to the inductor and forming a current path such that the reverse voltage is supplied to the sustain voltage source.

By such a configuration, the present invention supplies energy to the panel capacitor using LC resonance, supplies energy stored in the first electrode of the panel capacitor to the second electrode, and recovers energy stored in the panel using the reverse voltage. Supply to sustain voltage source. Accordingly, the present invention can reduce power consumption and improve driving efficiency.

Description

Energy recovery apparatus and recovery method of plasma display panel {ENERGY RECOVERY APPARATUS AND METHOD OF PLASMA DISPLAY PANEL}             

1 is a perspective view showing a conventional three-electrode AC surface discharge type plasma display panel.

2 is a circuit diagram illustrating an energy recovery apparatus of a conventional plasma display panel.

3 is a timing diagram and waveform diagrams illustrating on / off timings of the switches illustrated in FIG. 2 and output waveforms of the panel capacitor.

4 is a circuit diagram illustrating an energy recovery apparatus of another conventional plasma display panel.

FIG. 5 is a timing diagram and waveform diagrams illustrating on / off timings of the switches illustrated in FIG. 4 and output waveforms of the panel capacitor.

FIG. 6A is a circuit diagram illustrating an on / off state and a current path of the switch element in the period A ′ shown in FIG. 5.

FIG. 6B is a circuit diagram showing an on / off state and a current path of the switch element in period B shown in FIG.                 

FIG. 6C is a circuit diagram showing an on / off state and a current path of the switch element in period C shown in FIG.

FIG. 6D is a circuit diagram showing an on / off state and a current path of the switch element in the period D shown in FIG.

FIG. 6E is a circuit diagram showing an on / off state of the switch element in period A shown in FIG.

7 is a circuit diagram illustrating an energy recovery apparatus of a plasma display panel according to an exemplary embodiment of the present invention.

FIG. 8 is a timing diagram and waveform diagrams illustrating on / off timings of the switches illustrated in FIG. 7, voltages of panel capacitors, and currents of inductors.

FIG. 9 is a circuit diagram illustrating a current path according to on / off of switches in the T1 period shown in FIG. 8.

FIG. 10 is a circuit diagram illustrating a current path according to on / off of switches in the T2 period shown in FIG. 8.

FIG. 11 is a circuit diagram illustrating a current path according to on / off of switches in the T3 period shown in FIG. 8.

FIG. 12 is a circuit diagram illustrating a current path according to on / off of switches in the T4 period shown in FIG. 8.

FIG. 13 is a circuit diagram illustrating a current path according to on / off of switches in the period T5 shown in FIG. 8.                 

FIG. 14 is a circuit diagram illustrating a current path according to on / off of switches in the T6 period shown in FIG. 8.

FIG. 15 is a circuit diagram illustrating a current path according to on / off of switches in the period T7 shown in FIG. 8.

FIG. 16 is a circuit diagram illustrating a current path according to on / off of switches in the T8 period shown in FIG. 8.

FIG. 17 is a circuit diagram illustrating a current path according to on / off of switches in the period T9 shown in FIG. 8.

FIG. 18 is a circuit diagram illustrating a current path according to on / off of switches in the T0 period shown in FIG. 8.

<Description of the symbols for the main parts of the drawings>

1 plasma display panel 2 charge and discharge circuit

3: clamp part 4, 5, 6, 7, 12, 13: switch

8: inductor 9: resistance

10: upper substrate 12Y: first electrode

12Z: second electrode 14,22: dielectric layer

16: protective film 18: lower substrate

20X: address electrode 24: partition wall

26: phosphor 30, 32: energy recovery device                 

40: panel capacitor

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an energy recovery apparatus for a plasma display panel, and more particularly, to an energy recovery apparatus and a recovery method for a plasma display panel for simplifying a circuit configuration and improving driving efficiency.

Recently, various flat panel displays have been developed to reduce weight and volume, which are disadvantages of cathode ray tubes. Such flat panel displays include liquid crystal displays (LCDs), field emission displays (FEDs), plasma display panels (hereinafter referred to as "PDPs"), and electroluminescence (Electro). -Luminescence (EL) display.

PDP is a display device using a gas discharge has the advantage that it is easy to manufacture a large panel. As a PDP, a three-electrode AC surface discharge type PDP having three electrodes and driven by an alternating voltage is typical.

Referring to FIG. 1, a discharge cell of a three-electrode AC surface discharge type PDP includes a first electrode 12Y and a second electrode 12Z formed on the upper substrate 10, and an address formed on the lower substrate 18. An electrode 20X is provided.

The upper dielectric layer 14 and the passivation layer 16 are stacked on the upper substrate 10 having the first electrode 12Y and the second electrode 12Z side by side. Wall charges generated during plasma discharge are accumulated in the upper dielectric layer 14. The protective layer 16 prevents damage to the upper dielectric layer 14 due to sputtering generated during plasma discharge, and increases emission efficiency of secondary electrons. As the protective film 16, magnesium oxide (MgO) is usually used.

The lower dielectric layer 22 and the partition wall 24 are formed on the lower substrate 18 on which the address electrode 20X is formed, and the phosphor 26 is coated on the surfaces of the lower dielectric layer 22 and the partition wall 24. The address electrode 20X is formed in the direction crossing the first electrode 12Y and the second electrode 12Z. The partition wall 24 is formed in parallel with the address electrode 20X to prevent ultraviolet rays and visible light generated by the discharge from leaking to the adjacent discharge cells.

The phosphor 26 is excited by ultraviolet rays generated during plasma discharge to generate visible light of any one of red, green, and blue. Inert gas for gas discharge is injected into the discharge space provided between the upper and lower substrates 10 and 18 and the partition wall 24.

The three-electrode AC surface discharge type PDP is driven by being divided into a plurality of subfields, and gray scale display is performed by emitting light a number of times proportional to the weight of video data in each subfield period. The subfield is driven again by being divided into an initialization period, an address period, a sustain period, and an erase period.

Here, the initialization period is a period during which uniform wall charges are formed in the discharge cells, the address period is a period during which selective address discharge occurs in accordance with the logic value of the video data, and the sustain period is a discharge cell in which the address discharge has occurred. It is a period in which discharge is maintained. The erase period is a period of erasing the sustain discharge generated in the sustain period.

The address discharge and the sustain discharge of the AC surface discharge PDP driven in this way require a high voltage of several hundred volts or more. Therefore, an energy recovery apparatus is used to minimize the driving power required for the address discharge and the sustain discharge. The energy recovery apparatus recovers the voltage between the first electrode 12Y and the second electrode 12Z and uses the voltage recovered as the drive voltage at the next discharge.

Referring to FIG. 2, the energy recovery devices 30 and 32 of the plasma display panel proposed by Weber (USP-5081400) are symmetrically installed with the panel capacitor Cp interposed therebetween. Here, the panel capacitor Cp equivalently represents the capacitance formed between the first electrode Y and the second electrode Z. FIG. The first energy recovery device 30 supplies a sustain pulse to the first electrode (Y). The second energy recovery device 32 supplies a sustain pulse to the second electrode Z while operating alternately with the first energy recovery device 30.

The configuration of the energy recovery devices 30 and 32 of the conventional plasma display panel will be described with reference to the first energy recovery device 30. The first energy recovery device 30 includes the inductor L connected between the panel capacitor Cp and the source capacitor Cs, and the first and the first connected in parallel between the source capacitor Cs and the inductor L. Three switches S1 and S3 and second and fourth switches S2 and S4 connected in parallel between the panel capacitor Cp and the inductor L are provided.

The second switch S2 is connected to the sustain voltage source Vs, and the fourth switch S4 is connected to the ground voltage source GND. The source capacitor Cs recovers and charges the voltage charged to the panel capacitor Cp during the sustain discharge, and supplies the charged voltage to the panel capacitor Cp again. The source capacitor Cs is charged with a voltage of Vs / 2 corresponding to half of the sustain voltage source Vs. The inductor L forms a resonance circuit together with the panel capacitor Cp. The first to fourth switches S1 to S4 control the flow of current.

Meanwhile, the fifth and sixth diodes D5 and D6 provided between the first and second switches S1 and S2 and the inductor L respectively prevent current from flowing in the reverse direction.

3 is a timing diagram and waveform diagrams illustrating on / off timing of the first energy recovery device switches and an output waveform of the panel capacitor.

The operation process will be described in detail assuming that the panel capacitor Cp is charged with a voltage of 0 volts and the source capacitor Cs is charged with a voltage of Vs / 2 before the T1 period.

In the T1 period, the first switch S1 is turned on to form a current path from the source capacitor Cs to the first switch S1, the inductor L, and the panel capacitor Cp. When the current path is formed, the voltage of Vs / 2 charged in the source capacitor Cs is supplied to the panel capacitor Cp. At this time, since the inductor L and the panel capacitor Cp form a series resonant circuit, the panel capacitor Cp is charged with the sustain voltage Vs which is twice the voltage of the source capacitor Cs.

In the T2 period, the second switch S2 is turned on. When the second switch S2 is turned on, the sustain voltage Vs is supplied to the first electrode Y from the sustain voltage source Vs. The sustain voltage Vs supplied to the first electrode Y prevents the voltage of the panel capacitor Cp from falling below the sustain voltage Vs so that sustain discharge occurs normally. On the other hand, since the voltage of the panel capacitor Cp has risen to the sustain voltage Vs in the period T1, the driving power supplied from the outside to minimize the sustain discharge is minimized.

In the T3 period, the first switch S1 is turned off. At this time, the first electrode Y maintains the sustain voltage Vs for the period of T3. In the T4 period, the second switch S2 is turned off and the third switch S3 is turned on. When the third switch S3 is turned on, a current path is formed from the panel capacitor Cp to the source capacitor Cs through the inductor L and the third switch S3 to charge the panel capacitor Cp. The voltage is recovered to the source capacitor Cs. At this time, the source capacitor Cs is charged with a voltage of Vs / 2.

In the T5 period, the third switch S3 is turned off and the fourth switch S4 is turned on. When the fourth switch S4 is turned on, a current path is formed between the panel capacitor Cp and the base voltage source GND, so that the voltage of the panel capacitor Cp drops to zero volts. In the T6 period, the state of T5 is maintained for a certain time. In fact, the AC drive pulses supplied to the first electrode Y and the second electrode Z are obtained by periodically repeating the periods T1 to T6.

Meanwhile, the second energy recovery device 32 alternately operates with the first energy recovery device 30 to supply a driving voltage to the panel capacitor Cp. Accordingly, the sustain capacitors Vs having opposite polarities are supplied to the panel capacitor Cp. As such, the sustain capacitor Vp is supplied with sustain voltages Vs having opposite polarities to each other, thereby causing sustain discharge in the discharge cells.

However, these conventional energy recovery devices 30 and 32 are the first energy recovery device 30 provided on the first electrode (Y) side and the second energy recovery device (32) provided on the second electrode (Z) side. Each operation requires a large number of circuit components (switching elements, etc.), thereby increasing the manufacturing cost. In addition, a large amount of power is consumed due to the conduction loss of a plurality of switches (diode, switch element, inductor) on the path of current.

On the other hand, referring to Figure 4, the energy recovery device of the plasma display panel proposed by 'NEC (USP-5670974)' is equivalent to the capacitance formed between the scan electrode and the sustain electrode of the plasma display panel (1) The panel capacitor 40 shown, the charge-discharge circuit part 2 and the voltage clamp part 3 connected in parallel with the panel capacitor Cp are provided. In particular, the charge / discharge circuit section 2 is connected to the panel capacitor 40 of the panel 1 in parallel and inductor 8 for recharging to the reverse polarity of the resonant current generated during the discharge of the panel capacitor 40; And first and second switches 12 and 13. In this case, the first and second switches 12 and 13 form a bidirectional switch with respect to the inductor 8. That is, on one side of the panel capacitor 40, the first and second switches 12, 13 and the first and second of the N-channel FETs controlled by the other switch driving input signals IN5 and IN6 supplied to the gate terminals, respectively. Reverse current blocking diodes 10 and 11 connected in series to each of the two switches 12 and 13 are connected in series. On the other side of the panel capacitor 40, one end of the inductor 8 and the resistor 9 connected in parallel are connected. At this time, the other ends of the inductor 8 and the resistor 9 connected in parallel are commonly connected to the other ends of the diodes 10 and 11. The panel capacitor 40 and the charge / discharge circuit unit 2 of the plasma display panel 1 described above form a parallel resonance circuit. On the other hand, the resistor 9 connected in parallel to the inductor 8 of the charge / discharge circuit section 2 is a damping resistor provided to prevent the vibration of the waveform.

The voltage clamp part 3 is composed of third to sixth switches 4, 5, 6, and 7, wherein the third and fifth switches 4 and 6 are connected to one end of the panel capacitor 40 and a power supply. It is connected between the voltage sources GND and -VS, respectively, and the fourth and sixth switches 6 and 7 are connected between the other end of the panel capacitor 40 and the power supply voltage sources GND and -VS. In this case, the third and fourth switches 4 and 5 are P-channel FETs, the fifth and sixth switches 6 and 7 are N-channel FETs, and the third and fifth switches 4 and 6 and the fourth and fourth switches. And each of the sixth switches 5 and 7 is composed of a CMOS circuit.

The energy recovery apparatus of the plasma display panel forms a parallel resonant circuit using the panel capacitor 40 of the plasma display panel 1 and the inductor 8 of the charge / discharge circuit unit 2, and the third to sixth switches. Each driving (4, 5, 6, 7) is repeated to charge and discharge the panel capacitor 40 to reduce the power consumption.

5 is a waveform diagram of a driving voltage and a driving current waveform of the panel shown in FIG. 4.

Here, at t = 0 before the A 'period, the operation process will be described in detail, assuming that no charge is charged in the panel capacitor 40 of the panel 1.

Referring to FIG. 5, when the third and sixth switches 4 and 7 are turned on in the A ′ period, the third switch 4 and the panel capacitor 40 from the ground voltage source GND as shown in FIG. 6A. ), A sixth switch 7 and a current path leading to the reverse voltage source (-VS) are formed. When the current path is formed in this way, the panel capacitor 40 is charged with charge.

In the period B, once the third and sixth switches 4 and 7 are turned off and the first switch 12 is turned on, as shown in FIG. 6B, one end of the panel capacitor 40, the inductor 8, A current path is formed that leads to the other end of the diode 10, the first switch 12, and the panel capacitor 40. When the current path is formed, the discharge current from the panel capacitor 40 is supplied to the inductor 8. At this time, since the counter electromotive force is generated in the inductor 8 so that the resonance current IL flows, when the current of the panel capacitor 40 reaches zero, the voltage VCP applied to the panel capacitor 40 is maximum. It becomes reverse voltage (-VS).

When the maximum reverse voltage (-VS) is applied to the panel capacitor 40 in the period C, when the fourth switch 5 and the fifth switch 6 are turned on, as shown in FIG. GND), the fourth switch 5, the panel capacitor 40, the fifth switch 6 and a current path leading to the reverse voltage source (-VS) are formed. When the current path is formed in this way, one end of the fifth switch 6 of the panel capacitor 40 is clamped to the reverse voltage (-VS). At this time, the polarity of the panel capacitor 40 becomes reverse polarity in the period A '.

In the D period, the second switch 13 is turned on after the fourth and fifth switches 5 and 6 are turned off. As a result, in the period D, a current path is formed that leads to the other end of the panel capacitor 40, the second switch 13, the inductor 8, and one end of the panel capacitor 40, as shown in FIG. When the current path is formed, the electric charge stored in the panel capacitor 40 is discharged to the inductor 8. That is, in the period B, a current reverse to the current flowing in the inductor 8 flows in the inductor 8. On the other hand, when the voltage VCP of the panel capacitor 40 rises to 0, the maximum current flows in the inductor 8. Thus, the panel capacitor 40 is recharged with reverse polarity voltage.

In period A, when recharging of the reverse polarity voltage to the panel capacitor 40 is terminated by the counter electromotive force of the inductor 8, the second switch 13 is turned off, and as shown in FIG. 6E, the third and sixth switches are shown. (4, 7) is turned on. Thus, the charge of the panel capacitor 40 is maintained until the next cycle. Then, the operation is repeatedly performed from A 'to D period.

As such, the energy recovery device of the PDP reduces the charge / discharge power of the panel capacitor 40 by resonant operation of controlling the timing of the panel capacitor 40, the inductor 8, and each switch, and reduces the reactive power of the previous cycle. Effective reuse in the next cycle.

However, the energy recovery device of PDP proposed by 'NEC (USP-5670974)' is smaller than the energy recovery device proposed by 'Weber (USP-5081400)'. In this case, the path between one electrode and the energy recovery circuit is long, so that not only the efficiency is reduced but also the current flowing through the circuit increases, thereby increasing the heat generation of the component. In addition, at the start of sustain, power is supplied from the sustain voltage source Vs unconditionally, and stored energy cannot be recovered at the end of sustain, thereby reducing energy recovery efficiency.

Accordingly, an object of the present invention is to provide an energy recovery apparatus and a recovery method of a plasma display panel that can simplify the circuit configuration and improve driving efficiency.

In order to achieve the above object, the energy recovery apparatus of the plasma display panel according to the present invention comprises a plasma display panel having a first and a second electrode for sustain discharge; A sustain voltage source for supplying a sustain voltage to the panel; An inductor for storing energy from the sustain voltage source and supplying the stored energy to the panel by resonance with the panel; And a plurality of switches for inducing a reverse voltage to the inductor and forming a current path such that the reverse voltage is supplied to the sustain voltage source.

The plurality of switches form a resonance between the panel and the inductor to form a current path such that energy supplied to one of the first and second electrodes is supplied to the other electrode.

The plurality of switches include a first switch connected between the sustain voltage source and a first node that is one end of the inductor, a second switch connected between the first electrode of the panel and a base voltage source, and a second end of the inductor. A third switch connected between a second node, a third node that is between the first electrode of the panel and the second switch, and a fourth node that is between the first node, the second electrode of the panel, and the base voltage source. And a fourth switch connected therebetween, a fifth switch connected between the sustain voltage source and the second node, and a sixth switch connected between the fourth node and the base voltage source.

Each of the plurality of switches is characterized by including a diode connected between the both ends of the switch.

The first to third switches form a current path leading to the sustain voltage source and the base voltage source such that energy from the sustain voltage source is stored in the inductor, and the sixth switch is configured to store the energy while the energy is stored in the inductor. A current path is formed between the two electrodes and the base voltage source.

The third and fourth switches generate a resonance between the panel and the inductor so that energy stored in the inductor is supplied to the first electrode of the panel, between the first electrode of the panel, the inductor, and the second electrode of the panel. It is characterized by forming a current path.

The third, fifth and sixth switches may form a current path between the sustain voltage source, the panel, and the base voltage source so that a sustain voltage is supplied from the sustain voltage source to both ends of the panel.

The fourth switch generates a resonance between the panel and the inductor so that energy stored in the first electrode of the panel is supplied to the second electrode of the panel and the diode of the third switch and the inductor of the third switch. And forming a current path between the second electrodes of the panel.

The first, second and fourth switches form a current path between the sustain voltage source, the panel, the second switch and the base voltage source such that a voltage from the sustain voltage source is supplied to the second electrode of the panel. do.

The third switch generates a resonance between the panel and the inductor such that the energy stored in the second electrode of the panel is supplied to the first electrode of the panel and the diode of the fourth switch and the inductor of the fourth switch. And forming a current path between the first electrodes of the panel.

The fourth and sixth switches generate resonance between the panel and the inductor so that the second electrode of the panel is maintained at the base voltage from the base voltage source and the diode and the inductor of the first and third switches of the panel. And a current path between the base voltage source and the base voltage source.

The first to third switches may generate a reverse voltage to the inductor to form a current path between the base voltage source and the sustain voltage source so that energy stored in the inductor is supplied to and recovered from the sustain voltage source.

And the second and sixth switches form a current path between the base voltage source, the panel and the base voltage source such that the first and second electrodes of the panel are maintained at the base voltage from the base voltage source.

The energy recovery method of the plasma display panel according to the present invention comprises the steps of: storing energy from a sustain voltage source in an inductor in an energy recovery method of a plasma display panel having first and second electrodes for sustain discharge; Forming resonance between the inductor and the inductor, supplying energy to the panel, supplying a sustain voltage from the sustain voltage source to the panel, inducing a reverse voltage to the inductor, It characterized in that it comprises the step of supplying to the sustain voltage source.

The energy recovery method of the plasma display panel according to the present invention further comprises the step of forming a resonance between the panel and the inductor to move the energy stored in any one of the first and second electrodes of the panel to store in another electrode. It is characterized by including.

The energy stored in the other one of the first and second electrodes is stored in a polarity opposite to the energy stored in any one of the first and second electrodes.

The reverse voltage of the inductor is characterized in that the energy stored by the movement of the energy stored in any one of the first and second electrodes of the panel.

The supplying of the sustain voltage may include maintaining the electrode at the sustain voltage by adding the sustain voltage to the electrode to which the energy is stored having the opposite polarity.

The energy recovery method of the plasma display panel according to the present invention further comprises maintaining the first and second electrodes of the panel at a base voltage from a base voltage source.                     

Other objects and features of the present invention in addition to the above objects will be apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 7 to 18.

7 is a view showing an energy recovery apparatus of the PDP according to an embodiment of the present invention.

Referring to FIG. 7, an energy recovery apparatus of a PDP according to an embodiment of the present invention includes a panel capacitor Cp having first and second electrodes Y and Z for sustain discharge; A sustain voltage source Vs for supplying a sustain voltage to the panel capacitor Cp; A first switch Q1 connected to the first node N1, which is one end of the sustain voltage source Vs and the inductor L; A second switch Q2 connected between the first electrode Y and the ground voltage source GND; A third switch Q3 connected between the second node N2, which is the other end of the inductor L, and the third node N3, which is between the first electrode Y and the second switch Q2; A fourth switch Q4 connected between the first node N1 and the ground voltage source GND; A fifth switch Q5 connected between the sustain voltage source Vs and the second node N2; The fourth switch Q4 and the second electrode Z have a sixth switch Q6 connected between the fourth node N4 and the ground voltage source GND.

The panel capacitor Cp equivalently represents the capacitance formed between the first electrode Y and the second electrode Z of the PDP. The panel capacitor Cp generates sustain discharge by the sustain voltage Vs having opposite polarities.

The inductor L stores energy according to the switching of the first to sixth switches Q1 to Q6, and then stores the stored energy by LC resonance with the panel capacitor Cp. The electrode is supplied to any one of the electrodes Y and Z. In addition, the inductor L recovers and stores the energy from the panel capacitor Cp according to the switching of the first to sixth switches Q1 to Q6, and then stores the stored energy in the sustain voltage source Vs.

The first switch Q1 supplies the sustain voltage Vs from the sustain voltage source Vs to the first node N1 according to the first switching signal. The second switch Q2 electrically connects the third node N3 to the ground voltage source GND according to the second switching signal. The third switch Q3 electrically connects the second node N2 to the third node N3 according to the third switching signal. The fourth switching Q4 electrically connects the first node N1 to the fourth node N4 according to the fourth switching signal. The fifth switch Q5 supplies the sustain voltage Vs from the sustain voltage source Vs to the second node N2 in accordance with the fifth switching signal. The sixth switch Q6 electrically connects the fourth node N4 to the ground voltage source GND according to the sixth switching signal.

The first to sixth switches Q1 to Q6 control the flow of current while being turned on and off according to the first to sixth switching signals. A diode is connected in parallel to each of the first to sixth switches Q1 to Q6. These diodes may be used as internal or external diodes of the first to sixth switches Q1 to Q6. On the other hand, each of the first to sixth switches Q1 to Q6 is composed of any one of a semiconductor switch element, for example, a MOS FET, an IGBT, an SCR, and a BJT.                     

FIG. 8 is a timing diagram and waveform diagrams illustrating on / off timings of the switches illustrated in FIG. 7 and voltages applied to panel capacitors and currents of inductors.

Referring to FIG. 8, an energy recovery apparatus and a recovery method of a plasma display panel according to an exemplary embodiment of the present invention will be described.

First, in the T1 period, the first and third switches Q1 and Q3 are turned on by the first and third switching signals in the high state HIGH. In the T1 period, the second switch Q2 and the fourth to sixth switches Q4, Q5, and Q6 maintain the state of the previous period T0. Accordingly, in the T1 period, as shown in FIG. 9, the sustain voltage source Vs, the first switch Q1, the first node N1, the inductor L, the second node N2, and the third switch Q3. ), A current path leading to the ground voltage source GND is formed via the fourth node N4 and the second switch Q2. Therefore, the inductor L stores energy supplied from the sustain voltage source Vs. On the other hand, in the T1 section, the second electrode Z of the panel capacitor Cp is supplied with the base voltage OV from the base voltage source GND by the on state of the sixth switch Q6.

In the T2 period, the first and second switches Q1 and Q2 are turned off by the first and second switching signals in the low state. In the T2 period, the third to sixth switches Q3 to Q6 maintain the state of the previous period T1. Accordingly, in the period T2, as shown in FIG. 10, the second electrode Z of the panel capacitor Cp, the fourth node N4, the diode of the fourth switch Q4, the first node N1, and the inductor. A current path is connected to the second node N2, the second node N2, the third switch Q3, the third node N3, and the first electrode Y of the panel capacitor Cp. In this T2 period, the inductor L forms a resonance loop between the panel capacitor Cp and the inductor L by turning off the first and second switches Q1 and Q2. Accordingly, the inductor L supplies energy stored by LC resonance with the panel capacitor Cp to the first electrode Y of the panel capacitor Cp. Therefore, the voltage Vcp of the panel capacitor Cp rises to the sustain voltage during the T2 period.

In the T3 period, the third and fifth switches Q3 and Q5 are turned on by the third and fifth switching signals in the high state. In the T3 period, the first and second switches Q1 and Q2 and the fourth switch Q4 maintain the off state of the previous period T2, and the sixth switch Q6 turns on the previous period T2. Maintain state. Accordingly, in the period T3, as shown in FIG. 11, the sustain voltage source Vs, the second node N2, the third switch Q3, the third node N3, the panel capacitor Cp, and the fourth node ( N4), a sixth switch Q6 and a current path leading to the ground voltage source GND are formed. Therefore, the voltage Vcp of the panel capacitor Cp maintains the sustain voltage Vs from the sustain voltage source Vs during the T3 period.

In the T4 period, the fourth switch Q4 is turned on by the fourth switching signal in the high state, and the third switch Q3 and the fifth by the third and fifth and sixth switching signals in the low state. And the sixth switches Q5 and Q6 are turned off. In the T4 period, the first and second switches Q1 and Q2 maintain the off state of the previous period T3. Accordingly, in the period T4, as shown in FIG. 12, the first electrode Y, the fourth node N4 of the panel capacitor Cp, the diode of the third switch Q3, the second node N2, and the inductor. A current path is connected to L, the first node N1, the fourth switch Q4, the fourth node N4, and the second electrode Z of the panel capacitor Cp. Therefore, in the T4 period, LC resonance between the panel capacitor Cp and the inductor L occurs, thereby recovering energy stored in the first electrode Y of the panel capacitor Cp and supplying the energy to the second electrode Z. . Therefore, during the period T4, the first electrode Y of the panel capacitor Cp is lowered to 0 V at the sustain voltage Vs, and the second electrode Z is increased from 0 V to the sustain voltage Vs. As a result, in the period T4, the polarity of the voltage applied to the panel capacitor Cp is changed.

In the T5 period, the first and second switches Q1 and Q2 are turned on by the first and second switching signals in the high state. In the T5 period, the third to sixth switches Q3 to Q6 maintain the off state of the previous period T4. Accordingly, in the period T5, as shown in FIG. 13, the sustain voltage source Vs, the first switch Q1, the first node N1, the fourth switch Q4, the fourth node N4, and the panel capacitor ( A current path leading to Cp), the third node N3, the second switch Q2 and the ground voltage source GND is formed. Accordingly, the second electrode Z of the panel capacitor Cp maintains the sustain voltage Vs supplied from the sustain voltage source Vs in addition to the energy charged with the opposite polarity in the T4 period.

In the period T6, the third switch Q3 is turned on by the third switching signal in the high state, and the first and second switches Q1, by the first and second switching signals and the fourth switching signal in the low state. Q2) and the fourth switch Q4 are turned off. In the T6 period, the fifth and sixth switches Q5 and Q6 maintain the off state of the previous period T5. Accordingly, in the period T6, as shown in FIG. 14, the second electrode Z, the fourth node N4 of the panel capacitor Cp, the diode of the fourth switch Q4, the first node N1, and the inductor. A current path is formed that leads to L, the second node N2, the third switch Q3, the third node N3, and the first electric pole Y of the panel capacitor Cp. Thus, in the T6 period, LC resonance between the panel capacitor Cp and the inductor L occurs, thereby recovering energy stored in the second electrode Z of the panel capacitor Cp and supplying the energy to the first electrode Y. . Therefore, during the period T6, the second electrode Z of the panel capacitor Cp is lowered to 0V at the sustain voltage Vs and at the same time the first electrode Y is increased from 0V to the sustain voltage Vs. As a result, in the period T6, the polarity of the voltage applied to the panel capacitor Cp is changed.

In the period T7, the fifth and sixth switches Q5 and Q6 are turned on by the fifth and sixth switching signals in the high state. In the T7 period, the first to fourth switches Q1 to Q4 maintain the state of the previous period T6. Accordingly, in the period T7, as shown in FIG. 15, the sustain voltage source Vs, the fifth switch Q5, the second node N2, the third switch Q3, the third node N3, and the panel capacitor ( Cp), a fourth path N4, a sixth switch Q6, and a current path leading to the ground voltage source GND are formed. Accordingly, the first electrode Y of the panel capacitor Cp during the T7 period maintains the sustain voltage Vs supplied from the sustain voltage source Vs in addition to the energy charged with the opposite polarity in the T6 period.

In the T8 period, the fourth switch Q4 is turned on by the fourth switching signal in the high state, and the third and fifth switches Q3 and Q5 are turned on by the third and fifth switching signals in the low state. Is off. The first and second switches Q1 and Q2 and the sixth switch Q6 maintain the state of the previous period T7. Accordingly, in the period T8, as shown in FIG. 16, the first electrode Y, the third node N3 of the panel capacitor Cp, the diode of the third switch Q3, the second node N2, A current path is formed that leads to the inductor L, the first node N1, the fourth switch Q4, the fourth node N4, the sixth switch Q6, and the ground voltage source GND. In the T8 period, LC resonance between the panel capacitor Cp and the inductor L is generated by the turn-on of the fourth switch Q4, so that the inductor L is the first electrode Y of the panel capacitor Cp. It stores energy stored in. In the T8 period, the second electrode Z of the panel capacitor Cp is supplied with the ground voltage 0V from the ground voltage source GND through the sixth switch Q6 to maintain 0V.

In the T9 period, the fourth switch Q4 is turned off by the fourth switching signal in the low state. In the T9 period, the first to third switches Q1, Q2 and Q3 and the fifth and sixth switches Q5 and Q6 maintain the state of the previous period T8. Accordingly, in the period T9, as shown in FIG. 17, the base voltage source GND, the diode of the second switch Q2, the third node N3, the diode of the third switch Q3, and the second node N2. , A current path is formed that leads to the inductor L, the first node N1, the diode of the first switch Q1, and the sustain voltage source Vs. In this T9 period, the fourth switch Q4 is turned off and a large reverse voltage generated in the inductor L is supplied to the sustain voltage source Vs. Therefore, in the T9 period, energy is recovered by supplying the energy stored in the inductor L to the sustain voltage source Vs in the T8 period.

In the T0 period, the second switch Q2 is turned on by the second switching signal in the high state. In the T0 period, the first switch Q1 and the third to sixth switches Q3 to Q6 maintain the state of the previous period T9. Accordingly, in the period T0, as shown in FIG. 18, the base voltage source GND, the second switch Q2, the third node N3, the panel capacitor Cp, the fourth node N4, and the sixth switch ( Q6) and a current path leading to the ground voltage source GND are formed. Therefore, in the T0 period, after the sustain discharge of the panel capacitor Cp is finished, the first and second electrodes Y and Z of the panel capacitor Cp are maintained at the base voltage (0V).

As described above, the energy recovery apparatus and recovery method of the PDP according to the embodiment of the present invention temporarily store energy in the inductor L using a boost method in the start periods T1 to T3 of the sustain period. The stored energy is supplied to the panel capacitor Cp. In other words, in the sustain start period, in addition to the energy recovered through the boost method, the voltage applied to the panel capacitor Cp through the current paths leading to the sustain voltage source Vs and the panel capacitor Cp to the sustain voltage Vs. Is raised.

In the last period (T7 to T9) of the sustain period, a closed loop is formed between the panel capacitor Cp and the inductor L, and the reverse voltage of the inductor L generated by the closed loop is converted into the sustain voltage source Vs. To recover energy. Accordingly, in the last period of the sustain period, power consumption may be reduced by inducing current flow toward the sustain voltage source Vs using the reverse voltage of the inductor L. FIG.

As described above, the energy recovery apparatus and recovery method of the plasma display panel according to the embodiment of the present invention supplies energy to the panel capacitor by using LC resonance, and also converts the energy stored in the first electrode of the panel capacitor to the second electrode. It supplies the energy stored in the panel using the reverse voltage and supplies it to the sustain voltage source. Accordingly, the present invention can reduce power consumption and improve driving efficiency.

In addition, the present invention can improve energy recovery efficiency by reducing energy consumption by storing energy and recovering stored energy regardless of polarity even at the beginning and the end of the sustain.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be defined by the claims.

Claims (19)

A plasma display panel having first and second electrodes for sustain discharge; A sustain voltage source for supplying a sustain voltage to the panel; An inductor for storing energy from the sustain voltage source and supplying the stored energy to the panel by resonance with the panel; A plurality of switches for causing a reverse voltage to be induced in the inductor and forming a current path such that the reverse voltage is supplied to the sustain voltage source, The plurality of switches, A first switch connected between the sustain voltage source and a first node on one side of the inductor; A second switch connected between the first electrode of the panel and a ground voltage source; A third switch connected between a second node which is the other end of the inductor, and a third node which is between the first electrode of the panel and the second switch; A fourth switch connected between the first node and a fourth node between the second electrode of the panel and the ground voltage source; A fifth switch connected between the sustain voltage source and the second node; And a sixth switch connected between said fourth node and said base voltage source. The method of claim 1, The plurality of switches form a resonance between the panel and the inductor to form a current path so that energy supplied to one of the first and second electrodes is supplied to the other electrode. Energy recovery system. delete The method of claim 1, And each switch comprises a diode connected between both ends of the switch. The method of claim 4, wherein The first to third switches form a current path leading to the sustain voltage source and the base voltage source so that energy from the sustain voltage source is stored in the inductor, And the sixth switch forms a current path between the second electrode and a base voltage source while energy is stored in the inductor. The method of claim 4, wherein The third and fourth switches generate a resonance between the panel and the inductor so that energy stored in the inductor is supplied to the first electrode of the panel, between the first electrode of the panel, the inductor, and the second electrode of the panel. An energy recovery device of a plasma display panel, characterized in that to form a current path. The method of claim 4, wherein The third, fifth and sixth switches form a current path between the sustain voltage source, the panel and the base voltage source so that a sustain voltage is supplied from the sustain voltage source to both ends of the panel. Recovery device. The method of claim 4, wherein The fourth switch generates a resonance between the panel and the inductor so that energy stored in the first electrode of the panel is supplied to the second electrode of the panel and the diode of the third switch and the inductor of the third switch. And forming a current path between the second electrodes of the panel. The method of claim 4, wherein The first, second and fourth switches form a current path between the sustain voltage source, the panel, the second switch and the base voltage source such that a voltage from the sustain voltage source is supplied to the second electrode of the panel. An energy recovery device of the plasma display panel. The method of claim 4, wherein The third switch generates a resonance between the panel and the inductor such that the energy stored in the second electrode of the panel is supplied to the first electrode of the panel and the diode of the fourth switch and the inductor of the fourth switch. And forming a current path between the first electrodes of the panel. The method of claim 4, wherein The fourth and sixth switches generate resonance between the panel and the inductor so that the second electrode of the panel is maintained at the base voltage from the base voltage source and the diode and the inductor of the first and third switches of the panel. And a current path between the base voltage source and the energy recovery device of the plasma display panel. The method of claim 4, wherein Wherein the first to third switches generate a reverse voltage to the inductor to form a current path between the base voltage source and the sustain voltage source so that energy stored in the inductor is supplied to and recovered from the sustain voltage source. Energy recovery device. The method of claim 4, wherein The second and sixth switches form a current path between the base voltage source, the panel and the base voltage source such that the first and second electrodes of the panel are maintained at the base voltage from the base voltage source. Panel energy recovery device. delete delete delete delete delete delete

Images