KR20040075503A - Plasma display panel and driving method thereof - Google Patents

Abstract

PURPOSE: A plasma display panel and a driving method thereof are provided to improve color temperature and contrast by driving a PDP(Plasma Display Panel) emitting layer during a sustain period. CONSTITUTION: An emitting layer(62) is formed on an upper substrate(40) so as to be superposed with a sidewall(56) positioned between discharge cells(P1,P2). A first upper dielectric layer(64) is formed among a scan electrode(44), a sustain electrode(46), and the upper substrate, and among the emitting layers. The scan electrode and the sustain electrode are formed in parallel on the first upper dielectric layer at predetermined intervals. A data electrode(52) which is formed on a lower substrate(42) to be crossed with the scan electrode and the sustain electrode. A lower dielectric layer(54) for a wall charge accumulation is formed on the lower substrate. A sidewall is formed on the lower dielectric layer. A fluorescent material(58) is deposited on the surfaces of the lower dielectric layer and the sidewall.

Description

Plasma Display Panel And Driving Method Thereof

The present invention relates to a plasma display panel, and more particularly, to a plasma display panel and a driving method thereof capable of improving color temperature and contrast.

Plasma Display Panel (hereinafter referred to as "PDP") is a display device using visible light generated from a phosphor when ultraviolet light generated by gas discharge excites the phosphor. PDP is thinner and lighter than the cathode ray tube (CRT), which has been the mainstay of the display means, and has the advantage of being able to realize a high definition large screen. PDP is composed of a plurality of discharge cells arranged in a matrix form, one discharge cell constitutes a pixel of the screen.

1 and 2, each of the discharge cells implementing red (R), green (G), and blue (B) of the conventional PDP includes a sustain electrode pair formed on the upper substrate 10, that is, a scan electrode ( 14) and the sustain electrode 16, and the data electrode 22 formed on the lower substrate 12.

The upper dielectric layer 18 and the passivation layer 20 are stacked on the upper substrate 10 having the scan electrode 14 and the sustain electrode 16 side by side. Wall charges generated during plasma discharge are accumulated in the upper dielectric layer 18. The passivation layer 20 prevents damage to the upper dielectric layer 18 due to sputtering generated during plasma discharge and increases emission efficiency of secondary electrons. As the protective film 20, magnesium oxide (MgO) is usually used. The data electrode 22 is formed on the lower substrate 12 in a direction crossing the scan electrode 14 and the sustain electrode 16.

The lower dielectric layer 24 for wall charge accumulation is formed on the lower substrate 12 on which the data electrode 22 is formed. The partition wall 26 is formed on the lower dielectric layer 24, and the phosphor 28 is coated on the lower dielectric layer 24 and the partition wall 26. Red phosphors are applied to the discharge cells that implement red, green phosphors are applied to the discharge cells that implement green, and blue phosphors are applied to the discharge cells that implement blue.

The partition wall 26 is formed in parallel with the data electrode 22 to prevent ultraviolet rays and visible light generated by the discharge from leaking to the adjacent discharge cells. The phosphor 28 is excited by the ultraviolet rays generated during the plasma discharge to generate visible light of any one of red, green, and blue that the discharge cells implement. Inert gas for gas discharge is injected into the discharge space provided by the upper substrate 10, the lower substrate 12, and the partition wall 26.

The discharge cell of this structure is selected by the counter discharge between the data electrode 22 and the scan electrode 14, and then sustains the discharge by the surface discharge between the sustain electrode pairs 14 and 16. In such a discharge cell, the fluorescent substance 28 emits light by ultraviolet rays generated during sustain discharge, so that visible light is emitted to the outside of the cell. As a result, the discharge cells adjust the period during which the discharge is maintained to implement gray scale, and the PDP in which the discharge cells are arranged in a matrix form displays an image.

In addition, the three-electrode AC surface discharge type PDP realizes gray levels by adjusting the amount of light depending on the discharge time. To this end, the three-electrode AC surface discharge type PDP displays an image by a driving method of ADS (Addressing Display Separated). The ADS PDP driving method divides one frame into a plurality of subfields according to the gray level to be implemented, and each of the subfields includes a reset period (RPD) and an address period (APD). It is divided into different sustain periods (SPD). For example, when the image is to be displayed with 256 gray levels, the frame period (16.67 ms) corresponding to 1/60 second is divided into eight subfields SF1 to SF8 as shown in FIG. In addition, each of the eight subfields SF1 to SF8 is divided into a reset period RPD, an address period APD, and a sustain period SPD. Here, the reset period (RPD) and the address period (APD) of each subfield are the same for each subfield, while the sustain period SPD is 2 ⁿ (n = 0, 1, 2, 3, 4, 5,6,7). In this way, since the sustain period SPD is different in each subfield, the gray scale of the image is expressed by adjusting the sustain period SPD of each subfield, that is, the number of sustain discharges.

4 is a waveform diagram showing a method of driving a conventional PDP.

Referring to FIG. 4, one subfield of the conventional PDP is driven by being divided into a reset period RPD, an address period APD, and a sustain period SPD.

In the reset period RPD, the reset pulse RP is supplied to the scan electrode Y. The reset pulse RP has a form of ramp wave in which the voltage increases when set up and the voltage decreases when set down. A reset discharge occurs during setup to form wall charges in the second upper dielectric layer 14. Subsequently, the charged voltage is partially erased by the decreasing voltage during set down so that the wall charge is reduced enough to help the next address discharge without causing an erroneous discharge. In order to reduce the wall charges, a positive DC voltage Vd is supplied to the sustain electrode Z when the reset pulse RP is set down. The reset pulse RP is gradually supplied to the positive DC voltage Vd so that the scan electrode Y becomes negative in relation to the sustain electrode Z when set down. In other words, the polarity is reversed so that the wall charges generated during setup are reduced.

In the address period APD, the scan pulse SP having the negative scan voltage Vy is supplied to the scan electrode Y, and the data pulse DP corresponding to the address voltage Va is applied to the address electrode X. Is supplied to generate an address discharge. The wall charge formed by this address discharge is maintained for the period during which the other discharge cells are addressed.

The triggering pulse TP is supplied to the scan electrode Y at the beginning of the sustain period SPD to start the sustain discharge in the discharge cells in which the wall charge is sufficiently formed in the address period APD. Subsequently, sustain pulses SP1 and SP2 corresponding to the sustain voltage Vs are alternately supplied to the sustain electrode Z and the scan electrode Y to maintain the sustain discharge during the sustain period SPD.

In the conventional PDP, discharge cells implementing different colors are formed with the partition wall 8 interposed therebetween. The light emitting characteristics of the phosphor layers 6 of red (R), green (G) and blue (B) printed on the respective discharge cells are different from each other to implement red (R), green (G) and blue (B). The luminance of the discharge cells is different from each other. In particular, the brightness of the discharge cells implementing green (G) is higher than the brightness of the discharge cells implementing red (R) and blue (B), and the brightness of the discharge cells implementing red (R) is blue (B). It has a higher characteristic than the brightness of the discharge cell to implement. That is, the luminance of the discharge cells implementing red (R), green (G), and blue (B) is 30%: 55%: 15%. In this case, due to the low luminance of the discharge cells implementing the blue (B), the overall color temperature of the discharge cells implementing the red, green, and blue colors is about 5000 to 6000K, which makes it difficult to achieve the white balance. Accordingly, there is a problem that the image quality is lowered.

Accordingly, an object of the present invention is to provide a plasma display panel and a driving method thereof capable of improving color temperature and contrast.

1 is a perspective view showing a discharge cell of a conventional three-electrode AC surface discharge plasma display panel.

FIG. 2 is a cross-sectional view illustrating the plasma display panel shown in FIG. 1.

FIG. 3 is a diagram illustrating gray levels of one frame in the plasma display panel shown in FIG. 1.

4 is a waveform diagram illustrating driving waveforms supplied to the plasma display panel illustrated in FIG. 1.

5 is a cross-sectional view illustrating a plasma display panel according to a first embodiment of the present invention.

FIG. 6 is a waveform diagram illustrating driving waveforms supplied to the plasma display panel illustrated in FIG. 5.

FIG. 7 is a view showing visible light emitted from the first and second discharge cells during the sustain period shown in FIG.

8 is a cross-sectional view illustrating a plasma display panel according to a second embodiment of the present invention.

<Description of Symbols for Main Parts of Drawings>

10,40: upper substrate 12,42: lower substrate

14,44 scan electrode 16,46 sustain electrode

18, 24, 48, 54, 64: dielectric layer 20, 50: protective film

22,52: data electrode 26,56: partition wall

28,58: phosphor 62: light emitting layer

In order to achieve the above object, the plasma display panel according to the present invention is formed on the first substrate of the adjacent first and second discharge cells, respectively, to cause a sustain discharge and the first and second electrodes; And a light emitting layer positioned between the first electrode and the second electrode of the second discharge cell to emit light during the sustain discharge.

The light emitting layer is driven by an electric field between the first electrode of the first discharge cell and the second electrode of the second discharge cell.

The plasma display panel may further include a first upper dielectric layer positioned between the substrate and the first and second electrodes.

The first upper dielectric layer is positioned between the light emitting layers.

At least one of the first and second discharge cells is characterized in that the discharge cell to implement a blue color.

The light emitting layer is made of [InGaN], [(InxGa1-x) yAl1-yN], [SiC], [Zn (oxz) 3Cl], [ZnS: Cu, Cl (Br, I)], [ZnSCdS: Ag, Cl ( Au)], [ZnS: Cu, Al], and [ZnS: Cu, I].

The plasma display panel includes a second upper dielectric layer formed to cover the first and second electrodes, a passivation layer formed on the second upper dielectric layer, and a first substrate formed on a second substrate facing the substrate. A third electrode formed in a direction crossing the two electrodes, a lower dielectric layer formed to cover the third electrode, a partition located between the substrate and the second substrate, and a phosphor layer applied to the partition and the lower dielectric layer It characterized in that it further comprises.

The light emitting layer is formed to overlap the partition wall.

The light emitting layer is formed to overlap the partition wall of the discharge cell to implement a blue color.

The first and second discharge cells are turned on at the same time.

In order to achieve the above object, a method of driving a plasma display panel according to the present invention is characterized in that the light emitting layer positioned between the first electrode of the first discharge cell and the second electrode of the second discharge cell is red, green and And emitting light of at least one color of blue.

The light emitting layer is driven by an electric field between the first electrode of the first discharge cell and the second electrode of the second discharge cell.

At least one of the first and second discharge cells is characterized in that the blue color.

The first and second discharge cells are turned on at the same time.

Wherein the emitting layer emits light of at least one color of red, green, and blue during the sustain period is that the emitting layer emits blue light during the sustain period and blocks the emission of blue light during the period except the sustain period. It features.

Other objects and features of the present invention in addition to the above object will become apparent from the description of the accompanying examples.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 5 to 8.

5 is a cross-sectional view illustrating a PDP having a light emitting layer according to a first embodiment of the present invention.

Referring to FIG. 5, the discharge cell of the PDP having the light emitting layer according to the first embodiment of the present invention includes an upper plate UP and a lower plate DP facing each other with the partition wall 56 interposed therebetween.

The upper plate UP includes a light emitting layer 62, a first upper dielectric layer 64, a scan electrode 44, a sustain electrode 46, a second upper dielectric layer 48, and a protective layer that are sequentially formed on the upper substrate 40. 50 is provided.

The light emitting layer 62 is formed on the upper substrate 40 so as to overlap the partition wall 56 positioned between the adjacent discharge cells P1 and P2. When an electric field is applied to the light emitting layer 62, the light emitting layer 62 emits light of a specific color to the outside. For example, the light emitting layer 62 emits blue light having relatively low luminance characteristics to the outside. The light emitting layer 62 is an LED such as [InGaN], [(InxGa1-x) yAl1-yN], [SiC], an organic EL of [Zn (oxz) 3Cl], [ZnS: Cu, Cl (Br, I)] , [ZnSCdS: Ag, Cl (Au)], [ZnS: Cu, Al], [ZnS: Cu, I] and the like, and are formed of at least one of Powder EL. The light emitting layer 62 is driven during the sustain period of at least two discharge cells P1 and P2 which are turned on at the same time. In detail, the sustain electrode 46 and the scan electrode 44 of the first discharge cell P1 and the sustain electrode 46 and the scan electrode 44 of the second discharge cell P2 during the sustain period are described. Strong sustain discharge will occur. At this time, a sustain discharge occurs relatively weakly in the non-discharge space between the sustain electrode 46 of the first discharge cell P1 and the scan electrode 44 of the second discharge cell P2 where the entire position is generated. The light emitting layer 62 is driven by this weak sustain discharge, and blue light is emitted to the outside. On the other hand, since a relatively low voltage is applied to the light emitting layer 62 during the reset period and the address period, the light emitting layer 62 cannot be driven and thus does not emit blue light to the outside.

The first upper dielectric layer 64 is positioned between the scan electrode 44 and the sustain electrode 46 and the upper substrate 40, and between the emission layers 62. The first upper dielectric layer 64 serves to accumulate charges for driving the light emitting layer 62. Since the first upper dielectric layer 64 controls the driving voltage of the light emitting layer 62, the thickness and the dielectric constant of the first upper dielectric layer 64 depend on the driving voltage of the light emitting layer 62. The driving voltage of the light emitting layer 62 is about 1 to 100V when the potential difference between the scan electrodes 44 and 44 and the sustain electrodes 46 and 46 is about 150 to 300V. The driving voltage of the light emitting layer 62 is preferably about 1 to 50V.

The scan electrodes 44 and 44 and the sustain electrodes 46 and 46 are formed in parallel on the first upper dielectric layer 64 with a predetermined interval therebetween. Each of the scan electrodes 44 and 44 and the sustain electrodes 46 and 46 has a relatively wide width and transparent electrodes 44A and 46A made of a transparent conductive material having a light transmittance of 90% or more, and a relatively narrow width. It is made of bus electrodes 44B and 46B made of a metal material. The bus electrodes 44B and 46B compensate for the resistive components of the transparent electrodes 44A and 46A, which have a large resistance value and do not efficiently transmit power. The bus electrodes 44B and 46B are formed of one of silver (Ag) and copper (Cu), for example.

Wall charges generated during plasma discharge are accumulated in the second upper dielectric layer 48. The passivation layer 50 prevents damage to the second upper dielectric layer 48 due to sputtering generated during plasma discharge and increases emission efficiency of secondary electrons. As the protective film 50, magnesium oxide (MgO) is usually used.

The lower plate DP includes a data electrode 52, a lower dielectric layer 54, a partition wall 56, and a phosphor 58 that are sequentially formed on the lower substrate 42.

The data electrode 52 is formed on the lower substrate 42 in a direction crossing the scan electrode 44 and the sustain electrode 46. A lower dielectric layer 54 for wall charge accumulation is formed on the lower substrate 42 on which the data electrode 52 is formed. The partition wall 56 is formed on the lower dielectric layer 54, and the phosphor 58 is coated on the lower dielectric layer 54 and the partition wall 56.

The partition wall 56 is formed in parallel with the data electrode 52 to prevent ultraviolet rays and visible light generated by the discharge from leaking to adjacent cells.

The phosphor 58 is excited by ultraviolet rays generated during plasma discharge to generate visible light of any one of red, green, and blue. Inert gas for gas discharge is injected into the discharge space provided by the upper substrate 40, the lower substrate 42, and the partition wall 56.

The discharge cell of this structure is selected by the counter discharge between the data electrode 52 and the scan electrode 44, and then maintains the discharge by the surface discharge between the sustain electrode pairs 44 and 46. In such a discharge cell, the fluorescent substance 58 emits light by ultraviolet rays generated during sustain discharge, so that visible light is emitted to the outside of the cell. As a result, the discharge cells adjust the period during which the discharge is maintained to implement gray scale, and the PDP in which the discharge cells are arranged in a matrix form displays an image.

6 is a waveform diagram showing a method of driving a PDP having a light emitting layer according to the present invention.

Referring to FIG. 6, one subfield of a PDP having a light emitting layer according to the present invention is driven by being divided into a reset period (RPD), an address period (APD), and a sustain period (SPD).

In the reset period RPD, the reset pulse RP is supplied to the scan electrode Y. The reset pulse RP has a form of ramp wave in which the voltage increases when set up and the voltage decreases when set down. A reset discharge occurs during setup to form wall charges in the second upper dielectric layer. Subsequently, the charged voltage is partially erased by the decreasing voltage during set down so that the wall charge is reduced enough to help the next address discharge without causing an erroneous discharge. In order to reduce the wall charges, a positive DC voltage Vd is supplied to the sustain electrode Z when the reset pulse RP is set down. The reset pulse RP is gradually supplied to the positive DC voltage Vd so that the scan electrode Y becomes negative in relation to the sustain electrode Z when set down. In other words, the polarity is reversed so that the wall charges generated during setup are reduced. At this time, since the reset voltage of the reset pulse RP applied to the scan electrode Y is relatively weak, the light emitting layer LE is not driven and blue light is not emitted to the outside.

In the address period APD, the scan pulse SP having the negative scan voltage Vy is supplied to the scan electrode Y, and the data pulse DP corresponding to the data voltage Va is applied to the data electrode X. Is supplied to generate an address discharge. The wall charge formed by this address discharge is maintained for the period during which the other discharge cells are addressed. At this time, since the scan voltage Vy and the data voltage Va applied to the scan electrode Y and the data electrode X are relatively weak, the light emitting layer LE is not driven and blue light is not emitted to the outside.

The triggering pulse TP is supplied to the scan electrode Y at the beginning of the sustain period SPD to start the sustain discharge in the discharge cells in which the wall charge is sufficiently formed in the address period APD. Subsequently, sustain pulses SP1 and SP2 corresponding to the sustain voltage Vs are alternately supplied to the sustain electrode Z and the scan electrode Y to maintain the sustain discharge during the sustain period SPD. At this time, the light emitting layer LE is driven by the sustain voltage Vs applied to the first sustain electrode Z and the second scan electrode Y of the first and second discharge cells P1 and P2, and FIG. 7. As shown in FIG. 2, blue light emitted from the light emitting layer LE and visible light from the phosphor 58 of the first and second discharge cells P1 and P2 are emitted to the outside through the upper substrate 40.

As such, in the PDP having the light emitting layer according to the first embodiment of the present invention, when at least two adjacent discharge cells are turned on, blue light from the light emitting layer is emitted to the outside. Accordingly, it is possible to compensate for the luminance of the discharge cells, which implements a relatively low luminance blue. The luminance of the discharge cells, which implements the compensated blue color, increases the overall color temperature, resulting in a uniform white balance.

On the other hand, when the PDP having the light emitting layer according to the first embodiment of the present invention is turned on at the same time the discharge cells implementing the red and green, the light emitting layer located in the discharge cells implementing the red and green is implemented, the unwanted blue light Can be implemented.

8 is a cross-sectional view illustrating a PDP having a light emitting layer according to a second embodiment of the present invention.

Referring to FIG. 8, the PDP having the light emitting layer according to the second embodiment of the present invention has the same configuration except that the light emitting layer 62 overlaps with the partition wall 56 of the discharge cell implementing blue (B). With elements.

The light emitting layer 62 according to the second embodiment of the present invention is formed on the upper substrate 40 so as to overlap with the partition wall 56 of the discharge cell implementing blue (B). An electric field is applied to the light emitting layer 62, and the light emitting layer 62 emits light of a specific color to the outside. For example, the light emitting layer 62 emits blue light having relatively low luminance characteristics to the outside. The light emitting layer 62 is an LED such as [InGaN], [(InxGa1-x) yAl1-yN], [SiC], an organic EL of [Zn (oxz) 3Cl], [ZnS: Cu, Cl (Br, I)] , [ZnSCdS: Ag, Cl (Au)], [ZnS: Cu, Al], [ZnS: Cu, I] and the like, and are formed of at least one of Powder EL. The light emitting layer 62 is driven during the sustain period of the discharge cells implementing blue (B) which are turned on at the same time and at least one discharge cell adjacent thereto.

For example, when the discharge cells implementing blue (B) and red (R) are turned on at the same time, the sustain electrode 46, the scan electrode 44, and the red of the discharge cells implementing blue (B) during the sustain period are turned on. Sustain discharge occurs relatively strongly between the sustain electrode 46 and the scan electrode 44 of the discharge cell implementing (R). At this time, a relatively weak sustain discharge is generated in the non-discharge space between the sustain electrode 46 of the discharge cell implementing blue (B) where all positions are generated and the scan electrode 44 of the discharge cell implementing red (R). Get up. The light emitting layer 62 is driven by this weak sustain discharge, and blue light is emitted to the outside. On the other hand, since a relatively low voltage is applied to the light emitting layer 62 during the reset period and the address period, the light emitting layer 62 cannot be driven and thus does not emit blue light to the outside.

On the other hand, when the discharge cells implementing at least one of the red (R) and green (G) except for the discharge cells implementing the blue (B) is turned on, for example, the discharge cells implementing the green (G) is turned on In this case, sustain discharge occurs relatively strongly between the sustain electrode 46 and the scan electrode 44 of the discharge cell that implements green (G) during the sustain period. In this case, since the discharge cell implementing green (G) and the discharge cell implementing blue (B) are turned off, the partition wall 56 positioned between the green (G) and discharge cells implementing blue (B) and The overlapping light emitting layers 62 are not driven. Accordingly, blue light from the light emitting layer 62 is not emitted, and only green (G) visible light is emitted to the outside.

The first upper dielectric layer 64 is positioned between the scan electrode 44 and the sustain electrode 46 and the upper substrate 40, and between the emission layers 62. The first upper dielectric layer 64 serves to accumulate charges for driving the light emitting layer 62. Since the first upper dielectric layer 64 controls the driving voltage of the light emitting layer 62, the thickness and dielectric constant of the first upper dielectric layer 64 depend on the driving voltage of the light emitting layer 62. The driving voltage of the light emitting layer 62 is about 1 to 100V when the potential difference between the scan electrode 44 and the sustain electrode 46 is about 150 to 300V. The driving voltage of the light emitting layer 62 is preferably about 1 to 50V.

As described above, since the light emitting layer of the PDP according to the second embodiment of the present invention is formed in the partition wall corresponding to the blue discharge cell, the light emitting layer is not implemented when the discharge cell implementing at least one of red and green is turned on. . That is, the light emitting layer is driven when all of the discharge cells that implement red, green, and blue are turned on or when the discharge cells adjacent to blue are turned on, thereby improving the luminance characteristic of blue and the color temperature.

As described above, the plasma display panel and the driving method thereof according to the present invention include a light emitting layer that implements blue color driven by a sustain pulse applied to the sustain electrode pairs during the sustain period of at least two adjacent discharge cells which are turned on at the same time. . Accordingly, it is possible to improve the luminance of the discharge cells which realize relatively low blue color. The luminance of the discharge cells, which implements the compensated blue color, increases the overall color temperature, making it easy to balance white balance. In addition, the light emitting layer of the PDP according to the present invention is driven during the sustain period except for the reset period and the address period to emit blue light to the outside, thereby improving contrast.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (15)

First and second electrodes formed on first substrates of adjacent first and second discharge cells, respectively, to cause sustain discharge; And a light emitting layer positioned between the first electrode of the first discharge cell and the second electrode of the second discharge cell to emit light during the sustain discharge. The method of claim 1, And the light emitting layer is driven by an electric field between the first electrode of the first discharge cell and the second electrode of the second discharge cell. The method of claim 1, And a first upper dielectric layer disposed between the substrate and the first and second electrodes. The method of claim 3, wherein And the first upper dielectric layer is disposed between the light emitting layers. The method of claim 1, At least one of the first and second discharge cells is a plasma display panel, characterized in that the discharge cells to implement blue. The method of claim 1, The light emitting layer is made of [InGaN], [(InxGa1-x) yAl1-yN], [SiC], [Zn (oxz) 3Cl], [ZnS: Cu, Cl (Br, I)], [ZnSCdS: Ag, Cl ( Au)], [ZnS: Cu, Al], and [ZnS: Cu, I]. The method of claim 1, A second upper dielectric layer formed to cover the first and second electrodes; A protective film formed on the second upper dielectric layer; A third electrode formed on a second substrate facing the substrate in a direction crossing the first and second electrodes; A lower dielectric layer formed to cover the third electrode; Barrier ribs positioned between the substrate and the second substrate; And a phosphor layer applied to the barrier ribs and the lower dielectric layer. The method of claim 7, wherein And the light emitting layer is formed to overlap the partition wall. The method of claim 8, And the light emitting layer overlaps with a partition of a discharge cell that implements blue. The method of claim 1, And the first and second discharge cells are turned on at the same time. In the driving method of a plasma display panel having a first and a second electrode formed on a first substrate of adjacent first and second discharge cells, respectively, to cause sustain discharge, Light emitting layer positioned between the first electrode of the first discharge cell and the second electrode of the second discharge cell to emit light of at least one color of red, green and blue during the sustain period. A method of driving a plasma display panel. The method of claim 11, And the light emitting layer is driven by an electric field between the first electrode of the first discharge cell and the second electrode of the second discharge cell. The method of claim 11, At least one discharge cell of the first and second discharge cells is characterized in that the blue display panel driving method. The method of claim 11, And the first and second discharge cells are turned on at the same time. The method of claim 11, Wherein the emitting layer emits light of at least one color of red, green, and blue during the sustain period is that the emitting layer emits blue light during the sustain period and blocks the emission of blue light during the period except the sustain period. A method of driving a plasma display panel.