KR20040068416A - Plasma display panel for high speed driving and method thereof - Google Patents

Abstract

PURPOSE: A plasma display panel for high-speed driving and a method thereof are provided to reduce address time by simultaneously scanning discharge cells, each of which is offset by a 1/2 pixel pitch, using a scan electrode. CONSTITUTION: A discharge space of a discharge cell defined by N-th and (N+1)-th lines is offset by a wall(64). A scan electrode(Y1) is formed to be shared by the discharge cell defined by the N-th and (N+1)-th lines. A sustain electrode(Z1) and the scan electrode are shared by the N-th discharge cell and (N+1)-th discharge cell. An address electrode is crossed with the scan electrode and the sustain electrode. The address electrode is alternatively positioned on the discharge cell and the wall.

Description

Plasma display panel for high speed driving and its driving method

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display panel, and more particularly, to a plasma display panel for high speed driving and a driving method thereof.

Recently, there is a growing interest in flat panel displays that can reduce the weight and volume of cathode ray tubes. Such flat panel displays include liquid crystal displays, plasma display panels (PDPs), field emission displays, and electro-luminescence, and digital signals. Alternatively, analog data is supplied to the display panel.

Among such flat panel display devices, the plasma display panel emits phosphors by 147 nm ultraviolet rays generated when the He + Xe, Ne + Xe or He + Xe + Ne gas is discharged to display images and video including characters or graphics. . The plasma display panel is not only thin and large in size, but also recently, due to technology development, the plasma display panel provides greatly improved image quality.

In particular, the three-electrode AC surface discharge type plasma display panel accumulates wall charges using a dielectric layer during discharging, thereby lowering the voltage required for discharging, and has advantages of low voltage driving and long life because it protects the electrodes from sputtering of plasma.

Referring to FIG. 1, a discharge cell of a three-pole current alternating surface discharge plasma display panel is formed on a scan electrode 30Y and a sustain electrode 30Z formed on an upper substrate 10, and a lower substrate 18. The address electrode 20X is provided.

Each of the scan electrode 30Y and the sustain electrode 30Z has a line width smaller than the line widths of the transparent electrodes 12Y and 12Z and the transparent electrodes 12Y and 12Z and is formed on one side edge of the transparent electrode. 13Z). Indium tin oxide (ITO) is generally used as a material of the transparent electrodes 12Y and 12Z. As the material of the metal bus electrodes 13Y and 13Z, a metal such as chromium (Cr) is usually used. The metal bus electrodes 13Y and 13Z serve to reduce voltage drop caused by the transparent electrodes 12Y and 12Z having high resistance. The upper dielectric layer 14 and the passivation layer 16 are stacked on the upper substrate 10 on which the scan electrode 30Y and the sustain electrode 30Z are formed. In the upper dielectric layer 14, charged particles generated by gas discharge ionization gas (plasma) are accumulated. The protective layer 16 protects the upper dielectric layer 14 from sputtering of charged particles generated during gas discharge and increases the emission efficiency of secondary electrons. As the bottom film 16, magnesium oxide (MgO) is usually used. The address electrode 20X is formed in the direction crossing the scan electrode 30Y and the sustain electrode 30Z. The lower dielectric layer 22 and the partition wall 24 are formed on the lower substrate 18 on which the address electrode 20X is formed.

The phosphor layer 26 is formed on the surfaces of the lower dielectric layer 22 and the partition wall 24. The partition wall 24 is formed to be parallel to the address electrode 20X to physically distinguish the discharge cells, and prevent ultraviolet rays and visible light generated by the discharge from leaking to the adjacent discharge cells. The phosphor layer 26 is emitted by ultraviolet rays generated during gas discharge to generate visible light of any one of red (R), green (G), and blue (B). An inert mixed gas such as He + Xe, Ne + Xe or He + Xe + Ne for discharging is injected into the discharge space provided between the upper and lower substrates 10 and 18 and the partition wall 24.

The partition wall 24 of the conventional AC surface discharge type plasma display panel is divided into a stripe type and a well type structure.

2 is a plan view illustrating a part of a plasma display panel using a stripe-type partition wall in the related art.

The plasma display panel shown in FIG. 2 includes a scan electrode Y and a sustain electrode Z formed on an upper substrate (not shown) and an address electrode X and an address electrode formed on a lower substrate (not shown). The partition wall 34 formed in stripe type between X) is provided.

The scan electrode Y and the sustain electrode Z are formed on the upper substrate, and each of the scan electrode Y and the sustain electrode Z includes a transparent electrode and a metal bus electrode, and an upper dielectric layer (not shown) and a protective film ( Not shown) is stacked.

The address electrode X is formed in the direction crossing the scan electrode Y and the sustain electrode Z.

A lower dielectric layer (not shown) and a partition wall 34 are formed on the lower substrate on which the address electrode X is formed. The phosphor layer 36 is formed on the surfaces of the lower dielectric layer and the partition wall 34.

The partition wall 34 is formed to be parallel to the address electrode X to physically distinguish the discharge cells, and prevent ultraviolet rays and visible light generated by the discharge from leaking to the adjacent discharge cells.

The phosphor layer 36 emits light by ultraviolet rays generated during gas discharge to generate visible light of any one of red (R), green (G), and blue (B).

In the case of using the stripe-type partition wall 34 as described above, it is easy to exhaust, but has a disadvantage in that the application area of the phosphor is small.

3 is a plan view showing a portion of a plasma display panel having a conventional well type partition wall.

The plasma display panel illustrated in FIG. 3 includes a scan electrode Y and a sustain electrode Z formed on an upper substrate (not shown) and an address electrode X and a well type partition wall formed on a lower substrate (not shown). 44 is provided.

The address electrode X is formed in a direction crossing the scan electrode Y and the sustain electrode Z, and the scan electrode Y and the sustain electrode Z are included in each discharge cell line.

A lower dielectric layer (not shown) and a partition wall 44 are formed on the lower substrate on which the address electrode X is formed. The phosphor layer 46 is formed on the surfaces of the lower dielectric layer and the partition wall 44.

The partition wall 44 physically separates the discharge cells, and prevents ultraviolet rays and visible light generated by the discharge from leaking into adjacent discharge cells. In particular, the discharge space of the well type partition wall 44 is independent for each discharge cell.

The phosphor layer 46 emits light by ultraviolet rays generated during gas discharge to generate visible light of any one of red (R), green (G), and blue (B).

Such a well-type cell has a problem in that when the partition wall 44 is used, the coating area of the phosphor is large, so that the luminance can be improved, but exhaust is not good.

The plasma display panel driving method is divided into a single scan method and a dual scan method according to a scan method.

Referring to FIG. 4, when the data lines are not divided up and down, the scan lines, which are not shown, are sequentially driven from the first to the last to be driven in a single scan method to generate an address discharge. Such a single scan type plasma display panel has a problem in that high-speed driving is difficult due to a relatively long address period.

Referring to FIG. 5, when the data lines are divided up and down, the upper and lower scan lines are sequentially driven at the same time, thereby forming a dual scan method. The dual scan plasma display panel has a merit that high-speed operation is possible because the address period is reduced to 1/2 compared to the single scan method, but the cost of the product increases because the number of driving circuits increases and the circuit becomes complicated. have. In addition, a problem arises in that the upper and lower parts are separated by the wall charge amount difference due to the difference in the address discharge time of the upper last line and the lower first line.

Accordingly, there is a need for a plasma display panel capable of high-speed driving without separating data lines.

Accordingly, an object of the present invention is to provide a plasma display panel capable of high speed driving and a driving method thereof.

1 is a perspective view showing a discharge cell structure of a conventional three-electrode AC surface discharge type plasma display panel.

2 is a plan view showing a portion of a plasma display panel having a stripe of a conventional stripe type.

3 is a plan view showing a portion of a plasma display panel having a conventional well type partition wall.

4 is a diagram illustrating data lines of a plasma display panel driven by a conventional single scan method.

5 is a diagram illustrating data lines of a plasma display panel driven by a conventional dual scan method.

6 is a plan view showing a portion of a plasma display panel according to the present invention.

FIG. 7 illustrates a discharge phenomenon in the plasma display panel shown in FIG. 6.

FIG. 8 is an address driving waveform diagram supplied to the plasma display panel shown in FIG. 7.

FIG. 9 illustrates a discharge phenomenon in the plasma display panel shown in FIG. 6.

FIG. 10 is an address driving waveform diagram supplied to the plasma display panel shown in FIG. 9.

<Explanation of symbols for the main parts of the drawings>

X, 20 (X): address electrode Y, 30 (Y): scan electrode

Z, 30 (Z): sustain electrode 10: upper substrate

12Y: scan transparent electrode 12Z, 62: sustain transparent electrode

13Y, 63: metal bus electrode 14: dielectric layer

16: protective film 18: lower substrate

24, 34, 44, 64: partition 26, 36, 46, 66: phosphor layer

In order to achieve the above object, the plasma display panel according to the present invention is a partition wall for discharging the discharge space of the discharge cells of the N-th and N + 1th two lines, and the scan electrode formed to be shared between the discharge cells of the two lines And an address electrode formed to be alternately shared with the scan electrodes in the discharge cells of the N + 1th and N + 2th lines, and an address formed to alternate with the scan electrode and the sustain electrode and to alternately position the discharge space and the partition wall. It is characterized by including an electrode.

Here, each of the scan electrode and the sustain electrode may include a metal electrode overlapping a partition between the two line discharge cells and a transparent electrode formed widely over the two discharge cells with respect to the metal electrode.

The plasma display panel according to the present invention includes a phosphor layer emitting visible light for each discharge cell, a first dielectric layer coated on a first substrate on which scan electrodes and a sustain electrode are formed, and a second coating applied on a second substrate formed on an address electrode. A dielectric layer is further provided.

A driving method of a plasma display panel of the present invention is a method of driving a plasma display panel including discharge cells having partition walls for discharging discharge spaces adjacent to two adjacent upper and lower lines. Supplying a scan pulse to a shared scan electrode and supplying a data pulse to an address electrode alternately located between the barrier ribs and the discharge space to simultaneously address the two N-th and N + 1th lines; A sustain discharge is caused in the discharge cells selected in the address step by using the first sustain electrode shared to the first discharge cell, the second sustain electrode shared to the N + 1th and N + 2th discharge cells, and the scan electrode. Characterized in that it comprises a maintenance step.

Other objects and features of the present invention other than the above object will become apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to FIGS. 6 to 10.

6 is a plan view showing a portion of a plasma display panel according to the present invention.

The plasma display panel shown in FIG. 6 includes a scan electrode Y formed on an upper substrate, a sustain electrode Z, and an address electrode X formed on a lower substrate, discharge cells of an Nth line, and an N + 1st. The well-type partition 64 is formed so that the discharge cells of a line are shifted by 1/2 pitch.

The scan electrode Y is formed so as to be shared between the discharge cells of the Nth line and the discharge cells of the N + 1th line on the upper substrate.

The sustain electrode Z is formed on the upper substrate so as to be shared by the discharge cells of the N + 1th line and the discharge cells of the N + 2th line.

Each of the scan electrodes Y and the sustain electrodes Z is wide across the upper and lower discharge cells adjacent to the metal bus electrode 63 and the metal bus electrode 63 overlapping the horizontal portion of the partition 64. It consists of the transparent electrode 62 formed. The transparent electrode 62 causes discharge to occur in a wide area of the discharge cell.

The metal bus electrode 63 serves to reduce the voltage drop caused by the transparent electrode 62 having high resistance. In addition, the metal bus electrode 63 of the scan electrode Y and the sustain electrode Z overlap with the partition 64 to be generated in the discharge cell so as not to block visible light passing through the upper substrate, thereby improving brightness and efficiency. It is done.

In this manner, two scan cells vertically adjacent to each other can be simultaneously scanned using one scan pulse by the scan electrodes Y and the sustain electrodes Z alternately formed over the vertically adjacent discharge cells, thereby enabling dual scanning. Done.

The well type partition wall 64 causes the Nth discharge cell and the N + 1th discharge cell to be offset from each other. The partition 64 physically separates the discharge cells, and prevents ultraviolet rays and visible light generated by the discharge from leaking to the adjacent discharge cells.

The address electrode X is formed in a stripe type so as to alternate between the discharge area of the discharge cell and the partition 64 under the partition 64. The address electrode X crosses the scan electrode Y and the sustain electrode Z. FIG. Accordingly, data electrodes are formed in two discharge cells adjacent to each other up and down, and thus independent data information can be entered while simultaneously scanning adjacent cells.

The lower dielectric layer is formed on the lower substrate on which the address electrode X is formed. The phosphor layer 66 is formed on the surfaces of the lower dielectric layer and the partition wall 64. The phosphor layer 66 emits light by ultraviolet rays generated during gas discharge to generate visible light of any one of red (R), green (G), and blue (B).

As described above, in the plasma display panel according to the present invention, discharge cells of two adjacent upper and lower lines are arranged to be offset from each other, and one scan electrode Y is shared between the two discharge cells, and the address electrodes X are disposed in the two discharge cells. By forming independently, two adjacent upper and lower lines can be simultaneously addressed, thereby reducing the address time by 1/2. In addition, the number of scan drive ICs can be reduced to 1/2 by simultaneously scanning the discharge cells of two upper and lower lines using one scan electrode Y.

Since the number of scan electrodes Y can be reduced to 1/2 as compared with the conventional method, and the number of sustain electrodes Z can be reduced as compared with the related art, the structure of the plasma display panel is simplified. Furthermore, since the number of scan drive ICs can be reduced to 1/2 compared to the related art by reducing the number of scan electrodes (Y), the cost of the product can be lowered.

Hereinafter, the driving method of the present invention will be described in detail with reference to FIGS. 7 to 10.

FIG. 7 illustrates a discharge phenomenon in the plasma display panel shown in FIG. 6.

8 is an address driving waveform diagram supplied to the plasma display panel of FIG. 7.

7 to 8, when a scan pulse is applied to scan electrode 1, data is applied to data lines 2, 3, 4, 5, 6, and 7, and data is not applied to 1, 8, and 9. Do not.

Address discharges occur in lines 2, 3, 4, 5, 6, and 7 to which data is applied, and address discharges do not occur in lines 1, 8, and 9 where data is not applied.

On the other hand, when a scan pulse is applied to scan electrode 2, data is applied to data lines 2, 6, 7, 8, and data is not applied to lines 1, 3, 4, 5, and 9.

Address discharges occur on lines 2, 6, 7, and 8 to which data is applied, and address discharges do not occur on lines 1, 8, and 9 where data is not applied.

In this manner, two scan cells can be simultaneously addressed with one scan pulse, thereby enabling dual scan.

9 illustrates a cell structure and a discharge mechanism according to a second embodiment of the present invention.

10 is a view showing a discharge waveform according to the second embodiment.

9 to 10, when a scan pulse is applied to scan electrode 1, data is applied to data lines 1, 2, 5, 6, and 9, and data is not applied to 3, 4, 7, and 8. .

Address discharges occur at lines 1, 2, 5, 6, and 9 to which data is applied, and address discharges do not occur at lines 3, 4, 7, and 8 to which data is not applied.

On the other hand, when a scan pulse is applied to scan electrode 2, data is applied to data lines 2, 4, and 6, and data is not applied to lines 1, 3, 5, 7, 8, and 9.

Address discharges occur on lines 2, 4, and 6 to which data is applied, and address discharges do not occur on lines 1, 3, 5, 7, 8, and 9 where data is not applied.

In this way, two scan cells can be simultaneously addressed with one scan pulse, thereby enabling dual scan.

As described above, the plasma display panel and the driving method thereof according to the present invention can simultaneously scan the discharge cells arranged by 1/2 pixel pitch on the Nth line and the N + 1th line using one scan electrode. As a result, the address time can be reduced to 1/2, thereby enabling high-speed driving.

In addition, the plasma display panel according to the present invention is formed by sharing one scan electrode in two discharge cells adjacent to each other up and down, thereby reducing the number of scan electrodes to dually drive the number of scan drive ICs in the conventional upper and lower screens. It can be reduced to 1/2 compared to.

In addition, in the plasma display panel according to the present invention, since the metal bus electrodes included in the scan electrodes and the sustain electrodes overlap the horizontal portions of the partition walls, the visible light transmission is not blocked, thereby improving brightness and efficiency.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (4)

Barrier ribs formed by discharging discharge spaces of the discharge cells of the N-th and N + 1th two lines; A scan electrode formed to be shared by the discharge cells of the two lines; A sustain electrode which is alternately shared with the scan electrode and is shared by the discharge cells of the N + 1th and N + 2th lines; And an address electrode intersecting the scan electrode and the sustain electrode, the address electrode being alternately positioned between the discharge space and the partition wall. The method of claim 1, Each of the scan electrode and the sustain electrode, And a metal electrode overlapping the partition wall between the two line discharge cells, and a transparent electrode formed widely over the two discharge cells with respect to the metal electrode. The method of claim 1, A phosphor layer emitting visible light for each discharge cell, A first dielectric layer coated on the first substrate on which the scan electrode and the sustain electrode are formed; And a second dielectric layer coated on the second substrate formed on the address electrode. A driving method of a plasma display panel including discharge cells having partition walls that provide a discharge space that is shifted from two adjacent upper and lower lines, The scan pulses are supplied to the scan electrodes shared by the discharge cells of the Nth and N + 1th lines, and the data pulses are supplied to the address electrodes alternately located between the barrier ribs and the discharge space, thereby providing the Nth and N + 1st two lines. Simultaneously addressing, A discharge cell selected in the address step using the first sustain electrode shared to the N-1 th and N th discharge cells, the second sustain electrode shared to the N + 1 th and N + 2 th discharge cells, and the scan electrode And a holding step of causing a sustain discharge in the field.