KR20040062114A - In plane switching mode liquid crystal display device and method of fabricating thereof - Google Patents

Abstract

PURPOSE: An in-plane switching mode LCD(liquid crystal display) and a method for manufacturing the LCD are provided to reduce the number of manufacturing process steps and manufacturing cost. CONSTITUTION: An In-plane switching mode LCD includes a substrate(120) having a pixel region including a plurality of pixels defined by a plurality of gate lines and data lines and a pad region, a gate electrode(111) formed on the pixel region of the substrate, and a gate insulating layer formed on the overall surface of the substrate including the gate electrode. The LCD further includes a semiconductor layer(112) formed on the gate insulating layer, a thin film transistor including a source electrode(113b) and a drain electrode(114a,114b), and a passivation layer(124) formed on the thin film transistor. The LCD also has at least one common electrode(105) formed on the pixel region, a two-level pixel electrode(107a,107b) formed in parallel with the common electrode to generate an in-plane field, a pad formed on the pad region, and a two-level metal layer formed on the pad.

Description

Transverse electric field mode liquid crystal display device and manufacturing method therefor {IN PLANE SWITCHING MODE LIQUID CRYSTAL DISPLAY DEVICE AND METHOD OF FABRICATING THEREOF}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a transverse field mode liquid crystal display device, and more particularly, to a transverse field mode liquid crystal display device and a method of manufacturing the same, which can simplify the manufacturing process and reduce manufacturing cost by using a 4-mask without a diffraction mask.

Recently, with the development of various portable electronic devices such as mobile phones, PDAs, and notebook computers, there is a growing demand for flat panel display devices for light and thin applications. Such flat panel displays are being actively researched, such as LCD (Liquid Crystal Display), PDP (Plasma Display Panel), FED (Field Emission Display), VFD (Vacuum Fluorescent Display), but mass production technology, ease of driving means, Liquid crystal display devices (LCDs) are in the spotlight for reasons of implementation.

Such liquid crystal display devices have various display modes according to the arrangement of liquid crystal molecules. However, TN mode liquid crystal display devices are mainly used because of the advantages of easy monochrome display, fast response speed, and low driving voltage. In such a TN mode liquid crystal display device, liquid crystal molecules aligned horizontally with the substrate are almost perpendicular to the substrate when a voltage is applied. Therefore, there is a problem that the viewing angle is narrowed upon application of voltage due to the refractive anisotropy of the liquid crystal molecules.

In order to solve this viewing angle problem, liquid crystal display devices of various modes having wide viewing angle characteristics have recently been proposed, but among them, the liquid crystal display device of the lateral field mode (In Plane Switching Mode) is applied to actual production. It is produced. The IPS mode liquid crystal display device aligns liquid crystal molecules in a plane by forming at least one pair of electrodes arranged in parallel in a pixel to form a transverse electric field substantially parallel to the substrate.

1 is a view showing the structure of a conventional IPS mode liquid crystal display device. As shown in the figure, the pixels of the liquid crystal panel 1 are defined by gate lines 3 and data lines 4 arranged vertically and horizontally. Although only the (n, m) th pixels are shown in the drawing, the actual liquid crystal panel 1 has N (> n) and M (> m) gate lines 3 and data lines 4, respectively. Are arranged so as to form N × M pixels over the entire liquid crystal panel 1. The thin film transistor 10 is formed at the intersection of the gate line 3 and the data line 4 in the pixel. The thin film transistor 10 includes a gate electrode 11 to which a scan signal is applied from the gate line 3, and a semiconductor layer formed on the gate electrode 11 and activated as a scan signal is applied to form a channel layer. 12 and a source electrode 13 and a drain electrode 14 formed on the semiconductor layer 12 and to which an image signal is applied through the data line 4. The image signal input from the outside is applied to the liquid crystal layer. do.

In the pixel, a plurality of common electrodes 5 and a pixel electrode 7 are arranged substantially parallel to the data line 4. In addition, a common line 16 connected to the common electrode 5 is disposed in the middle of the pixel, and a pixel electrode line 18 connected to the pixel electrode 7 is disposed on the common line 16. It overlaps with the common line 16. Storage capacitance is formed in the transverse electric field mode liquid crystal display by overlapping the common line 16 and the pixel electrode line 18.

As described above, in the configured IPS mode liquid crystal display device, the liquid crystal molecules are oriented substantially in parallel with the common electrode 5 and the pixel electrode 7. When the thin film transistor 10 is operated to apply a signal to the pixel electrode 7, a transverse electric field substantially parallel to the liquid crystal panel 1 is generated between the common electrode 5 and the pixel electrode 7. Since the liquid crystal molecules rotate on the same plane along the transverse electric field, gray level inversion due to the refractive anisotropy of the liquid crystal molecules can be prevented.

FIG. 2 is a cross-sectional view taken along the line II ′ of FIG. 1, and illustrates not only a pixel region in which an actual image is implemented but also a pad region formed outside the liquid crystal panel 1 and connected to an external device.

As shown in the drawing, the gate electrode 11 is formed in the pixel region on the first substrate 20, and the gate pad 26 is formed in the pad region, and the entire first substrate 20 is formed. The gate insulating layer 22 is laminated. The semiconductor layer 12 is formed on the gate insulating layer 22 of the pixel region, and the source electrode 13 and the drain electrode 14 are formed thereon. In addition, a passivation layer 24 is formed on the entire first substrate 20.

In addition, a plurality of common electrodes 5 are formed in the pixel region of the first substrate 20, and a pixel electrode 7 and a data line 4 are formed on the gate insulating layer 22. A transverse electric field is generated between 5) and the pixel electrode 7.

In addition, holes 27 are formed in the passivation layer 24 and the gate insulating layer 22 of the pad region, and a transparent metal layer 28 such as indium tin oxide (ITO) is formed thereon.

The black matrix 32 and the color filter layer 34 are formed on the second substrate 30. The black matrix 32 is to prevent light leakage into an area where the liquid crystal molecules do not operate. As shown in the drawing, the black matrix 32 is formed between the region of the thin film transistor 10 and between the pixel and the pixel (ie, the gate line and the data line). Area). The color filter layer 34 is composed of R (Red), B (Blue), and G (Green) to realize actual colors. The liquid crystal layer 40 is formed between the first substrate 20 and the second substrate 30 to complete the liquid crystal panel 1.

3A to 3E illustrate a method for manufacturing an IPS mode liquid crystal display device having the above-described structure, and the method illustrated in the drawing is a manufacturing method using five masks. Conventionally, six masks or seven masks have been used to manufacture the IPS mode liquid crystal display device having the above structure, but at present, studies for process simplification have been actively conducted to manufacture IPS mode liquid crystal display devices using mainly five masks.

First, as shown in FIG. 3A, the metal layer is stacked on the first substrate 20 and the metal layer is etched using the first mask to form the gate electrode 11 and the common electrode 5 in the pixel region, and then pads. A gate pad 26 is formed in the region. Subsequently, as shown in FIG. 3B, the gate insulating layer 22 is formed over the entire first substrate 20, the semiconductors are stacked thereon, and the semiconductors are etched using a second mask to etch the semiconductors in the pixel region. Form layer 12.

3C, a metal is deposited on the semiconductor layer 12 and the gate insulating layer 22, and then etched using a third mask to etch the source electrode 13 over the semiconductor layer 12 in the pixel region. ) And the drain electrode 14, and the pixel electrode 7 is formed on the gate insulating layer 22.

As described above, as shown in FIG. 3D, the protective layer 24 is formed on the entire first substrate 20 on which the pixel electrode 7 is formed, and then the gate pad 26 of the pad region is formed using the fourth mask. After the gate insulating layer 22 and the protective layer 24 are etched to form the holes 27, as shown in FIG. 3E, ITO is formed inside the holes 27 using a fifth mask. The metal layer 28 is formed.

Although not shown in the figure, an IPS mode liquid crystal display device is completed by forming a black matrix and a color filter layer on the second substrate and forming a liquid crystal layer between the first substrate and the second substrate.

As described above, the IPS mode liquid crystal display device using the 5-mask can simplify the manufacturing process and reduce the manufacturing cost compared to the method using the 6-mask or the 7-mask. There was a limit to simplifying the manufacturing process and reducing the manufacturing cost.

SUMMARY OF THE INVENTION The present invention has been made in view of the above, and an object of the present invention is to provide a transverse electric field mode liquid crystal display device and a method of manufacturing the same, in which a manufacturing process is reduced and manufacturing cost can be reduced by performing a process using four masks. do.

Another object of the present invention is to provide a transverse electric field mode liquid crystal display device and a method for manufacturing the same, which can further reduce manufacturing cost by performing a 4-mask process without using an expensive diffraction mask.

In order to achieve the above object, a transverse electric field mode liquid crystal display device according to the present invention comprises a substrate comprising a pixel area and a pad area including a plurality of pixels defined by a plurality of gate lines and data lines, A thin film transistor comprising a gate electrode formed on a substrate, a gate insulating layer stacked over the entire substrate on which the gate electrode is formed, a semiconductor layer formed on the insulating layer, a source electrode and a drain electrode formed on the semiconductor layer, and the thin film A protective layer formed over the transistor, at least one common electrode formed in the pixel, a pixel electrode formed in two layers substantially parallel to the common electrode in the pixel to generate a transverse electric field, and on the substrate of the pad region A pad formed and a metal layer formed of two layers formed on the pad The.

The common electrode is formed on a substrate, the pixel electrode is formed on the gate insulating layer, and the source / drain electrode, the pixel electrode, and the metal layer are made of indium tin oxide (Mo / ITO).

In addition, the method of manufacturing a transverse electric field mode liquid crystal display device according to the present invention comprises forming a gate electrode, a common electrode and a pad on a substrate, and laminating a gate insulating layer and a semiconductor layer on the substrate and etching the same to open the pad. And forming a source / drain electrode, a pixel electrode, and a metal layer made of Mo / ITO on the semiconductor layer, forming a protective layer on the source / drain electrode, and etching the semiconductor layer. .

Masks include four masks: a gate electrode and a gate pad mask, a gate pad open mask (for gate insulating layer and semiconductor layer etching), a mask for source / drain electrodes and pixel electrodes, and a mask for forming a protective layer. No diffraction mask is used.

1 is a plan view showing the structure of a conventional transverse electric field mode liquid crystal display device.

2 is a cross-sectional view taken along line II ′ of FIG. 1.

3A to 3E illustrate a conventional method of manufacturing a transverse electric field mode liquid crystal display device.

4A to 4G illustrate a method of manufacturing a transverse electric field mode liquid crystal display device according to the present invention.

Explanation of symbols on the main parts of the drawings

105: common electrode 107: pixel electrode

111 gate electrode 112 semiconductor layer

113: source electrode 114: drain electrode

120,130: substrate 122: gate insulating layer

124: protective layer 126: hole

127: metal layer 132: black matrix

134: color filter layer 140: liquid crystal layer

The present invention provides an IPS mode liquid crystal display device that can simplify the manufacturing process and reduce the manufacturing cost by using a four-mask. In particular, the present invention does not use the expensive diffraction mask used in the conventional four-mask process, it is possible to further reduce the manufacturing cost.

In the IPS mode liquid crystal display device manufacturing method of the present invention, since the source / drain electrode, the pixel electrode, and the data pad are formed of a double layer made of Mo / ITO and are etched in one step, the metal layer on the gate pad is also Mo / ITO. Since a double layer of is formed, two masks conventionally used for source / drain electrode etching and ITO etching can be replaced by one mask.

Hereinafter, a method of manufacturing an IPS mode liquid crystal display device according to the present invention will be described in detail with reference to the accompanying drawings.

4A to 4G illustrate a method of manufacturing an IPS mode liquid crystal display device according to the present invention. In the drawings, for convenience of description, the drawing is divided into a pixel area and a pad area.

First, as shown in FIG. 4A, AlNd and Mo are deposited on the first substrate 120 made of a transparent material such as glass by evaporation or sputtering, and then, using the first mask. By etching, the gate electrode 111 and the common electrode 105 are formed in the pixel region, and the gate pad 126 is formed in the pad region. Subsequently, as shown in FIG. 4B, a gate insulating layer 122, such as an inorganic material such as SiOx or SiNx, is formed on the first substrate 120 by CVD (Chemical Vapor Deposition) method, and a-Si such as The semiconductor layer is stacked to form the semiconductor layer 112a. In this case, the gate insulating layer 122 and the semiconductor layer 112a may be sequentially stacked. Although not shown in the figure, the semiconductor layer 112a includes an impurity layer doped with n ⁺ ions to serve as an ohmic contact layer. Thereafter, the gate insulating layer 122 and the semiconductor layer 112a of the pad region are etched using the second mask to form a hole 127. The gate pad 126 is opened to the outside by the formation of the hole 127.

Subsequently, as shown in FIG. 3C, Mo and ITO are stacked on the semiconductor layer 112a by deposition or sputtering, and then etched using a third mask to etch the source electrode 113a including Mo / ITO in the pixel region. 113b), drain electrodes 114a and 114b and pixel electrodes 107a and 107b are formed, and metal layers 128a and 128b made of Mo / ITO are formed in the pad region. Although not shown in the drawing, a data pad made of Mo / ITO is formed on the gate insulating layer 122 of the pad region.

Thereafter, as shown in FIG. 3D, the semiconductor is formed by using the source electrodes 113a and 113b, the drain electrodes 114a and 114b, the pixel electrodes 107a and 107b, and the metal layers 128a and 128b as masking layers. A portion of the layer 112a (ie, a certain thickness from the surface) is etched. The reason for etching the partial region of the semiconductor layer 112a is to remove the impurity layer (ie, the ohmic contact layer) between the source electrodes 113a and 113b and the drain electrodes 114a and 114b.

Subsequently, as shown in FIG. 4E, SiOx or SiNx is stacked over the entire first substrate 120 and then etched using a fourth mask to etch the source electrodes 113a and 113b and the drain electrodes 114a and 114b. The protective layer 124 is formed on the (). In this case, the protective layer 124 is also formed between the source electrodes 113a and 113b and the drain electrodes 114a and 114b, that is, between the semiconductor layers (in particular, the semiconductor layers forming the channels). As described above, when the semiconductor layer 112a is etched while the protective layer 124 is formed, the protective layer 124, the source electrodes 113a and 113b, the drain electrodes 114a and 114b, and the pixel electrodes 107a, 107b) and the metal layers 128a and 128b block the semiconductor layer 112a, so that the semiconductor layer 112 is formed under the source electrodes 113a and 113b and the drain electrodes 114a and 114b and the protective layer 124. The semiconductor layer 112a remains under the pixel electrodes 107a and 107b and the metal layers 128a and 128b. At this time, although not shown in the drawing, the semiconductor layer 112a covering the data pad is etched to completely open the data pad to the outside.

Subsequently, as illustrated in FIG. 4G, the black matrix 132 and the color filter layer 134 are formed on the second substrate 130, and the liquid crystal layer (B) is formed between the first substrate 120 and the second substrate 130. 140 is formed to complete the liquid crystal panel. In this case, an overcoat layer may be formed on the color filter layer 134 to improve planarization of the second substrate 130 and to protect the color filter layer 134.

The liquid crystal layer 140 may be formed by a vacuum liquid crystal injection method that injects liquid crystal between the first substrate 120 and the second substrate 130 bonded in a vacuum state, and has recently been in the spotlight. crystal dispensing method), that is, the liquid crystal is directly dropped on the first substrate 120 or the second substrate 130, and then the liquid crystal is deposited on the substrate 120 and 130 by the bonding of the first substrate 120 and the second substrate 130. It may be formed by a method to spread evenly throughout the).

As described above, the IPS mode liquid crystal display device according to the present invention includes a mask for a gate electrode and a gate pad, a mask for a gate pad opening (a gate insulating layer and a semiconductor layer etching), a mask for a source / drain electrode and a pixel electrode, and a protective layer. It is produced using a total of four masks such as a forming mask. Thus, since the present invention uses four masks, the process can be simplified and the manufacturing cost can be reduced as compared with the conventional method using five masks.

The structure of the IPS mode liquid crystal display device according to the present invention manufactured by the above method will be described with reference to FIG. 4G.

That is, in the IPS mode liquid crystal display device of the present invention, the source electrodes 113a and 113b, the drain electrodes 114a and 114b, the pixel electrodes 107a and 107b, and the metal layers 128a and 128b are all made of Mo / ITO. The semiconductor layer 112a remains under the pixel electrodes 107a and 107b and the metal layers 128a and 128b. In addition, the protective layer 124 is formed only on the thin film transistor, and is not formed in an area (ie, an image display area) in which the common electrode 105 and the pixel electrodes 107a and 107b are disposed. That is, the pixel electrodes 107a and 107b are open. Therefore, since light is not absorbed by the protective layer 124 when the light is transmitted, the transmittance is improved. In addition, since the protective layer 124 is not formed in the image display area, the strength of the transverse electric field formed between the common electrode 105 and the pixel electrodes 107a and 107b can be prevented from being weakened by the protective layer. It is possible to prevent the charge from being trapped in the protective layer 124.

Meanwhile, the manufacturing method and structure of the IPS mode liquid crystal display device according to the present invention are not limited to the IPS mode liquid crystal display device having a specific structure. Although only four block IPS mode liquid crystal display devices in which two pixel electrodes and three common electrodes are formed in the pixel to form four light transmission regions are shown in the drawing, the present invention is similar to two or six blocks. It will be applicable to IPS mode liquid crystal display of all possible blocks.

As described above, the present invention not only manufactures the IPS mode liquid crystal display device using four masks, but also does not use an expensive diffraction mask, thereby simplifying the manufacturing process and significantly reducing the manufacturing cost.

Claims (14)

A substrate comprising a pixel region and a pad region including a plurality of pixels defined by a plurality of gate lines and data lines; A thin film transistor comprising a gate electrode formed on the substrate of the pixel region, a gate insulating layer stacked over the entire substrate on which the gate electrode is formed, a semiconductor layer formed on the insulating layer, and a source electrode and a drain electrode formed on the semiconductor layer. ; A protective layer formed on the thin film transistor; At least one common electrode formed in the pixel; A pixel electrode formed of two layers and substantially parallel to the common electrode in the pixel to generate a transverse electric field; A pad formed on the substrate of the pad area; And A transverse electric field mode liquid crystal display device comprising a metal layer consisting of two layers formed on the pad. The transverse electric field mode liquid crystal display device of claim 1, wherein the common electrode is formed on a substrate. The transverse electric field mode liquid crystal display device of claim 1, wherein the pixel electrode is formed on a gate insulating layer. The transverse electric field mode liquid crystal display device of claim 1, wherein the pixel electrode and the metal layer are formed of indium tin oxide (Mo / ITO). The transverse electric field mode liquid crystal display of claim 1, wherein the source electrode and the drain electrode are formed of Mo / ITO. The transverse electric field mode liquid crystal display device of claim 1, wherein a semiconductor layer is disposed under the pixel electrode and the metal layer. Forming a gate electrode, a common electrode, and a pad on the first substrate; Stacking a gate insulating layer and a semiconductor layer on the first substrate and etching the same to open the pad; Forming a source / drain electrode, a pixel electrode, and a metal layer made of Mo / ITO on the semiconductor layer; Forming a protective layer on the source / drain electrodes; And A method of manufacturing a transverse electric field mode liquid crystal display device comprising etching a semiconductor layer. The method of claim 7, wherein the forming of the gate electrode, the common electrode and the gate pad, Stacking a metal layer including an AlNd layer and an Mo layer on a first substrate; And Etching the metal layer using a first mask. The method of claim 7, wherein the opening of the pad, Forming a gate insulating layer and a semiconductor layer; And Etching the gate insulating layer and the semiconductor layer using a second mask. The method of claim 7, wherein the forming of the source / drain electrode, the pixel electrode, and the metal layer comprises: Forming a Mo layer and an ITO layer over the semiconductor layer; And Etching the Mo layer and the ITO layer using a third mask. The method of claim 7, wherein forming the protective layer, Forming an insulating layer; Etching the insulating layer using a fourth mask. The method of claim 7, wherein the etching of the semiconductor layer comprises blocking the semiconductor layer with a source / drain electrode, a pixel electrode, a metal layer, and a protective layer, followed by etching. 8. The method of claim 7, further comprising etching a portion of the semiconductor layer while blocking the semiconductor layer with the source / drain electrodes. The method of claim 7, wherein Forming a black matrix on the second substrate; Forming a color filter layer on the second substrate; And Forming a liquid crystal layer between the first substrate and the second substrate.