KR20040053185A - Multilayer printed wiring board - Google Patents

Abstract

The present invention provides a multilayer printed wiring board having a structure in which a conductor circuit is formed on a substrate formed with a through hole through an interlayer resin insulating layer, and the through hole is blocked by a filler, and the inner wall of the through hole. While being harmonized, the filler is a multilayer printed wiring board comprising metal particles, a thermosetting resin or a thermoplastic resin.

In addition, the present invention is a multilayer printed wiring board having a structure in which a conductor circuit is formed on a substrate formed with a through hole through an interlayer resin insulating layer, and the through hole is blocked by a filler. While the inner wall of the silver is harmonized, the filler is made of metal particles, a thermosetting resin or a thermoplastic resin, and the exposed portion of the filler in the through hole is covered with a through hole covering conductor layer.

Description

Multilayer Printed Wiring Board {MULTILAYER PRINTED WIRING BOARD}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer printed wiring board used as a package substrate for mounting an IC chip and the like and a method of manufacturing the same. In particular, it is possible to easily realize a high density of wiring, and furthermore, a through hole or its surroundings when a heat cycle occurs It proposes the multilayer printed wiring board which a crack does not produce in a part.

This invention proposes the through-hole filling resin composition for multilayer printed wiring boards used in order to ensure the favorable electrical connection of a via hole and a through hole in the environment of a high temperature, high humidity, and a heat cycle.

In general, in a double-sided multilayer printed wiring board, a core hole (hereinafter, simply referred to as a "substrate") is provided with a through hole for electrically connecting the front surface and the back surface. By the way, the presence of this through hole becomes a dead space when designing a circuit, which is one of the factors that hinder the densification of wiring.

On the other hand, in order to reduce this dead space, for example,

(1) Japanese Unexamined Patent Application Publication No. 9-8424 discloses a technique of filling a through hole with a resin and roughening the surface of the resin to form a mounting pad on the roughened surface.

(2) Japanese Patent Laid-Open No. 2-196494 discloses a technique of filling a through hole with a conductive paste and dissolving and removing the electrodeposited film covering the through hole to form a landless through hole.

(3) Japanese Patent Laid-Open No. 1-143292 discloses a technique of filling a through hole with a conductive paste and performing copper plating to form a plated film covering the paste.

(4) Japanese Unexamined Patent Application Publication No. 4-92496 discloses a copper plated film, for example, by electroless plating throughout the substrate surface including the inner wall of the through hole, and then fills the through hole with a conductive material (conductive paste). The technique which coat | covers with a copper plating film so that the electrically conductive material may be sealed in a through hole is disclosed.

However, each of the above conventional technologies has the following problems.

(1) In the double-sided multilayer printed wiring board as described in Japanese Patent Application Laid-Open No. 9-8424, the resin surface must be roughened in order to ensure adhesion between the resin filled in the through-hole and the mounting pad. Since the coefficient of thermal expansion is different from that of the metal and the metal, there was a problem that the through-hole conductor layer peeled off or cracked due to the heat cycle.

(2) As a technique described in Japanese Patent Laid-Open No. 2-196494, when an attempt is made to form an opening for a via hole with a laser beam at a position directly above a through hole of an interlayer resin insulating layer, the conductive paste is exposed from the opening, so that the conductive paste There was a problem of being eroded to the resin component in the resin.

(3) In the printed wiring board as described in Japanese Patent Laid-Open No. 1-143292, since the conductive paste is in direct contact with the inner wall of the through-hole of the resin substrate, metal ions tend to diffuse from the wall surface to the inside of the substrate. There is a problem that shortage occurs between the conductor layer and the through hole due to diffusion (migration) of the metal ions.

(4) In the printed wiring board as described in Japanese Patent Laid-Open No. 4-92496, the adhesion between the conductor layer of the through-hole and the conductive material is poor, so that voids tend to occur between them. If a gap occurs between the conductive material and the through hole, there is a problem that the through-hole conductor layer peels off or cracks due to air or water that is accumulated in the gap in use at a high temperature and high humidity condition. there was.

By the way, in such a printed wiring board, there may be a case where it is desired to connect the through hole and the via hole formed in the substrate. In such a case, a pad called "land" is generally protruded around the through hole, and the via hole is connected through the pad portion. By the way, since this pad protrudes in the outer periphery of a through hole, it is a disturbance in many cases, for example, it became a cause for the pitch between adjacent through holes to become large. For this reason, it has become a factor which inhibits densification of wiring and narrowing of the through-hole spacing.

On the other hand, conventionally, as a multilayer wiring board having a high-density wiring function, for example, Japanese Unexamined Patent Application Publication No. 6-275959 fills a through hole with a filler, a conductor layer is provided thereon, and the via layer is a via hole. A multi-layer printed wiring board is formed, and in Japanese Patent Laid-Open No. 5-243728, after filling a through hole with a conductive paste and curing, a conductor layer covering the through hole is formed after grinding the substrate surface. A technique for mounting a surface mount component on this conductor layer is disclosed.

According to these prior arts, it is possible to certainly connect the surface mounting parts on the through-holes, and to increase the density of the wirings and the through-holes, but there are the following problems.

⑤ A multilayer printed wiring board in which through-holes are filled with photosensitive resins specifically listed in Japanese Patent Application Laid-open No. 6-275959 as fillers is subjected to excessive high temperature and humidity conditions such as a pressure cooker test. Peeling occurred between and the conductor layer, and there was a problem that the focusing reliability of via holes and through holes formed on the conductor layer could not be obtained.

(6) The technique disclosed in Japanese Patent Laid-Open No. 5-243728 is not a technique relating to a buildup multilayer printed wiring board, and does not make the most of the original high density wiring function that the buildup method can achieve.

This invention is made | formed in order to solve the above-mentioned subject which the prior art has, The main objective is to propose the multilayer printed wiring board which can implement | achieve the density of wiring easily, and its manufacturing method.

Another object of the present invention is to prevent peeling between the through-hole filler and the conductor layer, to prevent peeling and cracking between the conductor circuit and the interlayer resin insulating layer, to prevent diffusion of metal ions in the filler, and to erode the filler by laser light. It is proposed a structure of a multilayer printed wiring board effective for prevention.

Further, another object of the present invention is to realize a high through hole spacing and a high wiring density in a build-up multilayer printed wiring board without degrading the electrical connection reliability of the through hole and the via hole under high temperature and high humidity conditions. A still further object of the present invention is to propose a structure of a multilayer printed wiring board for ensuring the electrical connection between the inner layer circuit inside the substrate and the build-up multilayer wiring layer on both sides of the substrate even if the substrate is multilayered.

Still another object of the present invention is to propose a configuration of a resin composition used to fill the through hole of such a multilayer printed wiring board.

1 is a cross-sectional view showing an example of a multilayer printed wiring board according to the present invention;

2A to 2F show a part of the manufacturing process of the multilayer printed wiring board according to the present invention;

3A to 3E are views showing a part of the manufacturing process of the multilayer printed wiring board according to the present invention;

4A to 4D are views showing a part of the manufacturing process of the multilayer printed wiring board according to the present invention;

5A to 5F are views showing a part of the manufacturing process of the multilayer printed wiring board according to the present invention;

6A to 6E are views showing a part of the manufacturing process of the multilayer printed wiring board according to the present invention;

7A to 7D show a part of the manufacturing process of the multilayer printed wiring board according to the present invention;

8A and 8B are enlarged cross-sectional views of a part of the multilayer printed wiring board according to the present invention.

The present invention provides a multilayer printed wiring board having a structure in which a conductor circuit is formed on a substrate formed with a through hole through an interlayer resin insulating layer, and the through hole is blocked by a filler, and the inner wall of the through hole. While being harmonized, the filler is a multilayer printed wiring board comprising metal particles, a thermosetting resin or a thermoplastic resin.

In addition, the present invention is a multilayer printed wiring board having a structure in which a conductor circuit is formed on a substrate formed with a through hole through an interlayer resin insulating layer, and the through hole is blocked by a filler. While the inner wall of the silver is harmonized, the filler is made of metal particles, a thermosetting resin or a thermoplastic resin, and the exposed portion of the filler in the through hole is covered with a through hole covering conductor layer.

In the present invention, a conductive circuit is formed on a substrate formed with a through hole through an interlayer resin insulating layer, and the through hole has a structure in which a through hole is blocked by a filler. At the same time, the filler is composed of metal particles, a thermosetting resin or a thermoplastic resin, and the exposed portion of the filler in the through hole is covered with a through hole covering conductor layer, and the through hole covering conductor layer A via hole formed directly thereon is connected to the multilayer printed wiring board.

In addition, the present invention is at least the process of the following ① to ④

① A step of forming a conductor layer and a through hole on both sides of a substrate by electroless plating or electroplating.

② forming a roughened layer on the inner wall of the through hole.

③ A process of filling, drying and curing a filler made of metal particles, a thermosetting resin or a thermoplastic resin in a through hole having a roughening layer on an inner wall thereof.

(4) A step of forming a conductor circuit by electroless plating or further electroplating after forming an interlayer resin insulating layer.

It is a manufacturing method of a multilayer printed wiring board comprising a.

In addition, the present invention is at least the process of the following ① to ⑤

(1) A step of forming a conductor layer and a through hole on both sides of a substrate by electroless plating or electroplating.

② forming a roughened layer on the inner wall of the through hole.

③ A process of filling, drying, and curing a filler made of metal particles, a thermosetting resin or a thermoplastic resin in a through hole.

(4) A step of forming a through-hole coated conductor layer by electroless plating or electroplating on a portion where the through-hole filler is exposed.

(5) A step of forming a conductor circuit by electroless plating or further electroplating after forming an interlayer resin insulating layer.

It is a manufacturing method of a multilayer printed wiring board comprising a.

In addition, the present invention is at least the process of the following ① ~ ⑥

(1) A step of forming a conductor layer and a through hole on both sides of a substrate by electroless plating or electroplating.

② forming a roughened layer on the inner wall of the through hole.

③ A process of filling, drying and curing a filler made of metal particles, a thermosetting resin or a thermoplastic resin in a through hole having a roughening layer on an inner wall thereof.

(4) A step of forming a through-hole coated conductor layer by electroless plating or electroplating on a portion where the through-hole filler is exposed.

⑤ A step of forming an interlayer resin insulating layer.

(6) forming a via hole and a conductor circuit in said interlayer resin insulating layer immediately above said through hole, and connecting said via hole and said through hole covering conductor layer.

It is a manufacturing method of a multilayer printed wiring board comprising a.

Moreover, this invention is the resin composition for through-hole filling of the printed wiring board which consists of a particulate matter, resin, and an inorganic ultrafine powder.

The 1st characteristic of the multilayer printed wiring board of this invention is that the roughening layer is formed in the inner wall conductor surface of the through hole filled with the filler.

A second feature of the multilayer printed wiring board of the present invention resides in that a through hole covering conductor layer covering an exposed surface from the through hole is formed on the filler filled in the through hole.

A third feature of the multilayer printed wiring board of the present invention resides in that via holes are formed and connected directly to the through hole covering conductor layer formed just above the through holes.

A fourth feature of the present invention is to propose a resin composition filled in the through hole of the multilayer printed wiring board.

In the first aspect of the present invention, the roughening layer is formed on the surface of the through hole inner wall so that the filler and the through hole are in close contact with the roughening layer so that no gap is generated. If a gap exists between the filler and the through-hole, the conductor layer formed by electroplating immediately above is not flat, or the air in the gap thermally expands to cause cracking or peeling, or the void on one side. Water clumps and causes migration and crack. If this point and a roughening layer are formed, generation | occurrence | production of such a bad state can be prevented.

In the second aspect of the present invention, if the through-hole covering conductor layer is formed on the filler filled in the through-hole, wiring can also be performed directly on the through-hole, and as described later, the via-hole can be directly connected at this position. There is a number. In addition, if this through hole covering conductor layer is used, even when the via hole opening is formed with a laser beam at a position directly above the through hole in the interlayer resin insulating layer, the through hole covering conductor layer is used to prevent erosion of the resin component in the filler. Play a role of prevention.

According to the third aspect of the present invention, when the via hole is directly connected through the through hole covering conductor layer directly on the through hole, a land (inner layer pad) is not required to be formed and wired around the through hole as in the prior art. In this case, the land shape of the through hole can be made intact. As a result, the distance between the through holes formed in the substrate can be reduced, so that the dead space can be reduced and the number of through holes can be increased. That is, in this configuration, the distance between adjacent through holes can be reduced to 700 µm or less.

In addition, with such a configuration, it is possible to connect to the build-up layer on the surface side of the signal line substrate of the build-up wiring layer on the back side of the substrate via a number of through holes. This fact means that the wiring to the outer circumference of the substrate of the conductor circuit can be performed on both the front and back surfaces of the buildup layers. As described above, in the multilayer printed wiring board, the wirings from the plurality of bumps on the rear surface are connected to the bumps on the surface side, but the same conditions are applied to the build-up wiring layers formed on the outside and inside by forming the through holes at a high density. Since wiring can be integrated, the number of layers of the build-up wiring layer formed on the outside and the inside can be the same and can be reduced.

In the present invention, the pitch between the through holes is set to 700 µm or less in order to obtain such an effect. By setting it as 700 micrometers or less, the through-hole number can be increased and the connection to the buildup layer of the back surface from a surface can be ensured.

(1) about the roughened layer;

As described above, a roughened layer is formed on the surface of the through-hole covering conductor layer covering the inner wall surface of the through-hole and the filler exposed from the through-hole. In particular, the latter roughened layer can directly and reliably connect the via holes to the through hole covering conductor layer. Therefore, even when used under high temperature and high humidity conditions, it is possible to easily realize high density of wiring and through holes in the build-up multilayer printed wiring board without lowering the electrical connection reliability between the through holes and the via holes. Especially, if a roughening layer is formed also in the side surface of a through-hole coating conductor layer, the crack which generate | occur | produces toward an interlayer resin insulating layer from these interfaces by the inadequate adhesion of the side surface of this through-hole coating conductor layer and an interlayer resin insulating layer is made It can prevent effectively.

As for the thickness of the roughening layer formed in the through-hole inner wall and the conductor layer surface, 0.1-10 micrometers is good. This reason is because when too thick, it becomes a cause of an interlayer short, and when too thin, adhesive force with a to-be-adhered body will become low.

These roughened layers may be obtained by subjecting the surface of the through-hole inner wall or through-hole coated conductor layer to be oxidized (reduced) or reduced with a mixed aqueous solution of an organic acid and a second copper complex, or to a copper-nickel phosphorus acicular alloy. Plating is good.

During these treatments, in the method by oxidation (blackening) -reduction treatment, NaOH (10 g / l), NaClO ₂ (40 g / l), Na ₃ PO ₄ (6 g / l) is converted into an oxidation bath (blackening bath), NaOH (10 g / l) and NaBH ₄ (6 g / l) are used as reduction baths.

Moreover, in the process using the mixed aqueous solution of the organic acid-second copper complex, it operates as follows under oxygen coexistence conditions, such as spraying and bubbling, and dissolves metal foil, such as copper which is a conductor circuit.

Cu + Cu (II) A _n → 2Cu (I) A _{n / 2}

2Cu (I) A _{n / 2} + n / 4O ₂ + nAH (aired) → 2Cu (II) A _n + n / 2H ₂ O

A is a complexing agent (acts as a chelate) and n is a coordination number.

The second copper complex used in this treatment is preferably a second copper complex of azoles. The second copper complex of these azoles acts as an oxidizing agent for oxidizing metal copper and the like. As the azoles, diazoles, triazoles and tetraazoles are preferable. Especially, imidazole, 2-methylimidazole, 2-ethylimidazole, 2-ethyl-4-methylimidazole, 2-phenylimidazole, 2-undecyl imidazole, etc. are preferable.

As for content of the 2nd copper complex of these azoles, 1-15 weight% is good. It is because it is excellent in solubility and stability in it being in this range.

Moreover, organic acid is mix | blended in order to dissolve copper oxide.

Specific examples include formic acid, acetic acid, propionic acid, butyric acid, valeric acid, caproic acid, acrylic acid, crotonic acid, oxalic acid, malonic acid, succinic acid, glutaric acid, maleic acid, benzoic acid, glycolic acid, lactic acid, malic acid, sulfoamic acid At least one of which is good.

As for content of this organic acid, 0.1-30 weight% is good. This is to maintain the solubility of the oxidized copper and at the same time ensure the solubility.

Further, the generated first copper complex dissolves under the action of an acid, combines with oxygen to form a second copper complex, and further contributes to oxidation of copper.

Halogen ions, for example, fluorine ions, chlorine ions, bromine ions, and the like may be added to the etching solution composed of the organic acid-second copper complex to aid in dissolution of copper and oxidation of azoles. This halogen ion can be supplied by adding hydrochloric acid, sodium chloride, or the like.

As for the amount of halogen ions, 0.01-20 weight% is good. It is because the roughening layer formed in it being in this range is excellent in the adhesiveness with an interlayer resin insulating layer.

The etching liquid which consists of this organic acid-2nd copper complex dissolves the 2nd copper complex of azoles, and organic acid (halogen ion as needed) in water, and is prepared.

In addition, in the plating treatment of the acicular alloy made of copper-nickel-phosphor, copper sulfate 1-40 g / l, nickel sulfate 0.1-6.0 g / l, citric acid 10-20 g / l, hypophosphite 10-100 g / l, and boric acid 10-40 g It is preferable to use the liquid bath plating bath which consists of / l and 0.01-10 g / l surfactant.

(2) About filler

It is preferable that the 1st filler (A) used in this invention consists of a metal particle, a thermosetting resin, and a hardening | curing agent, or consists of a metal particle and a thermoplastic resin, and may add a solvent as needed. Since such a filler contains metal particles, the metal particles are exposed by polishing the surface, and the filler is integrated with a plating film formed thereon through the exposed metal particles, such as a pressure kger test (PCT). Peeling hardly occurs at the interface with the conductor layer even when used under excessive high temperature and high humidity conditions. Moreover, since this filler is filled in the through hole in which the metal film was formed in the wall surface, migration of metal ion does not arise.

As the metal particles, copper, gold, silver, aluminum, nickel, titanium, chromium, tin / lead, palladium, platinum or the like can be used. Moreover, the particle diameter of these metal particles is 0.1-50 micrometers. The reason is that if less than 0.1 mu m, the surface of the metal particles is oxidized and the wettability to the resin becomes worse, and if it exceeds 50 mu m, the printability becomes worse. Moreover, 30-90 wt% of the compounding quantity of this metal particle is good with respect to whole quantity. The reason is that less than 30 wt% deteriorates the adhesiveness of the conductor layer covering the filler exposed from the through-holes, while exceeding 90 wt% deteriorates the printability.

Examples of the resin include epoxy resins, phenol resins, polyimide resins, fluoro resins such as polytetrafluoroethylene (PTFE), bismaleimide triazine (BT) resins, FEP, PFA, PPS, PEN, PES, nylon, aramid and PEEK. , PEKK, PET and the like can be used.

In order to improve the adhesiveness with resin, the said metal particle may be treated with the complexing agent, a modifier, etc. on the surface. Moreover, hardening | curing agents, such as imidazole series, a phenol type, and an amine type, are used for the said resin, As a solvent, NMP (normal methylpyrrolidine), DMDG (diethylene glycol dimethyl ether), glycerin, water, 1- or 2- Or 3-cyclohexanol, cyclohexanone, methyl cellosolve, methyl cellosolve acetate, methanol, ethanol, butanol, propanol, bisphenol A type epoxy or the like can be used.

In particular, the optimum composition of the filler is a combination of a mixture of 6: 4 to 9: 1 Cu powder and a non-solvent epoxy (type Emulsion Shell, trade name: E-807) and a curing agent in a weight ratio of 8: The combination (combination) of 2: 3 Cu powder and PPS and NMP is preferable.

The following 2nd filler (B) used by this invention is suitable. That is, this kind of filler (B) is a resin composition for through-hole filling, and is used to be distinguished from the above-mentioned filler (A), and its main constitution consists of particulate matter, resin, and inorganic ultrafine powder. .

Since the resin composition for filling through-holes contains an inorganic ultrafine powder of preferably 1 to 1000 nm (more preferably 2 to 100 nm), when filled in the through-hole, the inorganic ultrafine powder Since the network structure formed by the intermolecular force traps the particulate matter, it becomes difficult to separate sedimentation of the particulate matter. As a result, the particulate matter can penetrate into the through-hole covering conductor layer on the filler as an anchor, and when the particulate matter is dissolved and removed, a recess for anchoring can be formed on the filler surface, and the filler and through-hole covering conductor layer can be formed. It is effective in the integration with. In particular, when the particulate matter is a metal particle, the metal particle protrudes on the filler surface, and the metal particle and the through-hole coating conductor layer covering it can be integrated to improve the adhesion.

Thereby, peeling of a filler and a through-hole conductor layer is prevented, and peeling of a filler and the conductor layer which coat | covers this filler does not generate | occur | produce even under high temperature and high humidity conditions.

Here, as the particulate matter, at least one kind of particles selected from metal particles, inorganic particles, and resin particles is preferably used. As the metal particles, the same ones as the filler (A) are used. As the inorganic particles, silica, alumina, mullite, silicon carbide and the like can be used. This inorganic particle may provide surface modifiers, such as a silane coupling agent, to the surface. Furthermore, it is preferable to use at least 1 sort (s) among any selected from epoxy resin, benzoguanamine resin, and amino resin as a resin particle. This is because it is easy to adhere to the resin constituting the filler.

It is preferable that these particulate matters are 0.1-30 micrometers in average particle diameter. This is because the adhesiveness with the through-hole covering conductor layer covering the filler becomes good.

Moreover, it is preferable to make the compounding quantity of these particulate matter into 30 to 90 weight% with respect to the total solid of a resin composition. This is because the adhesiveness and the printability can be secured at the same time.

Next, as the resin constituting the through-hole-filling resin composition (different from the resin particles), a thermosetting resin and a thermoplastic resin can be used.

As a thermosetting resin, at least 1 sort (s) of resin chosen from epoxy resin, polyamide resin, and phenol resin is preferable.

Examples of the thermoplastic resin include fluororesins such as polytetrafluoroethylene (PTFE), tetrafluoroethylene hexafluoropropylene copolymer (FEP), and tetrafluoroethylene perfluoroalkoxy copolymer (PFA), and polyethylene terephthalate (PET). , Polysulfone (PSF), polyphenylene sulfide (PPS), thermoplastic polyphenylene ether (PPE), polyether sulfone (PES), polyetherimide (PEI), polyphenylene sulfone (PPES), polyethylene naphthalate ( PEN), polyether ether ketone (PEEK), or at least one selected from polyolefin resins is preferable.

In particular, at least one of any one selected from bisphenol-type epoxy resins and novolac-type epoxy resins is preferable as the optimum resin used for filling the through holes. The reason is that bisphenol-type epoxy resins can be appropriately selected from resins such as A-type and F-type, so that the viscosity can be adjusted even without using a diluent solvent, and the novolak-type epoxy resin has high strength and high heat resistance and chemical resistance. This is because it is excellent and does not decompose and thermally decompose in a strong base solution such as an electroless solution.

As said bisphenol type epoxy resin, it is preferable to use at least 1 sort (s) among any selected from bisphenol-A epoxy resin and bisphenol F-type epoxy resin. Among them, bisphenol F-type epoxy resins are advantageous because they can be used as solvents with low viscosity.

As said novolak-type epoxy resin, it is preferable to use at least 1 sort (s) among any selected from a phenol novolak-type epoxy resin and a cresol novolak-type epoxy resin.

In the case where a novolak-type epoxy resin and a bisphenol-type epoxy resin are used in combination, the blending ratio is preferably 1/1 to 1/100 by weight. This is because it is a range which can suppress a remarkable increase of a viscosity.

Moreover, as a hardening | curing agent used for such a resin composition, an imidazole series hardening | curing agent, an acid anhydride hardening | curing agent, and an amine hardening | curing agent are preferable. It is because hardening shrinkage is small. By suppressing hardening shrinkage, the filler can be integrated with the conductor layer covering the filler and the adhesion thereof can be improved.

Moreover, such a resin composition can be diluted with a solvent as needed. As this solvent, NMP (normal ethyl pyrrolidine), DMDG (diethylene glycol dimethyl ether), glycerin, water, 1- or 2- or 3- cyclohexanol, cyclohexanone, methylcellsolve, methylcellsolve Acetates, methanol, ethanol, butanol, propanol and the like. As the inorganic ultrafine particles (distinct from the inorganic particles) constituting the through-hole-filling resin composition of the present invention, it is preferable to use silica, alumina silicon carbide, and mullite. Among them, silica is optimal.

The average particle diameter of this inorganic ultrafine particle is 1-1000 nm, More preferably, it is 2-100 nm. The reason for this is that the particle diameter is fine, so that the hydrogen bonds and the bonds estimated to be formed in the form of a network can be trapped without impairing the filling property of the through-holes and trap the particulate matter.

It is preferable that the compounding quantity of this inorganic ultrafine particle shall be 0.1-5 weight% with respect to the total solid of a resin composition. This is because the sedimentation of the metal particles can be prevented without impairing the filling property.

The filler made of such a resin composition has a specific resistance of 10 ⁶ Pa · cm or more, more preferably 10 ⁸ Pa · cm or more, and is a non-conductive filler. This is because, when the filler is made conductive, when the resin composition is cured after being cured, the abrasive chips adhere between the conductor circuits and cause short.

In addition, it is necessary to cure shrinkage to impart conductivity to such a resin composition, but if the amount of cure shrinkage is too large, peeling with the through-hole coated conductor layer covering the filler occurs, which is not preferable.

(3) about an interlayer resin insulating layer;

In the present invention, the interlayer resin insulating layer may be formed of a resin layer having excellent insulating property by using a thermosetting resin, a thermoplastic resin, or a composite of a thermosetting resin and a thermoplastic resin, and the upper layer thereof may be a resin having excellent adhesiveness.

As the thermosetting resin, an epoxy resin, a polyamide resin, a phenol resin, a thermosetting polyphenylene ether (PPE), or the like can be used.

As the thermoplastic resin, fluororesins such as polytetrafluoroethylene (PTFE), polyethylene terephthalate (PET), polysulfone (PSF), polyphenylene sulfide (PPS), thermoplastic polyphenylene ether (PPE), polyether sulfone ( PES), polyetherimide (PEI), polyphenylene sulfone (PPES), tetrafluoroethylene hexafluoropropylene copolymer (FEP), tetrafluoroethylene perfluoroalkoxy copolymer (PFA), polyethylene naphthalate ( PEN), polyether ether ketone (PEEK), polyolefin resin and the like can be used.

As the composite of the thermosetting resin and the thermoplastic resin, epoxy resin-PES, epoxy resin-PSF, epoxy resin-PPS, epoxy resin-PPES and the like are used.

In the present invention, a glass cross impregnated resin composite can be used as the interlayer resin insulating layer. Examples of the glass cross impregnation resin composite include glass cross impregnation epoxy, glass cross impregnation bismalamide triazine, glass cross impregnation PTFE, glass cross impregnation PPE, glass cross impregnation polyimide and the like.

Moreover, in this invention, an adhesive for electroless plating can also be used as an interlayer resin insulating layer.

As the electroless plating adhesive, it is best to disperse the heat-resistant resin particles soluble in the hardened acid or the oxidizing agent in the uncured heat-resistant resin which becomes poorly soluble in the acid or the oxidizing agent by the hardening treatment. The reason is that by treating with an acid or an oxidizing agent, the heat-resistant resin particles are dissolved and reduced to form a roughened surface composed of jar-shaped anchors occupying octopus on the surface.

In the above-mentioned electroless plating adhesive, in particular, the heat-resistant resin particles which have been cured include: ① heat-resistant resin powder having an average particle diameter of 10 μm or less; A mixture of these heat resistant resin powders having a particle diameter of 2 to 10 μm and heat resistant resin powders having an average particle diameter of 2 μm or less, ④ a heat resistant resin powder having an average particle diameter of 2 μm or less on the surface of the heat resistant resin powder having an average particle diameter of 2 to 10 μm, or Pseudoparticles formed by attaching at least one of any inorganic powders. ⑤ A mixture of a heat resistant resin powder having an average particle diameter of 0.1 to 0.8 탆 and a heat resistant resin powder having an average particle diameter of more than 0.8 탆 and less than 2 탆, ⑥ At least one selected from heat resistant resin powder having an average particle diameter of 0.1 to 1.0 탆. Preference is given to using species. This is because they can form more complex anchors.

The heat resistant resin used as the electroless plating adhesive may be a composite of the above-mentioned thermosetting resin, thermoplastic resin, thermosetting resin and thermoplastic resin.

In the present invention, the conductor circuit (including the through hole covering conductor layer) formed on the substrate and the conductor circuit formed on the interlayer resin insulating layer can be connected via via holes. In this case, the via holes may be filled with a plating film or a filler.

(4) a method for producing a multilayer printed wiring board;

Moreover, although the manufacturing method demonstrated below relates to the manufacturing method of a multilayer printed wiring board by a sebative method, about the manufacturing method of a multilayer printed wiring board in this invention, a doubling method, a multi lamination method, and a pin lamy The nation method can also be applied.

(A) Formation of Through Hole

① First, drill through holes in the substrate, and electroless plating is performed on the walls of the through holes and the surface of the copper foil to form through holes.

a. As the substrate, firstly, glass substrates such as glass epoxy substrates, polyimide substrates, bismaleimide-tri-trial substrates, fluororesin substrates, copper clad laminates, ceramic substrates, metal substrates, etc. of these resin substrates can be used. have. In particular, when considering the dielectric constant, it is preferable to use a double-coated copper fluorine resin substrate. This board | substrate is thermocompression-bonded copper foil in which one surface was matched to fluororesin substrates, such as a flutetrafluoroethylene.

b. As the substrate, a second multi-core core substrate may be used. The multilayer core substrate is formed by alternately stacking a conductor layer and prepreg (prepreg). For example, prepreg made of B stage by impregnating glass fiber and aramid fiber or non-woven fabric, epoxy resin, polyimide resin, bismaleimide-triazine resin, fluororesin (polytetrafluoroethylene, etc.) In addition, it is formed by alternately laminating with a circuit board, followed by heating press to integrate. Moreover, as a circuit board, what provided the copper pattern by providing the etching resist on both surfaces of the double-sided copper-clad laminated board, for example can be used.

c. As electroless plating, copper plating is preferable. In the case of poor adhesion of plating, such as a fluororesin substrate, surface modification such as a treatment with a pretreatment agent made of organometallic sodium (trade name: Tetra-Etch), plasma treatment, and the like is performed.

② After that, electroplating is done for thickening. Copper plating is preferable as this electroplating.

Among these treatments, in the case of forming a roughened layer by electroless plating, the copper ion concentration, the nickel ion concentration and the hypophosphite ion concentration are 2.2 × 10 ^{−2 to} 4.1 × 10 ⁻² mol / l and 2.2 × 10 ^{−, respectively.} It is preferable to use a plating aqueous solution having a composition of ^{3 to} 4.1 × 10 ⁻³ mol / l and 0.20 to 0.25 mol / l. It is because the crystal structure of the film which precipitates in this range becomes a needle-like structure, and is excellent in anchor effect.

In addition to the above compound, a complexing agent or an additive may be added to the electroless plating solution. Moreover, you may add 0.01-10 g / l surfactant. As this surfactant, it is preferable to use acetylene containing polyoxyethylene type surfactant, such as Safinol 440, 465, 485 of Nisshin Chemical Co., Ltd., for example.

That is, when forming a roughening layer by electroless plating, copper sulfate 1-40g / l, nickel sulfate 0.1-6.0g / l, citric acid 10-20g / l, hypophosphite 10-100g / l, boric acid 10-40g It is preferable to use the plating aqueous solution of the liquid composition which consists of / l and 0.01-10 g / l surfactant.

③ Furthermore, the roughening layer is installed by roughening the through-hole inner wall and the surface of the electroplating film. This roughened layer is formed by blackening (oxidation) -reduction treatment, formed by spray treatment of a mixed aqueous solution of an organic acid and a second copper derivative, or by copper-nickel-phosphorous needle plating.

When the coarsened layer is formed by redox treatment, NaOH (20 g / l), NaClO ₂ (50 g / l), Na ₃ PO ₄ (15.0 g / l) are used as the oxidation bath, and NaOH (2.7 g / l) , NaBH ₄ (1.0 g / l) is preferably used as a reduction bath.

When forming the roughening layer by the etching process using the mixed aqueous solution of an organic acid and a 2nd copper complex, although it is represented by CZ8100 liquid made by MEC Co., Ltd., it uses the oxidation surface of the bivalent copper contained in liquid, and uses a copper surface. To be uneven.

The roughening layer has a larger ionization tendency than copper and may be covered with a layer of a metal or a noble metal that is titanium or less. The reason is that the metal or precious metal layer covers the roughened layer and prevents local electrode reaction of the conductor circuit and dissolves the conductor circuit when the interlayer insulating layer is roughened. The thickness of this layer is preferably 0.01 to 2 mu m.

Such metals include at least one selected from titanium, aluminum, zinc, iron, indium, thallium, cobalt, nickel, tin, lead, and bismuth. Precious metals include gold, silver, platinum and palladium. Among them, tin is advantageous because it can form a thin layer by electroless substitution plating and can follow the roughening layer. In the case of tin, a tin fluoride tin-thiourea and tin chloride-thiourea solution are used, and a Sn layer having a thickness of about 0.01 to 2 µm is formed by the substitution reaction of Cu-Sn. On the other hand, in the case of a noble metal, methods, such as a spatter and vapor deposition, are employ | adopted.

(2) filling of filler

(1) The filler is filled in the through hole formed in the above (1). Specifically, the filler is filled into the through-hole by coating by a printing method on a substrate on which a mask having an opening is provided in the through-hole portion, and dried and cured after the filling.

In the present invention, a conductive paste can be used in place of the filler. This electrically conductive paste consists of metal powder and resin, and may add a solvent as needed. As metal powder, Cu, Au, Ag, Al, Ni, Pd, Pt, Ti, Cr, Sn / Pb, etc. can be used. As for the particle diameter of this metal powder, 0.1-30 micrometers is good. Examples of the resin used include epoxy resins, phenol resins, polyimide resins, fluororesins such as polytetrafluoroethylene (PTFE), bismaleimide triazine (BT) resins, FEP, PFA, PPS, PEN, PES, nylon, Aramid, PEEK, PEKK, PET and the like can be used. Moreover, as a solvent, NMP (normarmethylpyrrolidone, DMDG (diethylene glycol dimethyl ether), glycerin, water, 1- or 2- or 3- cyclohexanol, cyclohexanone, methylcellosolve, methylcello Solvent acetate, methanol, ethanol, butanol, propanol, bisphenol A epoxy and the like can be used.

In order to raise the adhesive force of metal powder and resin, you may add metal surface modifiers, such as a silane coupling agent, to this filler. As other additives, an antifoaming agent such as an acrylic antifoaming agent or a silicone antifoaming agent, or an inorganic filler such as silica, alumina or talc may be added. In addition, a silane coupling agent may be attached to the surface of the metal particles.

Such a filler is printed, for example on the following conditions. That is, using a printing mask board of a Teflon mesh plate and each skid at 45 °, printing is performed under the conditions of Cu paste-viscosity: 120 Pa.s, skid speed: 13 mm / min, skid press-in amount: 1 mm.

(2) The roughening layer of the filler which protrudes from the through-hole and the surface of the electroplated film of the substrate is removed by polishing to planarize the surface of the substrate. Grinding is good for belt polishing or buff polishing. This polishing exposes a part of the metal particles to the surface, and the adhesion between the metal particles and the through-hole coating layer is improved.

(3) Formation of conductor layer

(1) After the catalyst nucleus is applied to the surface of the substrate flattened in (2), electroless plating and electroplating are carried out to form an electroless plating film having a thickness of 0.1 to 5 µm, and further electroplating as necessary. An electroplating film having a thickness of 5 to 25 µm is provided.

Next, a photosensitive dry film (laminated by glass) on which the pattern is drawn is laminated on the surface of the plated film, exposed to light, developed with a developer to form an etching resist, and the resist non-forming portion is etched. As a result, a through hole covering conductor layer portion covering the conductor circuit portion and the filler is formed.

As the etching solution, an aqueous solution of sulfuric acid-hydrogen peroxide, aqueous ammonium persulfate, aqueous persulfate solution such as sodium persulfate and potassium persulfate, ferric chloride or cupric chloride aqueous solution is preferable.

(2) Then, the etching resist is peeled off to form an independent conductor circuit and through hole covering conductor layer, and then a roughened layer is formed on the surface of the conductor circuit and through hole covering conductor layer.

When the roughening layer is formed on the surface of the through-hole covering conductor layer covering the conductor circuit and the filler, the conductor is excellent in adhesion to the interlayer resin insulating layer, and the side of the through-hole covering conductor layer covering the conductor circuit and the filler and the resin insulating layer and Cracks originating from the interface of do not occur. On the other hand, the through-hole covering conductor layer covering the filler effectively acts to improve the adhesion to the via holes which are electrically connected.

The formation method of these roughening layers is as above-mentioned, The blackening (oxidation) -reduction process, needle alloy plating, or the method of forming by etching etc. is applied. Furthermore, after roughening, resin is applied and filled between the conductor circuits in order to eliminate the irregularities caused by the conductive layer formed on the surface of the substrate, and then hardened. After that, the surface is preferably polished and planarized until the conductor is exposed. It is preferable to use resin which consists of bisphenol-type epoxy resins, such as bisphenol-A epoxy resin and bisphenol F-type epoxy resin, an imidazole hardening | curing agent, and an inorganic particle as a coating resin used at this time. This is because the bisphenol type epoxy resin is low in viscosity and easy to apply. Since bisphenol F type epoxy resin does not need to use a solvent especially, it is advantageous because it can prevent the crack and peeling resulting from volatilization of a solvent at the time of heat hardening. Furthermore, it is preferable to provide a roughening layer on each conductor surface after polishing.

Furthermore, the following steps can be adopted as a method of forming the conductor layer.

That is, a plating resist is formed on the substrate having the above steps 1 and 2, followed by electroplating on the resist ratio forming portion to form a conductor circuit and a through hole covering conductor layer portion, and tin boron fluoride on these conductors. After forming a solder plating film using an electrolytic solder plating solution consisting of lead boron fluoride, hydrofluoric acid and peptone, the plating resist is removed, and the electroless plating film and copper foil under the plating resist are etched away to form an independent pattern. Further, the solder plated film is further dissolved and removed with an aqueous boron fluoric acid solution to form a conductor layer.

(4) Formation of interlayer resin insulating layer and conductor circuit

① An interlayer resin insulating layer is formed on the conductor layer on the substrate thus produced.

As the interlayer resin insulating layer, a thermosetting resin, a thermoplastic resin, or a composite of a thermosetting resin and a thermoplastic resin can be used. In the present invention, the above-mentioned electroless plating adhesive can be used as the interlayer resin insulating material.

The interlayer resin insulating layer is formed by applying an uncured liquid of these resins using a roll coater, a curtain coater, or the like, or laminating by thermally pressing a film-like resin. Further, in this state, the thickness of the interlayer resin insulating layer on the conductor circuit is thin, and the thickness of the interlayer resin insulating layer on the conductor circuit having a large area becomes thick, and unevenness is often generated. Therefore, a metal tube or a metal roll is used. It is preferable to pressurize while heating and to planarize the surface of an interlayer resin insulating layer.

(2) Next, openings are provided in the interlayer resin insulating layer in order to ensure electrical connection with the lower conductor circuits covered by the interlayer resin insulating layer.

When the interlayer resin insulating layer is formed of a photosensitive resin, the opening of the opening is performed by exposure and development treatment, and by laser light when the interlayer resin insulating layer is formed of a thermosetting resin or a thermoplastic resin. The laser beam used at this time includes a carbon dioxide gas laser, an ultraviolet laser, an excimer laser, and the like. In the case of punching with a laser beam, the desmear treatment may be performed. This desmear process can be performed using the oxidizing agent which consists of aqueous solutions, such as chromic acid and a permanganate salt, and you may process with oxygen plasma etc.

(3) After forming an interlayer resin insulating layer having an opening, the surface is roughened as necessary.

When the above-mentioned electroless plating adhesive is used as the interlayer resin insulating layer, the surface of the insulating layer is treated with an acid or an oxidizing agent to selectively dissolve or decompose and remove only the heat resistant resin particles. Examples of the acid include organic acids such as phosphoric acid, hydrochloric acid, sulfuric acid, or formic acid and acetic acid, but it is particularly preferable to use an organic acid. This is because it is difficult to corrode the metal conductor layer exposed from the via hole in the case of roughening. As the oxidizing agent, it is preferable to use chromic acid or permanganate (potassium permanganate).

In addition, even when a thermosetting treatment or a thermoplastic resin is used, surface roughening treatment with an oxidizing agent selected from aqueous solutions such as chromic acid and permanganate is effective.

Moreover, in the case of resins, such as fluororesins (polytetrafluoroethylene etc.) which are not matched with an oxidizing agent, the surface is roughened by a plasma process, a tetra-edge (metal naphthalene compound made from Co., Ltd.), etc.

(4) Next, a catalyst nucleus for electroless plating is provided.

In general, the catalyst nucleus is a palladium-tin colloid, and the substrate is immersed in this solution, dried, and heat treated to fix the catalyst nucleus on the resin surface. The metal core can be embedded in the resin surface by CVD, spatter, or plasma to form a catalyst core. In this case, the metal core is embedded in the resin surface, and plating is formed around the metal core to form a conductor circuit. Thus, the resin and the conductor circuit, such as resins or fluororesins (polytetrafluoroethylene, etc.), are difficult to match. Even if the resin is poorly adhered to, the adhesiveness can be secured. As this metal core, at least 1 sort (s) chosen from palladium, silver, gold, platinum, titanium, copper, and nickel is good. Moreover, the amount of metal nuclei is preferably 20 µg / cm ² or less. If this amount is exceeded, the metal nucleus must be removed.

(5) Next, electroless plating is performed on the surface of the interlayer resin insulating layer, and an electroless plating film is formed on the entire surface. The thickness of an electroless plating film is 0.1-5 micrometers, More preferably, it is 0.5-3 micrometers.

(6) Then, a plating resist is formed on the electroless plating film. As described above, the plating resist is formed by laminating the photosensitive resin film, followed by exposure and development.

⑦ Further, electroplating is performed on the non-plating resist portion to thicken the conductor circuit portion (including the via hole portion). Copper plating is preferable for this electroplating film, and 5-30 micrometers is good.

(8) After further peeling off the plating resist, the electroless plating film under the plating resist is dissolved and removed by etching to form an independent conductor circuit (including via holes).

As the etching solution, an aqueous solution of sulfuric acid-hydrogen peroxide, an aqueous solution of persulfate such as ammonium persulfate, sodium persulfate, potassium persulfate, ferric chloride or cupric chloride aqueous solution is preferable.

Furthermore, it is preferable to fill the via hole with an electroplating metal to make a so-called field via hole in terms of ensuring flatness of the interlayer resin insulating layer.

EMBODIMENT OF THE INVENTION Hereinafter, the suitable example of the multilayer printed wiring board of this invention is demonstrated with reference to drawings. 1 is a cross section of a multilayer printed wiring board according to an embodiment of the present invention, and has a structure in which build-up wiring layers 101A and 101B are formed on the front and rear surfaces of the substrate 100. The build-up layers 101A and 101B include the interlayer resin insulating layer 104 formed of the via hole 102 and the conductor circuit 103, and the interlayer resin insulating layer 204 formed of the via hole 202 and the conductor circuit 203. Is done.

On the front side, solder bumps 105 for connecting with bumps (not shown) of the IC chip are formed, and solder bumps 106 for connecting with bumps (not shown) of the mother board are formed on the back side. In the multilayer printed wiring board, the conductor circuits from the solder bumps 105 connected to the IC chip are wired toward the outer circumferential direction of the substrate, and connected to the solder bumps 106 connected to the mother board side. The outer buildup layer 101A and the inner buildup layer 101B are connected via the through hole 107 formed in the substrate 100.

That is, the through hole 107 is filled with the filler 108, and the through hole covering conductor layer 109 is formed so as to cover the exposed surface from the through hole 107 of the filler 108. An upper via hole 102 is connected to the conductor layer 109, a conductor circuit 103 connected to the via hole 102 is connected to an upper via hole 202, and the via hole 102 is connected to the via layer 102. Solder bumps 105 and 106 are formed in the conductor circuit 203 connected to the 202 or the via hole 202.

In the multilayer printed wiring board according to the present invention having such a configuration, the through hole covering conductor layer 109 formed on the upper side of the filler 108 in the through hole 107 is formed in a circular shape, and the via layer is formed in a via via. The hole 102 is directly connected. By connecting in this way, the area immediately above the through hole 107 functions as an inner layer pad, thereby eliminating dead space, and adding an inner layer pad for connecting from the through hole 107 to the via hole 102 as in the prior art. Since it is not necessary, the land shape of the through hole 107 can be made circular. As a result, the number of through holes can be increased by remarkably increasing the arrangement density of the through holes 107 provided in the substrate 100.

Therefore, dragging and pulling of the conductor circuit in the outer circumferential direction of the substrate can be performed on both the front and back build-up layers 101A and 101B. In addition, in the multilayer printed wiring board as described above, although the wirings from the plurality of bumps on the surface are integrated and connected to the bumps on the back side, the through holes are formed at a high density, so that the build-up wiring layers 101A, The wiring can be integrated at the same face in 101B). As a result, the number of layers of the buildup wiring layers 101A and 101B formed on the outside and the inside can always be reduced.

(Example 1)

(1) 0.8 mm thick polytetrafluoroethylene resin (hereinafter abbreviated as trade name Teflon) Copper foil formed by laminating a copper foil 2 having a thickness of 18 μm in which one side of the substrate side is harmonized with the substrate 1 A laminated sheet (manufactured by Matsushita Electric, trade name: R4737) was used as a starting material (see FIG. 2A). First, the copper clad laminate was ground with a drill, and the inner wall surface was treated with a modifier made of organometallic sodium (manufactured by Junko Co., Ltd., trade name: Tetra Edge) to improve surface wetness (see FIG. 2B).

Next, a palladium-tin colloid was affixed, electroless plating was performed with the following composition, and the electroless plating film of 2 micrometers was formed in the whole surface of a board | substrate.

[Electroless plating solution]

EDTA 150g / l

Copper Sulfate 20g / l

HCHO 30ml / l

NaOH 40g / l

α, α'-bipyridyl 80 mg / g

PEG 0.1g / l

[Electroless plating conditions]

30 minutes at 70 ℃ liquid temperature

Furthermore, electrolytic copper plating was performed on condition of the following, and the electrolytic copper plating film | membrane of thickness 15micrometer was formed (refer FIG. 2C).

[Electrolyte solution]

Sulfuric acid 180g / l

Copper Sulfate 80g / l

Additives (Atotech Co., Ltd., trade name: Gaparasid GL)

1ml / l

[Electroplating Condition]

Current density 1 A / dm ²

30 minutes

Temperature room temperature

(2) A substrate having a conductor (including through hole 3) formed of an electroless copper plated film and an electrolytic copper plated film on the entire surface was washed with water, dried, NaOH (10 g / l), NaClO ₂ (40 g / l), Na ₃ PO ₄ (6 g / l) is subjected to redox treatment with an oxidation bath (blackening bath), NaOH (10 g / l), Na ₄ or NaBH ₄ (6 g / l) reducing bath, and through The roughening layer 4 is provided in the whole surface of the conductor containing the hole 3 (refer FIG. 2D).

(3) Next, the through-holes 3 were filled by screen printing with a filler 5 composed of copper particles / bisphenol F-type epoxy resin / imidazole curing agent = 70/25/5 (weight ratio) having an average particle diameter of 10 µm. And dried and cured. Then, the filler 5 protruding from the roughened layer 4 and the through hole 3 on the upper surface of the conductor is removed by polishing the belt polishing machine using belt polishing paper (manufactured by Sankyo Chemical Co., Ltd.) of # 600, and the belt polishing machine is further removed. Buffing was performed to remove the scratches caused by polishing, and the substrate surface was planarized (see FIG. 2E).

(4) An electroless copper plating film 6 having a thickness of 0.6 mu m was formed by applying a palladium catalyst (manufactured by Atotech) to the surface of the substrate flattened in (3) above and electroless copper plating according to a conventional method. (See FIG. 2F).

(5) Subsequently, electrolytic copper plating was carried out under the following conditions to form an electrolytic copper plating film 7 having a thickness of 15 µm, and the filler 5 filled in the portion and the through hole 3 serving as the conductor circuit. The part which becomes a through-hole covering conductor layer to cover is attached thickly.

[Electrolyte solution]

Sulfuric acid 180g / l

Copper Sulfate 80g / l

Additives (Atotech Co., Ltd., trade name: Gaparasid GL)

1ml / l

[Electroplating Condition]

Current density 1 A / dm ²

30 minutes

Temperature room temperature

(6) A commercial photosensitive dry film was buried on both sides of the substrate on which the portion consisting of the conductor circuit and the through-hole covering conductor layer was formed, and the mask was placed, exposed to 100 mJ / cm ² , and developed and treated with 0.8% sodium carbonate, thickness 15 An etching resist 8 having a thickness was formed (see Fig. 3A).

(7) Then, the plating film of the portion where the etching resist 8 was not formed was dissolved and removed by etching using a mixture solution of sulfuric acid and hydrogen peroxide, and further, the etching resist 8 was peeled off with 5% KOH to separate. Through-hole covering conductor layer 10 covering conductor circuit 9 and filler 5 was formed (see FIG. 3B).

(8) Next, a roughened layer 11 having a thickness of 2.5 μm made of Cu—Ni-P alloy is formed on the surface of the through hole covering conductor layer 10 covering the conductor circuit 9 and the filler 5, and furthermore, A 0.3-micrometer-thick Sn layer was formed on the surface of this roughening layer 11 (refer FIG. 3C. It does not show about a Sn layer).

This formation method is based on the following method. The substrate was acid degreased, soft etched, and then treated with a catalyst solution composed of palladium chloride and an organic acid to give a Pd catalyst. After activating the catalyst, copper sulfate 8g / l, nickel sulfate 0.6g / l and citric acid 15g / l, sodium hypophosphite 29g / l, boric acid 31g / l, a plating solution in an electroless solution of pH = 9 consisting of an aqueous solution of 0.1g / l surfactant, covering the conductor circuit (9) and the filler (5) The roughening layer 11 of Cu-Ni-P alloy was provided in the surface of the through-hole coating conductor layer 10. As shown in FIG. Subsequently, Cu-Sn substitution reaction was carried out using an aqueous solution of 0.1 mol / l tin boron fluoride and 1.0 mol / l thiourea at a temperature of 50 ° C. and pH = 1.2, and the thickness of the surface of the roughened layer 11 was 0.3 μm. Sn layer is provided (not shown for Sn layer).

(9) An interlayer resin insulating layer 12 was laminated on both sides of a substrate with a thickness of 25 占 퐉 teflon sheet (manufactured by DuPont, Teflon ^R FEP) at a temperature of 200 占 폚 and a pressure of 20 kg / cm < ² > Was formed (see FIG. 3D).

(10) A via hole opening 13 having a diameter of 25 µm was provided in the Teflon resin insulating layer 12 with an ultraviolet laser having a wavelength of 10.6 µm (see FIG. 3E). Furthermore, the surface of the Teflon resin insulating layer 12 was saturated by plasma treatment. The plasma treatment conditions were 500 W, 500 mTorr, and 10 minutes.

(11) Pd-targeted sputtering was carried out under the conditions of a pressure of 0.6 Pa, a temperature of 100 ° C., a power of 200 W, and 1 minute of time, and the Pd nucleus was embedded in the surface of the Teflon resin insulating layer 12. At this time, the device for sputtering was used SV-4540 manufactured by Nippon Vacuum Technology Co., Ltd.

The amount of Pd to be embedded was made 20 µg / cm ² or less. The amount of Pd was obtained by measuring the total amount of Pd eluted by immersing the substrate in 6N aqueous hydrochloric acid solution by atomic absorption method, and dividing the total amount of Pd by the exposed area.

(12) The electroless plating of said (1) was performed to the board | substrate which completed the process of said (11), and the electroless plating film 14 of thickness 0.7micrometer was formed in the surface of the Teflon resin insulating layer 12 ( 4a).

(13) On both sides of the substrate on which the electroless plated film 14 was formed in (12) above, a commercial photosensitive dry film was attached, a photomask film was placed thereon, exposed to 100 mJ / cm ² , and developed with 0.8% sodium carbonate. Then, a plating resist 16 having a thickness of 15 μm is provided (see FIG. 4B).

(14) Further, the electroplating of (1) above was carried out to form an electroplated film 15 having a thickness of 15 µm, to thicken the conductive circuit 9 and to plate and charge the via hole 17. Was performed (see FIG. 4C).

(15) Then again, the plating resist 16 was peeled off with 5% KOH, and then the electroless plating film 14 under the plating resist 16 was dissolved and removed by etching using a mixture of sulfuric acid and hydrogen peroxide. A conductive circuit 9 (including a field via 17) having a thickness of 16 μm consisting of the copper plated film 14 and the electrolytic copper plated film 15 was formed to manufacture a multilayer printed wiring board (see FIG. 4D).

Example 2 Multilayer Core Substrate

(1) A 0.5 mm thick double-sided copper-clad laminate 1 'was prepared. First, an etching resist was placed on both surfaces, and an etching process was performed with sulfuric acid-hydrogen peroxide aqueous solution to obtain a substrate having a conductor circuit. Subsequently, the glass epoxy prepreg and the copper foil 2 were sequentially laminated on both surfaces of the substrate, and press-pressed at a temperature of 165 to 170 ° C. and a pressure of 20 kg / cm ² to produce a multilayer core substrate 1 '(Fig. 5a).

(2) Next, a drilled hole of 300 mu m in diameter was drilled into the multi-layer core substrate 1 '(see Fig. 5b), followed by attaching a palladium-tin colloid, followed by electroless plating of the same composition as in Example 1. Was carried out to form an electroless plated film having a thickness of 2 m on the entire surface of the substrate.

Next, electrolytic copper plating was further performed under the same conditions as in Example 1 to form an electrolytic copper plated film 3 having a thickness of 15 µm (see FIG. 5C).

(3) Next, the roughening layer 4 is provided in the whole surface of the conductor 3 containing through-holes similarly to Example 1 (refer FIG. 5D).

(4) Next, the through-hole 3 was filled with a filler 5 (non-conductive hole-filled copper paste, trade name: DD paste) made of copper particles having an average particle diameter of 10 µm in the same manner as in Example 1. And the substrate surface was planarized (refer FIG. 5E).

(5) An electroless copper plated film 6 was then formed on the surface of the substrate flattened in the above (4) as in Example 1 (see Fig. 5F).

(6) Then, in the same manner as in Example 1, electrolytic copper plating was carried out under the conditions of (2) to form an electrolytic copper plating film 7 having a thickness of 15 µm, and the conductor circuit 9 and the through-hole covering diagram The part which becomes the body layer 10 (it becomes circular through-hole land) was formed.

(7) Next, in the same manner as in Example 1, an etching resist 8 was formed on both surfaces of the substrate on which the portion consisting of the conductor circuit 9 and the conductor layer 10 was formed (see Fig. 6A).

(8) Next, as in Example 1, the through hole covering conductor layer 10 covering the independent conductor circuit 9 and the filler material 5 is removed by peeling off the plated film of the portion where the etching resist 8 is not formed. Formed (see FIG. 6B).

(9) Next, similarly to Example 1, the roughening layer 11 was formed in the surface of the through-hole covering conductor layer 10, ie, covering the conductor circuit 9 and the filler 5.

(10) Next, the electroless plating adhesive A and the insulation B were manufactured by the following method.

(A) Preparation of Adhesive A for Electroless Plating of Upper Layer

① 35 parts by weight (80% solids) of 25% acrylate of cresol novolac-type epoxy resin (Japanese chemicals, molecular weight 2500), 3.15 parts by weight of photosensitive monomer (Doa synthetic, Aronix M315), antifoaming agent (manufactured by Sanofco) S-65) 0.5 weight part and 3.6 weight part of NMP were stirred and mixed.

② After mixing 12 parts by weight of polyethersulfone (PES) and an average particle diameter of 1.0 μm of epoxy resin particles (manufactured by Sanyo Chemical Co., Ltd., Polymer Pole), 7.2 parts by weight, and 3.09 parts by weight of an average particle diameter of 0.5 μm, NMP 30 weight was again added. Part was added and stirred and mixed with a bead mill.

③ 2 parts by weight of imidazole hardener (Chigoka Kasei, 2E4MZ-CN), 2 parts by weight of photoinitiator (Ciba-Geigi, Irgacure I-907), photosensitizer (made by Nihon Kayak, DETX-S) 0.2 Parts by weight and 1.5 parts by weight of NMP were stirred and mixed.

These were mixed and the adhesive composition A for electroless plating of the upper layer was prepared.

(B) Preparation of adhesive B for lower electroless plating

① 35 parts by weight (80% solids) of 25% acrylate of cresol novolac-type epoxy resin (Japanese powder, molecular weight 2500), 4 parts by weight of photosensitive monomer (Doa Synthetic Agent, Aronix M315), antifoaming agent (Sanoff Co., Ltd.) S-65) 0.5 weight part and 3.6 weight part of NMP were stirred and mixed.

(2) After mixing 12 parts by weight of polyethersulfone (PES) and 14.49 parts by weight of an average particle diameter of epoxy resin particles (manufactured by Sanyo Chemical Co., Ltd., Polymer Pole), 20 parts by weight of NMP were added, followed by stirring and mixing with a bead mill.

③ 2 parts by weight of imidazole hardener (Chigoka Kasei, 2E4MZ-CN), 2 parts by weight of photoinitiator (Ciba-Geigi, Irgacure I-907), photosensitizer (made by Nihon Kayak, DETX-S) 0.2 Parts by weight and 1.5 parts by weight of NMP were stirred and mixed.

These were mixed and the lower layer of the insulator B for electroless plating was prepared.

(11) On both sides of the substrate, the electroless-plating insulation B (viscosity 1.5 Pa.s) prepared in the above (10) was first applied using a roll coater, and left for 20 minutes in a horizontal state, followed by 30 at 60 ° C. After drying, the electroless plating adhesive A (viscosity 1.0 Pa.s) was then applied using a roll coater and left for 20 minutes in a horizontal state, followed by drying at 60 ° C. for 30 minutes, and having a thickness of 40 μm. An adhesive layer 12 (two-layer structure) was formed (see Fig. 6D. However, the two-layer structure of the adhesive layer was omitted).

(12) A port mask film printed with a 85 µm black circle was brought into close contact with both surfaces of the substrate on which the adhesive layer 12 was formed, and then exposed at 500 mJ / cm ² with an ultra-high pressure mercury lamp. This was spray-developed with a DMDG (diethylene glycol diethyl ether) solution to form an opening in the adhesive layer that became a via hole of 85 mu m. Again, the substrate was exposed to 3000 mJ / cm ² with an ultra-high pressure mercury lamp and heated at 100 ° C. for 1 hour and then at 150 ° C. for 5 hours, thereby providing an excellent opening (via hole) with a dimensional accuracy equivalent to that of a photomask film. An interlayer insulating material layer (adhesive layer) 12 having a thickness of 35 μm having an opening 13 for formation was formed (see FIG. 6E). Furthermore, the tin-plated layer was partially exposed in the opening to be a via hole.

(13) The substrate on which the via hole forming openings 13 were formed was immersed in chromic acid for 20 minutes, and the epoxy resin particles present on the surface of the adhesive layer were dissolved and removed to remove the surface of the adhesive layer 12 from R _max = 1 to It harmonized to the depth of about 5 micrometers, and it immersed in the neutralization solution (made by Cypress, Inc.), and then washed with water.

(14) A catalyst nucleus is imparted to the surfaces of the adhesive layer 12 and the via hole opening 13 by applying a palladium catalyst (manufactured by Atotech) to the substrate on which the surface of the adhesive layer is roughened (harmonized depth of 3.5 µm). It was.

(15) The substrate was immersed in the electroless copper plating bath having the composition as described in the above (2) to form an electroless copper plated film 14 having a thickness of 0.6 mu m over the entire rough surface (see FIG. 7A). At this time, since the electroless copper plating film 14 was thin, the unevenness | corrugation which followed the rough surface of the adhesive bond layer 12 was observed on the surface of this electroless plating film 14.

* (16) A commercial photosensitive dry film was attached to the electroless copper plated film 14, a mask was placed thereon, exposed to 100 mJ / cm ² , developed with 0.8% sodium carbonate, and plated resist 16 having a thickness of 15 μm. Install (see Figure 7b).

(17) Subsequently, electrolytic copper plating was carried out in accordance with the conditions of (6) above to form an electrolytic copper plating film 15 having a thickness of 15 µm, followed by thickening of the conductor circuit and thickening of the via hole (FIG. 7C). Reference).

(18) After the plating resist 16 is peeled off with 5% KOH, the electroless plating film 15 of the plating resist 16 is etched and removed by a solution of sulfuric acid and hydrogen peroxide, and the electroless copper plating film ( 14) and a 16-micrometer-thick conductor circuit (including via holes) made of the electrolytic copper plated film 15 were formed to form a multilayer printed wiring board with three layers on one side (see Fig. 7D). Furthermore, Pd remaining on the rough surface of the adhesive layer 12 was removed by immersion in chromic acid (800 g / l) for 1 to 10 minutes.

In the multilayer printed wiring board manufactured in this way, the land shape of the through hole of the multilayer core substrate becomes true and the land pitch can be about 600 µm, so that the through holes can be densely formed and the density of the through holes can be easily increased. Can be achieved. In addition, since the number of through holes in the substrate can be increased, the electrical connection with the conductor circuit in the multilayer core substrate can be sufficiently secured through the through holes.

(Example 3)

The through hole was filled with a copper paste, but a multilayer printed wiring board was produced in the same manner as in Example 1 except that the through hole covering conductor layer 10 covering the exposed surface of the copper paste was not provided. In this method, when an opening is provided in the resin insulating layer with a laser beam, it is easy to remove even to the surface of a copper paste, and a concave magnetic pole may generate | occur | produce.

(Example 4)

* A multilayer printed wiring board was produced in the same manner as in Example 1 except that the following composition was used as the filler.

100 parts by weight of bisphenol F type epoxy resin (E-Cast, E-807)

5 parts by weight of imidazole curing agent (made by Koshiku Kasei, 2E4MZ-CN)

Copper powder with a particle diameter of 15 µm or less (manufactured by Fukuda Metal Foil Industries, SCR-Cu-15)

735 parts by weight

Aerosol (# 200) 10 parts by weight

Antifoaming agent (Sanoff Gouge, Perenol S4) 0.5 part by weight

(Comparative Example 1)

A multilayer printed wiring board was produced in the same manner as in Example 1 except that a bisphenol F-type epoxy resin containing no metal particles was filled in the through hole as the filler.

(Comparative Example 2)

* A multilayer printed wiring board was produced in the same manner as in Example 1 except that the epoxy resin was filled in the through hole, and the epoxy resin exposed from the through hole was roughened with chromic acid and then coated with a conductor layer.

(Comparative Example 3)

A multilayer printed wiring board was produced in the same manner as in Example 1 except that the roughened surface was not provided on the conductor surface of the through-hole inner wall.

(result)

Thus, 1000 heat cycle tests were carried out on the multilayered printed circuit boards of the examples and comparative examples thus prepared at −55 ° C. × 15 minutes, room temperature × 10 minutes, and 125 ° C. × 15 minutes.

In addition, a 200-hour PCT test (Pressure Cooker Test) was performed under conditions of 100% humidity, 121 ° C temperature, and 2 atmospheres of pressure to observe the presence or absence of copper migration between through holes.

As a result, according to the multi-layer printed wiring boards 1 to 4 according to the embodiment of the present invention, since via holes can be formed directly on the through holes, high density can be easily realized, and in addition, in the heat cycle test and the PCT test, the filler and the through hole inner wall Peeling with a conductor or through-hole covering conductor was not recognized, and crack and migration were not observed.

In contrast, in the multilayer printed wiring board of Comparative Example 1, diffusion (migration) of copper was observed in accordance with the glass cross in the Teflon substrate. Moreover, in the multilayer printed wiring boards of Comparative Examples 2 and 3, peeling of the conductor layer coated in the vicinity of the through hole was observed.

(Example 5)

(1) The copper-clad laminated board in which 18 micrometers copper foil 2 laminated | stacked on the BT (bismaleimide triazine) resin substrate 1 of thickness 0.8mm was laminated as a starting material (refer FIG. 2A). ). First, the copper-clad laminate was drilled (see FIG. 2B), followed by attaching a palladium-tin colloid, followed by electroless plating under the same composition and conditions as in Example 1.

Subsequently, electrolytic copper plating was performed under the same conditions as in Example 1 to form an electrolytic copper plated film having a thickness of 15 μm (see FIG. 2C).

(2) Subsequently, a substrate having a conductor (including through hole) formed of an electroless copper plated film and an electrolytic copper plated film on the entire surface thereof was subjected to redox treatment under the same conditions as in Example 1, and the through hole 3 The roughening layer 4 was provided in the whole surface of the conductor containing () (refer FIG. 2D).

[Preparation of Resin Composition for Through Hole Filling]

3.5 weight part of cresol novolak-type epoxy resin (Eucashell, Epi cord 152), 14.1 weight part of bisphenol F-type epoxy resin (Eucashell, Epicode 807), 1.0 micrometers silica ultrafine particles (Aerosil R202) of average particle diameter 1.2 parts by weight of an imidazole curing agent (2E4MZ-CN), 100 parts by weight of copper powder having an average particle diameter of 15 µm were kneaded in three rolls, and the viscosity of the mixture was 200 to 300 Pa · s at 22 ± 1 ° C. The through-hole resin composition (filler) 5 was adjusted by adjusting with.

(3) The prepared filler 5 was filled in the through hole 3 by screen printing, dried, and cured by heating at 80 ° C., 100 ° C. and 120 ° C. for 1 hour, and further at 150 ° C. for 1 hour. I was.

Then, alumina polishing is used to remove the scratches caused by the polishing of the belt polishing machine using the belt polishing machine (manufactured by Sankyo Chemical Co., Ltd.) of # 400 on the rough surface of the conductor surface and the filler 5 protruding from the through hole 3. Buffing was performed by the particles for sintering and the particles for SiC polishing to planarize the substrate surface (see FIG. 2E).

(4) An electroless copper plated film having a thickness of 0.6 µm by applying a palladium catalyst (manufactured by Atotech) to the substrate surface flattened in (3) above and electroless copper plating under the same conditions as in (1) above (6). ) Was formed (see FIG. 2F).

(5) Subsequently, electrolytic copper plating is carried out under the same conditions as in (1) above to form an electrolytic copper plating film 7 having a thickness of 15 µm, and a thick portion of the conductive circuit 9 is formed, and through holes are provided. The part which becomes the conductor layer (circular through-hole) 10 which covers the filler 5 filled in (3) was formed.

(6) An etching resist 8 having a thickness of 15 탆 was formed on both surfaces of the substrate on which the portions consisting of the conductor circuit 9 and the conductor layer 10 were formed (see FIG. 3A).

(7) Then, the plating film of the portion where the etching resist 8 was not formed was dissolved and removed with an etching solution using a mixture of sulfuric acid and hydrogen peroxide, and the etching resist 8 was further peeled off at 55 KOH to separate the conductor circuit. Through-hole covering conductor layer 10 covering (9) and filler (5) was formed (see FIG. 3B). Further, the conductor surface including the side surface was subjected to redox treatment in the same manner as in the above (2) to perform a roughening treatment.

[Preparation of Resin Filler]

① 100 parts by weight of bisphenol F-type epoxy monomer (Yuca Shell, molecular weight 310, YL983U), with a silane coupling agent coated on the surface with an average particle diameter of 1.6 μm, and SiO ₂ spherical particles (CRS 1101-CE, manufactured by Adomtech, where The size is not more than the thickness (15 µm) or less of the inner layer copper pattern to be described later. Adjusted from 45,000 to 49,000 cps.

② 6.5 parts by weight of imidazole curing agent (2E4MZ-CN)

These were mixed to prepare the layered resin insulator 12.

(8) Applying the prepared interlayer resin insulator 12 to one side of the substrate by screen printing, filling the gap between the conductor circuit 9 or the through hole covering conductor layer 10, and drying at 70 DEG C for 20 minutes. Similarly with respect to the other side, the resin filler 12 was filled between the conductor circuit 9 or the conductor layer 10 and dried at 70 ° C. for 20 minutes. That is, by this process, this interlayer resin insulating material 12 is filled between the inner layer copper patterns.

(9) Interlayer resin insulation on the surface of the inner layer copper patterns 9 and 10 by polishing one side of the substrate after the above process (8) using a belt polishing machine using a belt polishing machine (manufactured by Sankyo Chemical Co., Ltd.) of # 400. The polishing was carried out so that the agent (12a) was not left, followed by buff polishing to remove the wound caused by the polishing of the belt polishing machine. This series of polishing was also performed on the other side of the substrate.

Subsequently, the interlayer resin insulation 12 was cured by performing heat treatment at 100 ° C for 1 hour, 120 ° C for 3 hours, 150 ° C for 1 hour, and 180 ° C for 7 hours.

In this manner, the surface layer portion of the interlayer resin insulator 12 filled between the conductor circuit 9 or the through hole covering conductor layer 10 and the roughened layer 11 on the upper surface of the conductor circuit 9 or the through hole covering conductor layer 10. ), Both sides of the substrate were smoothed to obtain a substrate in which the side surfaces of the interlayer resin insulator 12 and the conductor circuit 9 or the through hole covering conductor layer 10 were firmly in contact with each other through the roughened layer 11. That is, by this process, the surface of the interlayer resin insulating material 12 and the surface of the inner layer copper pattern are coplanar. Here, the Tg point of the filled cured resin was 155.6 degreeC and the linear thermal expansion coefficient was 44.5x10 <^-6> / degreeC.

(10) Next, a roughened layer 11 having a thickness of 2.5 μm of Cu—Ni-P alloy is formed on the surface of the through hole covering conductor layer 10 covering the conductor circuit 9 and the filler 5, and furthermore. A 0.3-micrometer-thick Sn layer was formed on the surface of this roughening layer 11 (refer FIG. 3C. It does not show about a Sn layer).

This formation method is as follows. In other words, the substrate is acid-degreased and soft-etched, and then treated with a catalyst solution composed of palladium chloride and an organic acid to give a Pd catalyst. After activating the catalyst, copper sulfate 8g / l, nickel sulfate 0.6g / l and citric acid 15g / l, sodium hypophosphite 29 g / l, boric acid 31 g / l, surfactant 0.1g / l, plating is carried out in an electroless solution consisting of pH = 9, and Cu-Ni- is applied to the surface of the copper conductor circuit. The roughening layer 11 of thickness 2.5micrometer which consists of P alloys was formed. Furthermore, Cu-Sn substitution reaction was carried out in an electroless tin substitution bath having a pH of 1.2 consisting of 0.1 mol / l tin boron fluoride 1.0 mol / l thiourea solution at 50 ° C. for 1 hour to perform Cu-Sn substitution reaction. A 0.3-micrometer-thick Sn layer is provided in the figure (not shown for the Sn layer).

(11) The electroless plating adhesives A and B were prepared as follows.

(A) Preparation of adhesive A for electroless plating for upper layers

① 35 parts by weight of 25% acrylate of cresol novolac-type epoxy resin (Japan Kayak Co., Ltd., molecular weight 2500), 3.15 parts by weight of photosensitive monomer (Doa Synthetic Agent, Aronix M315), antifoaming agent (S-65 made by Sanofko) 0.5 3.6 parts by weight of the mixture by weight and NMP were stirred and mixed.

② After mixing 12 parts by weight of polyethersulfone (PES) and an average particle diameter of 1.0 μm of epoxy resin particles (manufactured by Sanyo Chemical Co., Ltd., Polymer Pole), 7.2 parts by weight, and 3.09 parts by weight of an average particle diameter of 0.5 μm, NMP 30 weight was again added. Part was added and stirred and mixed with a bead mill.

③ 2 parts by weight of imidazole curing agent (Shigoku Kasei, 2E4MZ-CN), 2 parts by weight of photoinitiator (cantochemical, benzophenone), 0.2 parts by weight of photosensitizer (EAB), and 1.5 parts by weight of NMP Stir-mix.

These were mixed and the adhesive agent A for electroless plating for upper layers was obtained.

(B) Preparation of insulating adhesive B for electroless plating for lower layer

① 35 parts by weight of 25% acrylate of cresol novolac-type epoxy resin (Japan Kayak, molecular weight 2500), 4 parts by weight of photosensitive monomer (Doa synthetic, Aronix M315), antifoaming agent (S-65 made by Sanofko) 0.5 3.6 parts by weight of the mixture by weight and NMP were stirred and mixed.

(2) 14.49 parts by weight of polyethersulfone (PES) and an average particle diameter of 0.5 占 퐉 of epoxy resin particles (manufactured by Sanyo Chemical Co., Ltd., Polymer Pole) were mixed, and then 30 parts by weight of NMP was added thereto, followed by stirring and mixing with a bead mill.

③ 2 parts by weight of imidazole curing agent (Shigoku Kasei, 2E4MZ-CN), 2 parts by weight of photoinitiator (Kanto Chemical, benzophenone), 0.2 parts by weight of photosensitizer (EAB manufactured by Hodogani Chemical, 1.5 parts by weight of NMP) Stir-mix.

These were mixed and the adhesive composition B for electroless plating for lower layers was obtained.

(12) First, the electroless plating insulating adhesive B (viscosity 1.5 to 3.2 Pa · s) and the electroless plating adhesive A (viscosity 5 to 20 Pa · s) prepared in the above (11) were sequentially used on both sides of the substrate using a roll coater. After application | coating and leaving for 20 minutes in a horizontal state, it dried for 30 minutes at 60 degreeC, and formed the adhesive layer 12 (two-layer structure) of thickness 40micrometer (refer FIG. 3D. Furthermore, this adhesive bond layer ( 12) attached a polyethylene terephthalate film via an adhesive).

(13) A port mask film printed with a 85 μm black circle was brought into close contact with both surfaces of the substrate on which the adhesive layer 12 was formed, and exposed to 500 mJ / cm ² with an ultrahigh pressure mercury lamp. By spray-developing this with DMDG solution, the opening part which becomes a 85 micrometer (s) via hole was formed in the adhesive bond layer 12. Again, the substrate was exposed to 3000 mJ / cm ² with an ultra-high pressure mercury lamp and heated at 100 ° C. for 1 hour and then at 150 ° C. for 5 hours. An adhesive layer (interlayer resin insulating material layer) 12 having a thickness of 35 μm having a forming opening 13 was formed (see FIG. 3E). Furthermore, the opening that becomes the via hole partially exposes the roughened layer.

(14) The substrate on which the via hole forming openings 13 were formed was immersed in chromic acid for 19 minutes, and the epoxy resin particles present on the surface of the adhesive layer were dissolved and removed to roughen the surface of the adhesive layer 12. It was immersed in neutralization solution (made by Cypress, Inc.), and it washed with water.

(15) A catalyst nucleus was applied to the surface of the adhesive layer 12 and the via hole opening 13 by applying a palladium catalyst (manufactured by Atotech) to the substrate subjected to the roughening treatment (roughening depth 3.5 µm).

(16) Electroless copper plating was performed on this substrate in the same manner as in (1) above, and an electroless copper plating film having a thickness of 0.6 mu m was formed on the entire rough surface (see Fig. 4A). At this time, since the plating film was thin, irregularities were observed on the surface of the electroless plating film.

(17) A commercial photosensitive resin film (dry film) was attached to the electroless copper plated film 14, a mask was placed thereon, exposed to 100 mJ / cm ² , developed with 0.8% sodium carbonate, and plated with a thickness of 15 μm. The resist 16 is provided (see Fig. 4B).

(18) Next, electrolytic copper plating was performed in the same manner as in (1) above, and an electrolytic copper plating film 15 having a thickness of 15 µm was formed, and the conductor circuit portion and the via hole portion were thickly attached (Fig. 4c).

(19) After the plating resist 16 is peeled off with 5% KOH, the electroless plating film 14 under the plating resist 16 is etched and removed by a solution of sulfuric acid and hydrogen peroxide, and the electroless copper plating film ( 14) and a conductive circuit 9 (including via hole 17) having a thickness of 16 μm, which is composed of an electrolytic copper plating film 15 (see FIG. 4D).

(20) The substrate on which the conductor circuit 9 (including the via hole 17) is formed in (19) is made of copper sulfate 8g / l, nickel sulfate 0.6g / l, citric acid 15g / l, sodium hypophosphite 29g / 1, immersed in an electroless solution having a pH of 9 consisting of 31 g / l boric acid and 0.1 g / l surfactant, and forming a roughened layer 11 of copper-nickel-phosphor having a thickness of 3 µm on the surface of the conductor circuit. It was. At this time, the roughened layer 11 was analyzed by EPMA (fluorescence X-ray analysis), that is, a composition ratio of 98 mol% Cu, 1.5 mol% Ni, and 0.5 mol% P was shown. Then, the substrate was washed with water, immersed in an electroless tin substitution plating bath made of 0.1 mol / l tin boron fluoride 1.0 ml / l thiourea for 1 hour at 50 ° C., and the thickness of the roughened layer 11 was increased. A tin substituted plating layer having a thickness of 0.05 µm was formed (however, not shown in the tin substituted plating layer).

(21) Since the processes of (12) to (20) are repeated, the upper interlayer resin insulating layer 12 and the conductor circuit 9 (including the via hole 17) are laminated one by one, and the multilayer A wiring board was obtained (see Fig. 8A). Moreover, although the roughening layer 11 which consists of copper- nickel- phosphorus is provided in the surface of a conductor circuit here, a tin substitution plating layer is not formed in the roughening layer 11 surface.

(22) On the other hand, 46.67 parts by weight of a photosensitive oligomer (molecular weight 4000) in which 50% of an epoxy group of 60% by weight of a cresol novolak type epoxy resin (manufactured by Nihon Kayak) dissolved in DMDG was acrylated was dissolved in methyl ethyl ketone. 80% by weight of bisphenol A type epoxy resin (made by Yuccachel, Epicord 1001), 14.121 parts by weight, 1.6 parts by weight of imidazole curing agent (made by Koshiku Kasei, 2E4MZ-CN), a polyvalent acrylic monomer (Nihon Kayak, R604) 1.5 parts by weight, a mixture of Takaacrylic Monomer (manufactured by Kyoeisa Chemical Co., Ltd., DPE6A), 3.0 parts by weight, and 0.36 parts by weight of a leveling agent (manufactured by Koei Co., Polyfloor No. 75) made of an acrylic acid ester polymer are mixed with this mixture. 2.0 parts by weight of benzophenone (manufactured by Kanto Chemical) as a photoinitiator and 0.2 parts by weight of EAB (manufactured by Hodogani Chemical) as a photosensitive agent were further added, and 1.0 parts by weight of DMDG (diethylene glycol dimethyl ether) was added to obtain a viscosity of 1.4 at 25 ° C. ± 0.3 Pas Set by a solder-resist composition was obtained.

In addition, the viscosity measurement was performed with a rotor type No. 4 at 60 rpm and a rotor No. 3 at 6 rpm using a type B viscometer (Tokyo Gauge DVL-B type).

(23) The solder resist composition was applied to both surfaces of the multilayer wiring board obtained in the above (21) at a thickness of 20 탆. Subsequently, after drying at 70 ° C. for 20 minutes and at 70 ° C. for 30 minutes, the chromium side was formed on a soda-lime glass substrate having a thickness of 5 mm in which the original pattern (mask pattern) of the solder resist opening was drawn by the chromium layer. The film was brought into close contact with the solder resist layer and exposed to ultraviolet light of 1000 mJ / cm ² , followed by DMTG development. Furthermore, the soldering resist layer 18 (thickness 200 micrometers) which heat-processed on conditions of 1 hour at 80 degreeC, 1 hour at 100 degreeC, 1 hour at 120 degreeC, and 3 hours at 150 degreeC, and opened the pad part (opening diameter 200 micrometers) 20 μm) was formed.

(24) Subsequently, the substrate on which the solder resist layer 18 was formed was immersed for 20 minutes in an electroless nickel plating solution having a pH of 5 consisting of nickel chloride 30g / l, sodium hypophosphite 10g / l and sodium citrate 10g / l. A nickel plated layer 19 having a thickness of 5 mu m was formed in the opening. Furthermore, the instrument plate was immersed in an electroless plating solution consisting of 2 g / l of potassium cyanide, 75 g / l of ammonium chloride, 50 g / l of sodium citrate, and 10 g / l of sodium hypophosphite for 23 seconds at a temperature of 93 ° C. 19), a gold plated layer 20 having a thickness of 0.03 mu m was formed.

(25) Then, a solder paste was printed in the opening of the solder resist layer and reflowed at 200 ° C. to form a solder bump (solder body), thereby manufacturing a multilayer printed wiring board having solder bumps (see FIG. 8B).

Furthermore, tin-silver, tin-indium, tin-zinc, tin-bismus etc. are used as solder.

(Comparative Example 4) [Does not use silica ultrafine particles]

A multilayer printed wiring board was produced in the same manner as in Example 1 except that the following was used as the resin composition for through hole filling.

3.5 parts by weight of a creol novolac-type epoxy resin (Eucalyc, epi cord 152), 14.1 parts by weight of bisphenol F-type epoxy resin (Eucalyc, epi cord 807), 1.2 parts by weight of imidazole curing agent (2E4MZ-CN manufactured by Kokoku Kasei) 100 parts by weight of copper powder having an average particle diameter of 15 µm was kneaded into three rolls, and the viscosity of the mixture was adjusted to 200 to 300 Pa · s at 22 ± 1 ° C to prepare a resin composition for through hole filling.

Example 6 [Bisphenol-type epoxy resin only]

A multilayer printed wiring board was produced in the same manner as in Example 1 except that the following was used as the resin composition for through hole filling.

17.6 parts by weight of bisphenol F-type epoxy resin (Eucalyx, Epicode 807), 1.0 part by weight of ultrafine silica particles (aerosil R202) having an average particle diameter of 14 nm, and 1.2 parts by weight of imidazole curing agent (product made by Kokoku Kasei, 2E4MZ-CN) And a resin composition for through hole filling composed of 100 parts by weight of copper powder having an average particle diameter of 15 µm was prepared.

Example 7 [Silica Particles]

A multilayer printed wiring board was produced in the same manner as in Example 1 except that the following was used as the resin composition for through hole filling.

3.5 parts by weight of cresol novolac-type epoxy resin (Eucalyx, Epicord 152), 1.0 part by weight of ultrafine silica particles (aerosol R202) having an average particle diameter of 14 nm, 1.2 parts by weight of imidazole hardener (2E4MZ-CN) 100 parts by weight of silica particles having an average particle diameter of 10 µm were kneaded with three rolls, and the viscosity of the mixture was adjusted to 200 to 300 Pa · s at 22 ± 1 ° C. to prepare a resin composition for through hole filling.

Example 8 Epoxy Resin Particles

As a resin composition for through hole filling, a multilayer printed wiring board was produced in the same manner as in Example 1 except that the following epoxy resins were removed by dissolving the surface of the filler with chromic acid after polishing the filler surface.

3.5 weight part of cresol novolak-type epoxy resin (Eucashell, Epi cord 152), 14.1 weight part of bisphenol F-type epoxy resin (Eucashell, Epi cord 807), 1.0 weight of silica ultrafine particles (Aerosil R202) of average particle diameter 1.2 parts by weight of imidazole curing agent (manufactured by Koshiku Kasei, 2E4MZ-CN) and 100 parts by weight of epoxy resin particles (manufactured by Sanyokasei, polymer pole) having an average particle diameter of 1 µm were kneaded in three rolls, and the viscosity of the mixture was 22 It adjusted to 200-300 Pa.s at +/- 1 degreeC, and prepared the resin composition for through hole filling.

Comparative Example 5 [No Particulate Matter]

A multilayer printed wiring board was produced in the same manner as in Example 1 except that the following was used as the resin composition for through hole filling.

3.5 parts by weight of cresol novolac-type epoxy resin (Eucalyx, Epi cord 152), 14.1 parts by weight of bisphenol F type epoxy resin (Eucalyce, Epicode 807), 1.2 parts by weight of imidazole hardener (2E4MZ-CN manufactured by Kokoku Kasei) And a resin composition for through hole filling consisting of 1.0 part by weight of colloidal silica (Aerosil R202) having an average particle diameter of 14 nm was prepared.

Thus, the PCT (Pressure Cooker Test) test which is left to stand for 200 hours on conditions of 100% relative humidity, temperature 121 degreeC, and 2 atmospheres about the multilayer printed wiring board compared with the Example manufactured in this way, resulting from peeling etc. The presence of disconnection between the through hole and the via hole was confirmed. Moreover, the heat test of 48 hours was performed at 128 degreeC after PCT test.

(result)

In the wiring boards of Examples 5 to 8, disconnection due to peeling of the conductor layer covering the filler and disconnection due to its peeling were not observed, whereas in the wiring boards of Comparative Examples 4 and 5, its volley, disconnection and poor connection were confirmed.

In the comparative example 4, since ultrafine silica powder was not used, sedimentation of copper powder generate | occur | produced, peeling occurred between the filler and the conductor layer which covers this filler, and the through hole and the via hole were disconnected.

In addition, when a part of bisphenol F-type epoxy resin flows out of a through hole due to the viscosity decrease at the time of hardening, and a concave stimulus arises on the surface of a filler, and a conductor layer covering the filler is provided in this concave portion stimulus, the conductor layer. In the center of the recess is created.

In order to planarize the surface of the substrate, even if the resin was applied and polished, the resin remained in the central concave portion, so that the via hole could not be connected.

In the comparative example 5, the hardening | curing agent of a filler and the conductor layer which cover this filler did not adhere completely, peeling occurred between the through hole and this conductor layer, and the through hole and the conductor layer were also disconnected.

Further, in the heating test after the PCT test, no peeling was observed in Examples 5 and 6, but peeling was recognized in Examples 7 and 8. In Examples 5 and 6, since copper powder is fully integrated with a conductor layer, it is estimated that peeling does not arise.

As described above, the printed wiring board according to the present invention is useful for a multilayer printed wiring board used as a package substrate for mounting an IC chip or the like, in particular for a multilayer printed wiring board manufactured by a semi-additive method or a fulactive method. The resin composition can be used not only as a through hole in a printed wiring board but also as an interlayer resin insulating layer.

Claims (12)

In a multilayer printed wiring board having a structure in which a conductor circuit is formed through an interlayer resin insulating layer on the substrate formed with a through hole, and the through hole is blocked by a filler. The filler is formed of a non-conductive composition consisting of metal particles, a thermosetting resin or a thermoplastic resin, and furthermore, an exposed portion of the filler in the through hole is covered with a through hole covering conductor layer. The multilayer printed wiring board according to claim 1, wherein the resin comprises at least one bisphenol type epoxy resin and novolac type epoxy resin. The multilayer printed wiring board according to claim 1, wherein a roughened layer is formed on a surface of said through-hole coated conductor layer. The multilayer printed wiring board according to claim 1, wherein the substrate is a multilayer core substrate formed by alternately stacking a conductor layer and a prepreg. The multilayer printed wiring board according to claim 1, wherein a pitch interval of through holes formed in said substrate is 700 µm or less. The multilayer printed wiring board according to claim 1, wherein a buildup wiring layer including via holes formed in the interlayer resin insulating layer is formed on both surfaces of the substrate, and the number of layers on both surfaces thereof is the same. In a multilayer printed wiring board having a structure in which a conductor circuit is formed through an interlayer resin insulating layer on the substrate formed with a through hole, and the through hole is blocked by a filler. The filler is formed of a non-conductive composition consisting of metal particles and a thermosetting resin or thermoplastic resin, and further, an exposed portion of the filler in the through hole is covered with a through hole covering conductor layer, and the via hole coating conductor layer is formed directly on the via. The multilayer printed wiring board characterized in that the holes are connected. 8. The multilayer printed wiring board according to claim 7, wherein the resin comprises at least one bisphenol type epoxy resin and novolak type epoxy resin. 8. The multilayer printed wiring board according to claim 7, wherein a roughened layer is formed on a surface of the through hole coated conductor layer. 8. The multilayer printed wiring board according to claim 7, wherein the substrate is a multilayer core substrate formed by alternately stacking a conductor layer and a prepreg. 8. The multilayer printed wiring board according to claim 7, wherein a pitch interval of through holes formed in said substrate is 700 mu m or less. 8. The multilayer printed wiring board according to claim 7, wherein build-up wiring layers including via holes formed in the interlayer resin insulating layer are formed on both surfaces of the substrate, and the number of layers on both surfaces is the same.