KR20040018898A - Dual Panel Type Organic Electroluminescent Device and Method for Fabricating the same - Google Patents

Abstract

PURPOSE: A dual panel type organic electro-luminescence device and a fabricating method thereof are provided to enhance the productivity by forming an array element and an organic electro-luminescence diode device on different substrates, respectively. CONSTITUTION: A dual panel type organic electro-luminescence device includes a first and a second substrates(110,150), an array element layer(140), a connection electrode(132), a first electrode(152), an insulating layer(154), a barrier rib(156), an organic electro-luminescence layer(158), and a second electrode(160). A subpixel region is defined on the first and the second substrates(110,150). The array element layer(140) includes a plurality of TFTs, which are formed in subpixel units on the first substrate(110). The connection electrode(132) is connected to the TFTs of the array element layer(140). The first electrode(152) is formed on the second substrate(150). The insulating layer(154) and the barrier rib(156) are formed at a boundary between the subpixel regions. The organic electro-luminescence layer(158) and the second electrode(160) are formed in subpixel units around the barrier rib(156). The barrier rib(156) includes the first to the third regions. The second electrode corresponding to the second region of the barrier rib is in contact with the connection electrode.

Description

Dual Panel Type Organic Electroluminescent Device and Method for Fabricating the same

The present invention relates to an organic electroluminescent device, and more particularly to a dual panel type organic electroluminescent device.

One of the new flat panel displays (FPDs), the organic light emitting display device is self-luminous and thus has a better viewing angle and contrast than the liquid crystal display device. Is also advantageous. In addition, since it is possible to drive DC low voltage, fast response speed, and all solid, it is strong against external shock, wide use temperature range, and especially inexpensive in terms of manufacturing cost.

In particular, unlike the liquid crystal display device or PbP (Plasma Display Panel), the process of manufacturing the organic light emitting device can be described as deposition and encapsulation equipment, so the process is very simple.

In the related art, a passive matrix having no separate switching device has been mainly used as a driving method of the organic light emitting device.

However, in the passive matrix method, since scan lines and signal lines cross each other to form an element, the scan lines are sequentially driven over time in order to drive each pixel, thereby requiring an average luminance. In order to indicate, the instantaneous luminance is equal to the average luminance multiplied by the number of lines.

However, in the active matrix method, a thin film transistor, which is a switching element for turning on / off a pixel, is positioned for each subpixel, and the first electrode connected to the thin film transistor is The second electrode, which is turned on / off in subpixel units and faces the first electrode, becomes a common electrode.

In the active matrix method, a voltage applied to a pixel is charged in a storage capacitor (C _ST ), so that power is applied until the next frame signal is applied, thereby relating to the number of scan lines. Run continuously for one screen without

Therefore, according to the active matrix method, since the same luminance is applied even when a low current is applied, it has the advantage of low power consumption, high definition, and large size.

Hereinafter, the basic structure and operation characteristics of the active matrix organic electroluminescent device will be described in detail with reference to the accompanying drawings.

1 is a view showing a basic pixel structure of a general active matrix organic electroluminescent device.

As shown, a scanning line is formed in a first direction, a signal line and a power supply line are formed in a second direction crossing the first direction and spaced apart from each other by a predetermined distance. Define the subpixel area.

A switching TFT, which is an addressing element, is formed at the intersection of the scan line and the signal line, and is connected to the switching thin film transistor and the power supply line to form a storage capacitor C _ST . A driving thin film transistor, which is connected to the storage capacitor C _ST and a power supply line, is formed, and the driving thin film transistor is connected to the driving thin film transistor to form an organic electroluminescent diode.

When the organic light emitting diode is supplied with a current in the forward direction, the organic light emitting diode has a positive (N) junction between the anode electrode, which is a hole providing layer, and the cathode electrode, which is an electron providing layer. Electrons and holes recombine with each other as they move through the part, and thus have a smaller energy than when the electrons and holes are separated, thereby utilizing the principle of emitting light due to the energy difference generated.

The organic light emitting device is classified into a top emission type and a bottom emission type according to a transmission direction of light emitted through the organic light emitting diode.

Hereinafter, FIG. 2 is a schematic cross-sectional view of a conventional bottom emission type organic light emitting display device, and is illustrated based on one pixel area including red, green, and blue subpixels.

As illustrated, the first and second substrates 10 and 30 are disposed to face each other, and the edge portions of the first and second substrates 10 and 30 are sealed by a seal pattern 40. The thin film transistor T is formed on the transparent substrate 1 of the first substrate 10 for each subpixel, and is connected to the thin film transistor T to form the first electrode 12. Red, green, and blue colors are disposed on the transistor T and the first electrode 12 to be connected to the thin film transistor T so as to correspond to the first electrode 12. An organic light emitting layer 14 including a light emitting material is formed, and a second electrode 16 is formed on the organic light emitting layer 14.

The first and second electrodes 12 and 16 serve to apply an electric field to the organic light emitting layer 14.

The second electrode 16 and the second substrate 30 are spaced apart from each other by the seal pattern 40 described above, and although not shown in the drawing, the inner surface of the second substrate 30 may be moved outwardly. A moisture absorbent for blocking moisture of the semi-permeable tape for adhesion between the moisture absorbent and the second substrate 30 is included.

For example, when the first electrode 12 is an anode and the second electrode 16 is a cathode in a bottom emission structure, the first electrode 12 is selected from a transparent conductive material, and the second electrode 16 is formed. ) Is selected from a metal material having a low work function, and under these conditions, the organic light emitting layer 14 is formed from a layer in contact with the first electrode 12, a hole injection layer 14a, a hole transport layer 14b; A transporting layer), an emission layer 14c, and an electron transporting layer 14d are formed in this order.

In this case, the light emitting layer 14c has a structure in which light emitting materials for implementing red, green, and blue colors are sequentially disposed for each subpixel.

FIG. 3 is an enlarged cross-sectional view of one subpixel area of the FIG. 2 bottom emission type organic electroluminescent device.

As illustrated, the semiconductor layer 62, the gate electrode 68, the source and drain electrodes 80 and 82 are sequentially formed on the transparent substrate 1 to form a thin film transistor region, and the source and drain electrodes 80, The power electrode 72 and the organic light emitting diode E formed in the power supply line (not shown) are respectively connected to 82.

In addition, a capacitor electrode 64 made of the same material as the semiconductor layer 62 is disposed under an insulator interposed between the power electrode 72 and the corresponding region forms a storage capacitor region.

Elements formed in the thin film transistor region and the storage capacitor region other than the organic light emitting diode E form the array element A.

The organic light emitting diode E includes a first electrode 12 and a second electrode 16 facing each other with the organic light emitting layer 14 interposed therebetween. The organic light emitting diode E is positioned in a light emitting area for emitting self-emitting light to the outside.

As described above, the conventional organic light emitting display device has a structure in which the array device A and the organic light emitting diode E are stacked on the same substrate.

4 is a flowchart illustrating a manufacturing process of a conventional organic light emitting display device.

st1 is a step of forming an array element on a first substrate, wherein the first substrate refers to a transparent substrate, a scan line on the first substrate, a signal line and a power supply line crossing the scan line and spaced apart from each other; And forming an array element including a switching thin film transistor formed at a point where the scan line and the signal line intersect, and a driving thin film transistor formed at the point where the scan line and the power supply line intersect.

st2 is a step of forming a first electrode which is a first component of the organic light emitting diode, and the first electrode is connected to the driving thin film transistor and patterned for each subpixel.

st3 is a step of forming an organic light emitting layer which is a second component of the organic light emitting diode on the first electrode, and when the first electrode is composed of an anode, the organic light emitting layer is a hole injection layer, a hole transport layer The light emitting layer, the electron transport layer may be laminated in order.

In st4, the second electrode, which is a third component of the organic light emitting diode, is formed on the organic light emitting layer, and the second electrode is formed on the entire surface of the substrate as a common electrode.

At st5, the first substrate is encapsulated using a second substrate, which is another substrate. In this step, the first substrate is protected from an external impact and the organic light emitting layer is exposed to the inflow of external air. Encapsulating the outer surface of the first substrate to the second substrate to prevent damage, the inner surface of the second substrate may include a moisture absorbent.

As described above, the conventional bottom emission type organic light emitting diode device is manufactured by bonding an array device and a substrate on which an organic light emitting diode is formed and a separate substrate for encapsulation. In this case, since the product of the yield of the array device and the yield of the organic light emitting diode determines the yield of the organic light emitting diode, the overall organic process of the organic light emitting diode structure yields the overall process yield by the organic electroluminescent diode process. There was a problem that is greatly limited. For example, even if the array element is satisfactorily formed, if a defect occurs due to foreign matter or other elements in forming the organic electroluminescent layer using a thin film of about 1000 mW, the organic electroluminescent element is determined to be a poor grade.

This results in a loss of overall costs and material costs that were required to manufacture the array device of good quality, there was a problem that the production yield is lowered.

In addition, the bottom emission method has a high degree of freedom and stability due to the encapsulation process, and has a problem in that it is difficult to be applied to a high resolution product due to the limitation of the aperture ratio. The top emission method is easy to design a thin film transistor and improves the aperture ratio It is advantageous in terms of product life, but in the conventional top emission type structure, since the material selection range is narrow as the cathode is normally positioned on the organic light emitting layer, the transmittance is limited and the light efficiency is reduced, and the light transmittance is minimized. In order to configure a thin film type protective film, there was a problem in that it does not sufficiently block outside air.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and it is a first object of the present invention to provide an active matrix type organic electroluminescent device having a high-resolution / high-opening structure with improved production yield.

To this end, in the present invention, an array element and an organic light emitting diode element are formed on different substrates, and a dual panel type organic electroluminescent element for connecting the array element and the organic light emitting diode element through an electrical connection electrode. To provide a device.

A second object of the present invention is an electrode separator pattern for automatically separating any one of the first and second electrodes for an organic light emitting diode device without a separate patterning process in units of subpixels that are the smallest units for implementing a screen. In the active matrix type organic light emitting display device using the above, it is intended to facilitate the connection between the aforementioned connection electrode and the second electrode by changing the pattern structure of the partition wall.

1 is a view showing a basic pixel structure of a general active matrix organic electroluminescent device.

Figure 2 is a schematic cross-sectional view of a conventional bottom emission organic electroluminescent device.

3 is an enlarged cross-sectional view of one subpixel area of the organic light emitting diode of FIG. 2;

Figure 4 is a process flow diagram for the manufacturing process of the conventional organic electroluminescent device.

5 is a cross-sectional view of a dual panel type organic light emitting display device according to a first exemplary embodiment of the present invention.

FIG. 6 is a diagram illustrating a barrier rib structure of one pixel area including red, green, and blue subpixels in a dual panel type organic light emitting display device according to a second exemplary embodiment of the present invention.

7A to 7C are cross-sectional views taken along cut lines A-A, B-B and C-C of FIG. 6, respectively.

8 is a process flow diagram illustrating a step of a manufacturing process of an organic light emitting diode device for a dual panel type organic light emitting device according to a third embodiment of the present invention.

9 is a cross-sectional view of an array substrate for an organic light emitting diode device for a dual panel type organic light emitting device according to a fourth embodiment of the present invention.

10 is a cross-sectional view of an array substrate for an organic light emitting diode device for a dual panel type organic light emitting device according to a fifth embodiment of the present invention.

11 is a process flowchart showing step by step a manufacturing process of a dual panel organic electroluminescent device according to a sixth embodiment of the present invention.

<Explanation of symbols for main parts of the drawings>

110: first substrate 112: buffer layer

114: semiconductor layer 116: gate insulating film

118: gate electrode 120: first contact hole

122: second contact hole 124: first protective layer

126 source electrode 128 drain electrode

130: third contact hole 132: connecting electrode

150: second substrate 152: first electrode

154 insulating film 156 partition wall

158: organic light emitting layer 160: second electrode

170: Seal pattern I: active area

II: source region III: drain region

E: organic light emitting diode device T: thin film transistor

In order to achieve the above object, the first and second substrates defined subpixel area; An array element layer including a plurality of thin film transistors formed in subpixel units on an inner surface of the first substrate; A connection electrode connected to the thin film transistor on the array element layer; A first electrode formed on an inner surface of the second substrate; An insulating layer and a partition wall sequentially formed at the boundary between the subpixel regions under the first electrode; An organic electroluminescent layer and a second electrode formed in subpixel units with the barrier rib as a boundary, and the light emitted from the organic electroluminescent layer is emitted toward the first electrode, and the partition wall is the organic electroluminescent layer and the second electrode. A first region having a pattern structure for automatically separating the pixel units in subpixel units, a second region having a pattern structure for connecting the second electrode and the connecting electrode in the partition forming unit, and adjacent to the first and second regions Dual panel having a third region having a pattern structure for preventing a short between the second electrode, the second electrode formed at a position corresponding to the second region of the partition wall is in contact with the connection electrode It provides a type organic electroluminescent device.

The partition wall has a pattern having an inverse taper structure in the first region, an asymmetric structure having one side inclined in the second region, and another side having an inverse taper, and a plurality of spaced apart from each other in the third region. Characterized in that it comprises a pattern having a recess, wherein the partition pattern corresponding to the second and third regions is characterized by the diffraction exposure method.

The first and second electrodes and the organic light emitting layer constitute an organic light emitting diode device, and the thin film transistor includes a gate electrode, a semiconductor layer, a source electrode, and a drain electrode and supplies a current to the organic light emitting diode device. Corresponding to a transistor, the connection electrode is connected to the drain electrode, and the first substrate further comprises a lead portion having a height higher than the height of the formation of the thin film transistor, wherein the lead electrode and the second lead portion in the lead portion The electrodes are in contact with each other, and the first to third electrodes are formed of the same material in the same process as the gate electrode, the semiconductor layer, the source electrode, and the drain electrode, respectively, and formed of an island pattern. The pattern is made of an overlap, and is connected to the source electrode to further form a power supply line And, made of the same material in the power supply line and the same process, it characterized in that it further comprises a fourth pattern which is located to be overlapped with the first to third patterns.

In the region covering the thin film transistor, a protective layer having a drain contact hole for partially exposing the drain electrode is formed, and a column-shaped lead-out pattern formed in the lead-out part is formed on the protective layer. A connection electrode connected to the drain electrode through the drain contact hole is formed in an area covering the pattern and the protective layer, the material forming the lead portion pattern is selected from an insulating material, and the insulating material is an organic insulating material. do.

According to a second aspect of the present invention, an organic light emitting diode device including an array element including a thin film transistor, a first electrode, a second electrode, and an organic light emitting layer positioned in a section between the first and second electrodes on different substrates. In the dual panel type organic electroluminescent device is formed, respectively, wherein the array element and the organic light emitting diode device is connected via a connecting electrode, in the method of manufacturing a substrate including the organic light emitting diode device, the subpixel region is Forming a first electrode on a defined substrate; Forming an insulating layer and a partition at a position covering a boundary between the subpixel regions on the first electrode; Forming an organic light emitting layer and a second electrode for each subpixel region using the insulating layer and the barrier rib as a boundary, wherein the barrier rib has a first region having a pattern having an inverse taper structure at both sides thereof, and one side having an inverted taper structure. The second region has a tapered structure, and another side is formed of a pattern having an inclined structure, and the third region is formed in a pattern having a plurality of recesses spaced apart from each other by being positioned in a section between the first and second regions. And the connection electrode is in contact with the second electrode formed in the second region of the partition wall.

In the forming of the partition wall, patterning is performed by a diffraction exposure method for selectively adjusting the intensity of light, and the inclined partition wall pattern formed in the second region is opened by a mask used in the diffraction exposure process. The partition pattern is formed by adjusting the width of the part and the gap between the open parts, and the partition pattern formed in the third region is formed by a diffraction exposure process using a mask having a slit pattern at a position corresponding to the recess, and forms the thin film transistor. The method may include forming a gate electrode, a semiconductor layer, a source electrode and a drain electrode, and a power supply line, and have a height higher than that of the thin film transistor forming unit, and contacting portions of the connection electrode and the second electrode. The method may further include configuring a lead-out unit, and the forming of the lead-out unit may include before the gate. Forming the first to fourth patterns, which are made of the same material in the same process as the pole, the semiconductor layer, the source electrode and the drain electrode, and the power supply line, form an island pattern and overlap each other. It is done.

The forming of the lead-out part may include forming a protective layer having a drain contact hole that partially exposes the drain electrode in a region covering the thin film transistor, and then forming a column-shaped lead-out part pattern in the lead-out area. And forming the organic light emitting layer and the second electrode for each subpixel region, and then bonding the first and second substrates to each other. In addition, the step of bonding the first, second substrate, characterized in that it comprises the step of electrically connecting the first, second substrate in the derivation unit.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the drawings.

The dual panel type organic light emitting display device according to the present invention is driven by an active matrix type, and the screen is implemented by a top emission method of emitting light emitted through the organic light emitting layer toward the first electrode, which is the upper electrode.

First Embodiment

FIG. 5 is a cross-sectional view of a dual panel type organic light emitting display device according to a first embodiment of the present invention. For convenience of description, an array device is shown based on a driving thin film transistor, and other storage capacitance and switching thin film transistors are shown in FIG. The pixel structure of 1 can be applied.

As illustrated, the first and second substrates 110 and 150 are disposed to face each other at predetermined intervals in sub-pixel units, which are the smallest units for implementing the screen, and the first substrates 110 and 150. ) Is formed on the inner surface of the array element layer 140 including a thin film transistor (T) formed in subpixel units, the connection electrode 132 connected to the thin film transistor (T) is formed on the array element layer 140 Formed.

In addition, a first electrode 152 is formed on an inner surface of the second substrate 150, and an insulating film 154 and a partition wall 156 are sequentially formed at a boundary of each subpixel region on a lower surface of the first electrode 152. The organic light emitting layer 158 and the second electrode 160 are sequentially formed in the subpixel unit in the inner region of the partition 156 without a separate patterning process by the partition 156.

The first and second electrodes 152 and 160 and the organic light emitting layer 158 form an organic light emitting diode device (E).

Although not shown in the drawings, the partition wall 156 has a frame structure that surrounds the subpixel area boundary in a planar manner, and in particular, the first area separating the second electrode 160 in subpixel units and the aforementioned connection. A second region for forming a connection between the electrode 132 and the second electrode 160 in the partition 156 forming portion, and between the second region and the first region; It is characterized by having a third area for preventing the short (short) in the liver.

That is, the partition 156 pattern on the drawing corresponds to the second region described above, and the connection electrode 132 is in contact with the bottom surface of the second electrode 160 formed in the region covering the partition 156. It is done.

In addition, edge portions of the first and second substrates 110 and 150 are encapsulated in the seal pattern 170, wherein an inner region of the first and second substrates 110 and 150 is not exposed to moisture and the atmosphere. B. They are packed together in a liquid filled state.

The stack structure of the array device layer 140 will be described in more detail. The buffer layer 112 is formed on the entire surface of the first substrate 110, and the active region I is formed on the buffer layer 112 in subpixel units. And a semiconductor layer 114 in which the source region II and the drain region III, which are positioned at both sides of the active region I, are defined, and a gate insulating film is formed on the active region I of the semiconductor layer 114. 116 and the gate electrode 118 are formed in this order, and the part which exposes the source region II and the drain region III of the semiconductor layer 114 mentioned above on the whole surface of the board | substrate which covers the gate electrode 118 is made. The first passivation layer 124 having the first and second contact holes 120 and 122 is formed, and the semiconductor layer 114 is formed on the first passivation layer 124 through the first and second contact holes 120 and 122. Source electrode 126 and drain electrode 128 are formed in connection with source region II and drain region III of each of And a second protective layer 131 having a third contact hole 130 partially exposing the drain electrode 128, on the entire surface of the substrate covering the drain electrode 128, and above the second protective layer 131. The connection electrode 132 is connected to the drain electrode 128 through the third contact hole 130. In addition, the connection electrode 132 is in contact with the lower surface of the second electrode 160 formed in the region covering the partition wall 156, so that the current provided from the drain electrode 128 is applied to the second electrode 160. It is characterized in that it serves to deliver.

The semiconductor layer 114, the gate electrode 118, the source electrode 126, and the drain electrode 128 form a driving thin film transistor T.

Although not shown in detail in the drawings, a pixel driving storage capacitance is formed by being connected to the driving thin film transistor T, and the gate electrode 116 of the driving thin film transistor T is connected to a drain electrode of a switching thin film transistor (not shown). Connected.

Second Embodiment

FIG. 6 is a diagram illustrating a barrier rib structure of one pixel area including red, green, and blue subpixels in the dual panel type organic light emitting display device according to the second embodiment of the present invention.

As shown in the drawing, a partition wall 210 is formed at a position covering a boundary between red, green, and blue subpixels, and a second electrode which is automatically separated in subpixel units by the partition wall 210 in an area within the partition 210. 212 are formed in subpixel units, respectively.

In more detail, the partition wall 210 may include a first region IV having a pattern for separating the second electrode 212 in subpixel units, and a connection electrode not illustrated with the second electrode 212. In contacting, the second electrode (V) having a pattern for contacting the connecting electrode with the second electrode (212) in the partition (210) is formed in the section between the first and second regions (IV, V) And a third region VI in which a pattern for preventing a short circuit between adjacent second electrodes 212 is formed.

The patterns formed in the first to third regions IV, V, and VI of the barrier rib 210 may be integrally formed with each other, and the pattern structure may be changed according to the above-described role for each region.

Hereinafter, the pattern structure of the partition wall will be described in detail through a manufacturing process for the organic light emitting diode device for a dual panel type organic light emitting diode device according to the present invention.

7A to 7C are cross-sectional views of cross-sections cut along cutting lines AA, BB and CC of FIG. 6, respectively. Regions cut along cutting lines AA, BB and CC are sequentially shown in FIGS. It corresponds to three areas.

As illustrated, the first electrode 252 is formed in an area covering the upper surface of the substrate 250 in which the subpixel area is defined, and the insulating film 254 and the partition wall are formed at the subpixel boundary on the first electrode 252. In the structure in which the 256 is formed, and the organic electroluminescent layer 258 and the second electrode 260 are formed by being separated automatically by subpixels by the partition wall 256, FIG. The pattern structure formed in one region IV is shown, and the partition 256 pattern formed in this region has a trapezoidal shape of an ordinary light narrowing structure having an inverse taper.

The organic light emitting layer 258 and the second electrode 260 are sequentially formed in both subpixel regions of the partition wall 256.

The organic electroluminescent layer 258 and the second electrode 260 sequentially form the organic electroluminescent material 257 and the second electrode material 259 on the substrate on which the partition 256 is formed, and then the partition 256. The organic light emitting layer and the second electrode 260 are formed by a method of automatically separating the subpixel units by an inverse taper structure formed by the cross-section. Thus, an organic light emitting material 257 and The second electrode material 259 remains as it is.

In addition, although the organic electroluminescent material 258 and the second electrode material 260 remain on the upper surface of the barrier rib 256 in order, the organic electroluminescent layer 258 and the second electrode due to the height of the barrier 256 may remain. Short circuit with the electrode 260 is prevented.

In FIG. 7B, the partition wall 256 is disposed in a direction orthogonal to the substrate 250 for the purpose of contacting the aforementioned second electrode 260 and the connecting electrode (not shown) at the partition 256 forming part corresponding to the non-light emitting area. Both sides of the) is characterized by having an asymmetrical structure.

In more detail, one side of the partition wall 256 has an inverse taper structure as shown in FIG. 7A, and the other side has a sloped structure to form a second electrode formed in a subpixel area with an inclined side surface. 260 is integrally located in the above-described region, and the second electrode 260 forming part positioned on the partition wall 256 is in contact with a connection electrode (not shown).

According to the partition structure of the present invention, the second electrode and the connection electrode can be easily contacted without a separate spacer type connection pattern, and the second electrode and the connection electrode are brought into contact with each other in the non-light emitting area. It can reduce the possible defects.

FIG. 7C is a cross-sectional view illustrating a partial region of the third region VI and a portion of the second region V adjacent to the third region VI, as shown in FIG. 7C. The organic light emitting material 257 and the second electrode material have a plurality of concave portions 262 spaced apart from each other, and the upper surface of the partition wall 256 pattern and the concave portion 262 in the third region VI. 259 are stacked one by one. In addition, the organic electroluminescent material and the second electrode material sequentially stacked on the partition 256 located in the second region V may have the organic electroluminescent layer 258 and the second electrode as described above with reference to FIG. 7B. 260, respectively.

The thickness of the concave portion 262 of the partition wall 256 is formed to have a predetermined thickness in a range not exposing the insulating layer 254 forming the lower layer, and the concave portion 262 pattern may be patterned to different thicknesses. Patterning may be performed by a photolithography process including diffraction exposure.

Third Embodiment

8 is a process flowchart illustrating a step of a manufacturing process of an organic light emitting diode device for a dual panel type organic light emitting device according to a third embodiment of the present invention.

In ST1, the first electrode is formed on a substrate on which a subpixel region is defined.

The material constituting the first electrode is selected from a transparent conductive material, for example, indium tin oxide (ITO).

In ST2, the insulating film and the partition wall are formed at positions crossing the boundary between the subpixel regions on the first electrode.

The insulating film is a pattern for improving contact characteristics between the first electrode and the partition wall, and the material constituting the insulating film is preferably selected from a silicon insulating material, and more preferably, among silicon nitride film (SiNx) and silicon oxide film (SiOx). It is made of either substance.

The partition wall may include a first region formed in a pattern having an inverse taper structure in order to automatically separate the organic light emitting layer and the second electrode in subpixel units without a separate patterning process, and the partition electrode forming unit may connect the second electrode and the connecting electrode to each other. A pattern having a second region formed in a pattern having an asymmetrical structure for contact with a plurality of recesses and spaced apart from each other by a predetermined distance for the purpose of preventing a short circuit between neighboring second electrodes in a section between the first and second regions It is characterized by consisting of a third region formed as.

For example, the barrier rib may be patterned by a photolithography process including an exposure and development process using a photoresist.

Since the barrier ribs have a predetermined thickness, and selectively form concave portions on a part of the upper surface, it is preferable to use a diffraction exposure method that selectively exposes only a desired portion by diffraction of light in the exposure process during the photolithography process. Do.

In more detail, when the partition is made of a positive type photoresist in which the exposed portion is removed, a mask having a slit pattern that can weaken the intensity of light at a position corresponding to the recess is disposed and then exposed. By proceeding, it is possible to form a partition pattern on the third region having the aforementioned thickness difference.

The asymmetric structural pattern corresponding to the second region of the partition wall has a reverse taper structure, one side of which is separated from a neighboring second electrode, and the other side is formed of an inclined side surface. It is formed integrally extending from the region to the upper surface of the partition, characterized in that the second electrode formed on the upper surface of the partition contact with the connecting electrode.

The inclined side surface structure of the partition wall can be adjusted by adjusting the width of the open portion formed in the pattern of the mask used in the above-described exposure step and the gap between the open portions.

For example, when the partition wall is formed using a positive type photoresist, the inclined partition wall pattern may be formed by narrowing the width of the open part of the mask and the gap between the open parts from the center of the partition wall to the side surface.

In ST3, the organic electroluminescent material and the second electrode material are sequentially formed on the substrate on which the barrier rib is formed, so that the organic electroluminescent material and the second electrode material are separated by the barrier rib, and the asymmetric pattern structure of the barrier rib is formed. The organic electroluminescent material and the second electrode material formed on the second region having a portion are integrally formed without being separated from the subpixel region, and are in contact with the connecting electrode formed on the counter substrate in the region.

That is, the organic electroluminescent material and the second electrode material positioned on the upper surfaces of the barrier ribs of the first and third regions do not function as the organic electroluminescent layer and the second electrode, but the organic electroluminescent material located on the upper surfaces of the barrier ribs of the second region The electroluminescent material and the second electrode material are used as the organic electroluminescent layer and the second electrode located in the subpixel region.

When the first electrode is an anode and the second electrode corresponds to a cathode, the organic light emitting layer may have a structure in which a hole injection layer, a hole transport layer, a light emitting layer, an electron transport layer, and an electron injection layer are sequentially stacked.

Fourth Embodiment

FIG. 9 is a cross-sectional view of an array substrate for an organic light emitting diode device for a dual panel type organic light emitting diode device according to a fourth embodiment of the present invention, and is illustrated with a center connected to a partition of an organic light emitting diode substrate.

As illustrated, the gate electrode 312 and the first pattern 314 made of the first metal material are formed to be spaced apart from each other, and the gate electrode 312 and the first pattern 314 are formed on the substrate 310. The gate insulating layer 316 is formed in the region to be covered, and the semiconductor layer 318 is formed on the region covering the gate electrode 312, and is formed of first and second semiconductor materials on the gate insulating layer 316. The second pattern 320 is formed in an area covering the first pattern 314.

In more detail, the semiconductor layer 318 has a structure in which the active layer 318a and the ohmic contact layer 318b are sequentially stacked, and the second pattern 320 includes the second a pattern 320a and It consists of a 2b pattern 320b.

For example, the first semiconductor material forming the active layer 318a and the second a pattern 320a may be selected from an amorphous silicon material, and the second semiconductor material forming the ohmic contact layer 318b and the second b pattern 320b may be Impurity is selected from amorphous silicon materials.

The source electrode 322 and the drain electrode 324 are formed on the semiconductor layer 318 so as to be spaced apart from each other, and are made of the same material in the same process as the source electrode 322 and the drain electrode 324. The third pattern 326 is formed at a position corresponding to the second pattern 320.

The interlayer insulating layer 330 having the source electrode 322 and the drain electrode 324 and a first contact hole 328 partially disposed to cover the third pattern 326 and partially exposing the source electrode 322. Is formed, and a power supply line 332 is formed on the interlayer insulating layer 330 to be connected to the source electrode 322 through the first contact hole 328, and in the same process as the power supply line 332. A fourth pattern 336 is formed in the region of the same material and covers the second pattern 334 on the interlayer insulating layer 330, and covers the power supply line 332 and the fourth pattern 336. A protective layer 340 having a drain contact hole 338 exposing a part of the drain electrode 324 is formed together with the interlayer insulating layer 330, and a drain contact hole 338 is formed on the protective layer 340. A connection electrode 342 connected to the drain electrode 324 is formed therethrough.

The gate electrode 312, the semiconductor layer 318, the source electrode 322, and the drain electrode 324 form a thin film transistor T, and although not shown in detail in the drawing, the power supply line 332 is described above. It corresponds to a line providing a power supply signal to the thin film transistor (T).

The connection electrode 342 is formed to include a region covering the fourth pattern 336.

The region where the first to fourth patterns 314, 320, 326, and 336 overlap the connection electrode 342 forms a lead-out portion VII.

The first height H1 in the lead-out portion VII is higher than the second height H2 in the thin film transistor T.

In the present invention, it is characterized in that the structure is connected to the second electrode and the connecting electrode located in a portion of the partition wall by changing the pattern of the partition wall formed at the position surrounding the sub-pixel boundary, the partition wall (Fig. Since the thickness of 156 of 5 is constant, since the height of the contact portion with the connection electrode of the array substrate is lower than that of the thin film transistor T composed of a plurality of laminated films, defects due to electrical connection with adjacent pixels are eliminated. In order to improve this disadvantage, in this embodiment, the lead-out portion VII having a height higher than the total thickness of the laminated films constituting the thin film transistor T is characterized in that it is configured.

In particular, the first to fourth patterns 314, 320, 326, and 336 are each formed in an island pattern having no electrical connection structure, and the gate electrode 312, the semiconductor layer 318, It is characterized in that formed in the manufacturing step of the source electrode 322, drain electrode 324, power supply line 332.

The thin film transistor T corresponds to a driving thin film transistor connected to the organic light emitting diode device (E of FIG. 5), and in addition to an inverse staggered thin film transistor, the structure of the thin film transistor structure is different. You can also apply.

Fifth Embodiment

In the present embodiment, as in the fourth embodiment, when the lead portion is formed to form a height at the electrical contact portion in contact with the organic light emitting diode element of the opposing substrate higher than the height of the thin film transistor, a separate lead portion pattern is used. The height of the lead-out portion is higher than the height of the thin film transistor.

FIG. 10 is a cross-sectional view of an array substrate for an organic light emitting diode device for a dual panel type organic light emitting diode device according to a fifth embodiment of the present invention, and is illustrated with a center connected to a partition wall of the organic light emitting diode substrate. The description of the overlapping part with FIG. 9 will be briefly described.

As illustrated, a thin film transistor T including a gate electrode 412, a semiconductor layer 418, a source electrode 422, and a drain electrode 424 is formed on the substrate 410, and the thin film transistor T is formed. ), An interlayer insulating layer 430 having a first contact hole 428 partially exposing the source electrode 422 is formed, and a source is formed on the interlayer insulating layer 430 through the first contact hole 428. A power supply line 432 connected to the electrode 422 is formed, and in a region covering the power supply line 432, a drain contact hole exposing the drain electrode 424 together with the interlayer insulating layer 430. A protective layer 440 having a 438 is formed, and a pillar-shaped lead-out pattern 442 is formed on the protective layer 440 so as to be spaced apart from the thin film transistor T, and the lead-out pattern 442 and The area covering the protective layer 440 is connected to the drain electrode 424 through the drain contact hole 438. Connection electrodes 444 are formed.

The region overlapping the lead-out pattern 442 forms the lead-out unit VIII, and the first height H11 in the lead-out unit VIII is higher than the second height H22 in the thin film transistor T unit. It is characterized by.

The material constituting the lead-out pattern 442 is selected from an insulating material, preferably from an organic material that is easy to form thickly through a coating.

Sixth Embodiment

FIG. 11 is a flowchart illustrating a manufacturing process of a dual panel type organic light emitting display device according to a sixth embodiment of the present invention. Take the structure of an example.

The STI is insulated at a position between the first and second substrates having defined subpixel regions, forming a first electrode on the second substrate, and a boundary between the subpixel regions on the first electrode. Forming a layer and a partition wall, and forming an organic light emitting layer and a second electrode for each subpixel area using the insulating layer and the partition wall as boundaries, and the partition wall is formed in a pattern having a reverse tapered structure at both sides. A first region having one side, a second region having a reverse taper structure, and a second region having a pattern having an inclined structure, and a plurality of spaced apart from each other by being positioned in a section between the first and second regions It is characterized by consisting of a 3rd area | region which consists of a pattern which has a recessed part.

In the forming of the barrier rib, the barrier rib is patterned by a diffraction exposure method for selectively adjusting the intensity of light.

In ST2, forming a thin film transistor on the second substrate and forming a lead portion having a height higher than that of the thin film transistor.

The forming of the thin film transistor may include forming a gate electrode, a semiconductor layer, a source electrode and a drain electrode, and a power supply line, and have a height higher than that of the thin film transistor forming portion, and the second portion of the partition wall. And configuring the lead-out at the connection of the region and the connection electrode.

The forming of the lead-out unit may include first, fourth, fourth, fourth, fourth, fourth, fourth, fourth, fourth, fourthth, fourthth, fourthth, fourthth, fourthth, fourthth, thththththththththththththth, ththththththththththth.ththththththththththththththththththweekthththththththththththththththththththththothteenthmic Levels-Secondary Figures Forming a pattern in order, or forming a protective layer having a drain contact hole exposing the drain electrode partially in a region covering the thin film transistor, and then forming a column-shaped lead-out pattern in the lead-out region. Forming a step.

According to the latter method, the material constituting the lead-out pattern is preferably selected from organic insulating materials.

In ST3, the first and second substrates are bonded to each other. In this step, the second electrode formed in the second region of the partition wall in the second substrate and the connection electrode in the lead-out region of the first substrate are contacted. And connecting the array element and the organic light emitting diode element.

However, the present invention is not limited to the above embodiments, and various modifications can be made without departing from the spirit of the present invention.

As described above, according to the dual panel type organic light emitting display device having the partition structure according to the present invention, the following effects are obtained.

First, since the array device and the organic light emitting diode device are formed on different substrates, production yield and production management efficiency can be improved, and product life can be increased.

Second, because of the top emission method, it is easy to design a thin film transistor and high aperture ratio / high resolution can be realized.

Third, since the connecting electrode and the second electrode are connected using the partition wall, a separate spacer type connection pattern process may be omitted.

Fourth, since the second electrode and the connection electrode are connected in the barrier rib forming portion, which is the non-light emitting region, the probability of damage to the light emitting region can be reduced.

Fifth, in an array substrate, an island pattern shape is formed in a process of manufacturing a gate electrode, a semiconductor layer, a source electrode and a drain electrode, and a power supply line, and a pattern overlapping each other is formed to derive an area where the patterns and the connection electrode overlap. By using a negative portion, a method of forming a lead portion having a height higher than that of the thin film transistor forming portion without an additional process, it is possible to prevent the failure due to electrical connection with adjacent pixels to increase the production yield.

Sixth, in forming the lead-out unit, before the connection electrode is formed, a lead-out pattern having a columnar shape is formed in a section spaced apart from the thin film transistor, and the lead-out unit having a higher height than the thin film transistor forming unit through the lead-out unit pattern. Forming method can prevent the defect caused by the electrical connection with the adjacent pixels to increase the production yield.

Claims (19)

First and second substrates on which subpixel regions are defined; An array element layer including a plurality of thin film transistors formed in subpixel units on an inner surface of the first substrate; A connection electrode connected to the thin film transistor on the array element layer; A first electrode formed on an inner surface of the second substrate; An insulating layer and a partition wall sequentially formed at the boundary between the subpixel regions under the first electrode; An organic light emitting layer and a second electrode formed in subpixel units with the barrier rib as a boundary portion The light emitted from the organic electroluminescent layer is emitted toward the first electrode, and the partition wall has a first region having a pattern structure for automatically separating the organic electroluminescent layer and the second electrode in subpixel units, A second region having a pattern structure for connecting a second electrode and a connecting electrode to the barrier rib forming portion, and a third region having a pattern structure for preventing a short between adjacent second electrodes between the first and second regions And a second electrode formed at a position corresponding to the second region of the partition wall to be in contact with the connection electrode. The method of claim 1, The partition wall has a pattern having an inverse taper structure in the first region, an asymmetric structure having one side inclined in the second region, and another side having an inverse taper, and a plurality of spaced apart from each other in the third region. Dual panel type organic light emitting device, characterized in that consisting of a pattern having a recess. The method of claim 2, The barrier rib pattern corresponding to the second and third regions is formed by a diffraction exposure method. The method of claim 1, The first and second electrodes and the organic light emitting layer constitute an organic light emitting diode device, and the thin film transistor includes a gate electrode, a semiconductor layer, a source electrode, and a drain electrode and supplies a current to the organic light emitting diode device. A dual panel type organic electroluminescent device corresponding to a transistor, wherein the connection electrode is connected to the drain electrode. The method of claim 4, wherein The first substrate further includes a lead-out portion having a height higher than the formation height of the thin film transistor, wherein the connection electrode and the second electrode in the lead-in portion is characterized in that the organic light emitting device. The method of claim 5, wherein In the derivation unit, the gate panel, the semiconductor layer, the source electrode, and the drain electrode are made of the same material in the same process, respectively, and a dual panel type organic layer formed by overlapping first to third patterns formed of an island pattern. Electroluminescent device. The method of claim 6, A power supply line is further formed in connection with the source electrode, and a dual pattern further includes a fourth pattern formed of the same material in the same process as the power supply line and positioned to overlap the first to third patterns. Panel type organic light emitting device. The method of claim 5, wherein In the region covering the thin film transistor, a protective layer having a drain contact hole for partially exposing the drain electrode is formed, and a column-shaped lead-out pattern formed in the lead-out part is formed on the protective layer. A dual panel type organic light emitting display device having a connection electrode connected to a drain electrode through the drain contact hole in an area covering the pattern and the protective layer. The method of claim 8, The material constituting the lead-out pattern is a dual panel type organic light emitting device is selected from the insulating material. The method of claim 9, The insulating material is an organic insulating material, a dual panel type organic light emitting device. On the different substrates, an array element including a thin film transistor and an organic light emitting diode element including first and second electrodes and an organic light emitting layer positioned in a section between the first and second electrodes are formed, respectively, and the array element The organic electroluminescent diode device is a dual panel type organic electroluminescent device connected via a connecting electrode, the method of manufacturing a substrate comprising the organic electroluminescent diode device, Forming a first electrode on the substrate on which the subpixel region is defined; Forming an insulating layer and a partition at a position covering a boundary between the subpixel regions on the first electrode; Forming an organic light emitting layer and a second electrode for each subpixel area by using the insulating layer and the partition wall as boundaries; The partition wall includes a first region having a pattern having a reverse taper structure at both sides, a second region having a reverse taper structure at one side, and a pattern having an inclined structure at the other side, and the first region. And a third region formed in a pattern having a plurality of recesses spaced apart from each other by a predetermined distance between the two regions, wherein the connection electrode is in contact with a second electrode formed in the second region of the partition wall. A method of manufacturing a substrate for a dual panel type organic electroluminescent device. The method of claim 11, In the forming of the partition wall, the method of manufacturing a dual panel type organic electroluminescent device substrate, characterized in that the patterned by the diffraction exposure method to selectively control the light intensity. The method of claim 12, The inclined partition pattern formed in the second region is a manufacturing method of a dual panel type organic electroluminescent device substrate made by adjusting the width of the open portion of the mask used in the diffraction exposure process and the gap between the open portions. The method of claim 12, A barrier rib pattern formed in the third region is a diffraction exposure process using a mask having a slit pattern at a position corresponding to the concave portion. The method of claim 11, The forming of the thin film transistor may include forming a gate electrode, a semiconductor layer, a source electrode and a drain electrode, and a power supply line, and have a height higher than that of the thin film transistor forming unit. The manufacturing method of the board | substrate for dual panel type organic electroluminescent elements which further includes the process of providing a lead-out part to the contact part of 2 electrodes. The method of claim 15, The forming of the lead-out unit may include first, fourth, fourth, fourth, fourth, fourth, fourth, fourth, fourth, fourthth, fourthth, fourthth, fourthth, fourthth, fourthth, thththththththththththththth, ththththththththththth.ththththththththththththththththththweekthththththththththththththththththththththothteenthmic Levels-Secondary Figures A method of manufacturing a substrate for a dual panel type organic electroluminescent device which is a step of sequentially forming a pattern. The method of claim 15, The forming of the lead-out part may include forming a protective layer having a drain contact hole that partially exposes the drain electrode in a region covering the thin film transistor, and then forming a column-shaped lead-out pattern in the lead-out area. A method of manufacturing a substrate for a dual panel type organic electroluminescent device comprising a step. The method of claim 17, The material constituting the lead-out pattern is a method of manufacturing a substrate for a dual panel type organic electroluminescent device is selected from organic insulating materials. The method according to any one of claims 11 or 15, The forming of the organic light emitting layer and the second electrode for each subpixel region may further include bonding the first and second substrates, and in the bonding of the first and second substrates, the derivation unit. Method of manufacturing a substrate for a dual panel type organic electroluminescent device comprising the step of electrically connecting the first and second substrates.