KR20040017466A - In plane switching mode liquid crystal display device - Google Patents

Abstract

PURPOSE: An in-plane switching mode liquid crystal display is provided to prevent distortion of an in-plane electric field applied to a liquid crystal layer by minimizing an electric field between data lines and pixel electrodes by forming the data lines and the pixel electrodes on different layers, thereby effectively preventing vertical crosstalk on a picture. CONSTITUTION: A plurality of first common electrodes and third common electrodes(105c), pixel electrodes(107a,107b) are formed on a first substrate(120) in parallel. A gate insulating film(122) is accumulated on the common electrode and the pixel electrodes. The first common electrodes and the third common electrodes are arranged around data lines(104) formed on the gate insulating film to generate an in-plane electric field with the pixel electrodes, and interrupt an electric field between the data lines and the pixel electrodes.

Description

Transverse electric field mode liquid crystal display device {IN PLANE SWITCHING MODE LIQUID CRYSTAL DISPLAY DEVICE}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a transverse electric field mode liquid crystal display device, and in particular, by forming a pixel electrode on a substrate, a transverse electric field that can prevent vertical crosstalk from occurring on the screen by eliminating electric field distortion between the data line and the pixel electrode. The present invention relates to a mode liquid crystal display device.

Recently, with the development of various portable electronic devices such as mobile phones, PDAs, and notebook computers, there is a growing demand for flat panel display devices for light and thin applications. Such flat panel displays are being actively researched, such as LCD (Liquid Crystal Display), PDP (Plasma Display Panel), FED (Field Emission Display), VFD (Vacuum Fluorescent Display), but mass production technology, ease of driving means, Liquid crystal display devices (LCDs) are in the spotlight for reasons of implementation.

Such liquid crystal display devices have various display modes according to the arrangement of liquid crystal molecules. However, TN mode liquid crystal display devices are mainly used because of the advantages of easy monochrome display, fast response speed, and low driving voltage. In such a TN mode liquid crystal display device, liquid crystal molecules aligned horizontally with the substrate are almost perpendicular to the substrate when a voltage is applied. Therefore, there is a problem that the viewing angle is narrowed upon application of voltage due to the refractive anisotropy of the liquid crystal molecules.

In order to solve this viewing angle problem, liquid crystal display devices of various modes having wide viewing angle characteristics have recently been proposed, but among them, the liquid crystal display device of the lateral field mode (In Plane Switching Mode) is applied to actual production. It is produced. The IPS mode liquid crystal display device aligns liquid crystal molecules in a plane by forming at least one pair of electrodes arranged in parallel in a pixel to form a transverse electric field substantially parallel to the substrate.

The structure of the IPS mode liquid crystal display device described above is shown in FIG. As shown in the figure, the pixels of the liquid crystal panel 1 are defined by gate lines 3 and data lines 4 arranged vertically and horizontally. Although only the (n, m) th pixels are shown in the drawing, in the liquid crystal panel 1, n and m gate lines 3 and data lines 4 are disposed, respectively, and thus the liquid crystal panel 1 is disposed. N x m pixels are formed throughout. The thin film transistor 10 is formed at the intersection of the gate line 3 and the data line 4 in the pixel. The thin film transistor 10 includes a gate electrode 11 to which a scan signal is applied from the gate line 3, and a semiconductor layer formed on the gate electrode 11 and activated as a scan signal is applied to form a channel layer. 12 and a source electrode 13 and a drain electrode 14 formed on the semiconductor layer 12 and to which an image signal is applied through the data line 4. The image signal input from the outside is applied to the liquid crystal layer. do.

In the pixel, a plurality of common electrodes 5a to 5c and pixel electrodes 7a and 7b are arranged substantially parallel to the data line 4. In addition, a common line 16 connected to the common electrodes 5a to 5c is disposed in the middle of the pixel, and a pixel electrode line 18 connected to the pixel electrodes 7a and 7b is disposed on the common line 16. Is disposed and overlaps with the common line 16.

As described above, in the configured IPS mode liquid crystal display device, the liquid crystal molecules are aligned substantially parallel to the common electrodes 5a to 5c and the pixel electrodes 7a and 7b. When the thin film transistor 10 is operated and a signal is applied to the pixel electrodes 7a and 7b, the transverse electric field is substantially parallel to the liquid crystal panel 1 between the common electrodes 5a to 5c and the pixel electrodes 7a and 7b. Will occur. Since the liquid crystal molecules rotate on the same plane along the transverse electric field, gray level inversion due to the refractive anisotropy of the liquid crystal molecules can be prevented.

FIG. 2 is a cross-sectional view of a conventional IPS mode liquid crystal display device. FIG. 2 (a) is a cross-sectional view taken along the line II ′ and FIG. 2 (b) is a cross-sectional view taken along the line II-II ′. As shown in FIG. 2A, a gate electrode 11 is formed on the first substrate 20, and a gate insulating layer 22 is stacked over the entire first substrate 20. . The semiconductor layer 12 is formed on the gate insulating layer 22, and the source electrode 13 and the drain electrode 14 are formed thereon. In addition, a passivation layer 24 is formed on the entire first substrate 20.

The black matrix 32 and the color filter layer 34 are formed on the second substrate 30. The black matrix 32 is to prevent light leakage into a region in which the liquid crystal molecules do not operate. As shown in the drawing, the black matrix 32 is between the thin film transistor 10 region and the pixel and the pixel (that is, the gate line and the data line). Area). The color filter layer 34 is composed of R (Red), B (Blue), and G (Green) to realize actual colors.

The liquid crystal layer 40 is formed between the first substrate 20 and the second substrate 30 to complete the liquid crystal panel 1.

Meanwhile, as shown in FIG. 2B, the common electrodes 5a to 5c are formed on the first substrate 20 and the pixel electrodes 7a and 7b are formed on the gate insulating layer 22. The transverse electric field E1 is generated between the common electrodes 5a to 5c and the pixel electrodes 7a and 7b. In this case, the first common electrode 5a and the third common electrode 5c are arranged near the data line 4, respectively, for the following reason.

In general, the transverse electric field applied to the liquid crystal layer 40 does not include only the transverse electric field E1 generated between the common electrodes 5a to 5c and the pixel electrodes 7a and 7b. When a signal is applied to the liquid crystal layer 40, a pixel voltage is applied to the data line 4. Accordingly, a transverse electric field E2 is generated between the data line 4 and the pixel electrodes 7a and 7b as shown in the figure. Theoretically, in the IPS mode liquid crystal display device, it is preferable to generate a transverse electric field completely parallel to the substrate 20. However, as described above, distortion occurs in the entire transverse electric field applied to the liquid crystal layer 40 by the electric field E2 generated between the data line 4 and the pixel electrodes 7a and 7b. Therefore, the influence of the pixel voltage applied to the data line 4 should be removed, and the first common electrode 5a and the third common electrode 5c are arranged close to the data line 4 so as to close the data line 4. This is to shield the electric field E2 between 4) and the pixel electrodes 7a and 7b.

As described above, in order to block the electric field E2 between the data line 4 and the pixel electrodes 7a and 7b, the first common electrode 5a and the third common electrode 5c must have a predetermined width or more. In the conventional IPS mode liquid crystal display device, the width of the first common electrode 5a and the third common electrode 5c is much wider than that of the second common electrode 5b. It was impossible to completely block the electric field E2 between (7a, 7b). In addition, a wider width of the first common electrode 5a and the third common electrode 5c also causes a problem that the aperture ratio of the liquid crystal display element is reduced.

SUMMARY OF THE INVENTION The present invention has been made in view of the above, and the pixel electrode is formed on a different layer from the data line, thereby minimizing the electric field between the data line and the pixel electrode, thereby causing on-screen distortion caused by distortion of the transverse electric field applied to the liquid crystal layer. An object of the present invention is to provide a transverse electric field mode liquid crystal display device capable of preventing vertical crosstalk.

Another object of the present invention is to arrange an electric field blocking electrode that blocks an electric field between the data line and the pixel electrode near the data line to prevent distortion of the transverse electric field applied to the liquid crystal layer and to reduce the width of the common electrode near the data line. It is to provide a transverse electric field mode liquid crystal display device capable of improving the aperture ratio.

In order to achieve the above object, a transverse electric field mode liquid crystal display device according to a first aspect of the present invention comprises a plurality of gate lines and data lines defining a plurality of pixels, a thin film transistor disposed in each pixel, and A plurality of common and pixel electrodes arranged in substantially parallel to the data line to generate a transverse electric field in a pixel, and for blocking an electric field formed on the common electrode with a gate insulating layer or a gate insulating layer / protective layer of a thin film transistor interposed therebetween. It consists of electrodes.

Since the data line is formed on the gate insulating layer and the pixel electrode is formed on the substrate, the electric field between the data line and the pixel electrode can be minimized. In addition, the common electrode is formed on the substrate and the field blocking electrode is formed on the gate insulating layer or the protective layer to block the electric field between the data line and the pixel electrode. The common electrode and the field blocking electrode are connected to each other through a contact hole formed in the gate insulating layer or the gate insulating layer / protective layer.

In addition, a transverse electric field mode liquid crystal display device according to a second aspect of the present invention includes a plurality of gate lines and data lines defining a plurality of pixels, a thin film transistor disposed in each pixel, and at least one of the plurality of gate lines disposed in the pixel. The common electrode, the common electrode and the transverse electric field are generated, and at least one pixel electrode formed on a layer different from the data line.

1 is a plan view showing the structure of a conventional transverse electric field mode liquid crystal display device.

(A) is sectional drawing along the line II 'of FIG.

(B) is sectional drawing along the II-II 'line | wire of FIG.

Figure 3 (a) is a cross-sectional view showing the structure of a transverse electric field mode liquid crystal display device according to an embodiment of the present invention.

Figure 3 (b) is a cross-sectional view showing the structure of a transverse electric field mode liquid crystal display device according to another embodiment of the present invention.

Explanation of symbols on the main parts of the drawings

104,204 data line 105,205 common electrode

106,206: auxiliary common line 107,207: pixel electrode

120,130,220,230: substrate 122,222: gate insulating layer

124,224 Protective layer 125,225 Contact hole

132,232 Black Matrix 134,234 Color Filter Layer

140,240: liquid crystal layer

In general, in the liquid crystal display of the IPS mode, light is transmitted to a region between the common electrode and the pixel electrode. The transmission region depends on the number of formations of the common electrode and the pixel electrode, which is typically represented by a block. For example, three common electrodes and two pixel electrodes are formed in each pixel, and four light transmitting regions through which light is transmitted are formed. As such, the IPS mode liquid crystal display device having four transmission regions is generally referred to as a four-block liquid crystal display device. However, these names are used for convenience of description only and are not intended to limit the specific structure of the liquid crystal display device.

The present invention is not limited to the liquid crystal display element of a specific block. In other words, the present invention is applicable to the liquid crystal display device of all possible blocks (possibly including the common electrode and the pixel electrode). In the following description, the structure of the IPS mode liquid crystal display device according to the present invention is described as a structure having a specific number of blocks. However, this is merely for effectively explaining the present invention, and the structure of the IPS mode liquid crystal display device according to the present invention. It is not intended to be limiting.

In general, in the IPS mode liquid crystal display device, the electric field between the data line and the pixel electrode is blocked by the common electrode disposed near the data line to prevent the transverse electric field from being distorted over the entire liquid crystal panel. In addition, in the present invention, the pixel electrode is formed on the substrate on which the gate electrode of the thin film transistor is formed to minimize the electric field between the data line and the pixel electrode. By minimizing an electric field between the data line and the pixel electrode, it is possible to effectively prevent vertical crosstalk from occurring on the screen. In addition, in the present invention, even when the width of the common electrode disposed near the data line is reduced, the electric field between the data line and the pixel electrode can be effectively blocked, so that the aperture ratio of the liquid crystal display device can be improved.

In the IPS mode liquid crystal display device of the present invention, the common electrode arranged near the data line is formed of two layers connected through the contact hole to more effectively block the electric field between the data line and the pixel electrode.

Hereinafter, an IPS mode liquid crystal display device according to the present invention will be described in detail with reference to the accompanying drawings. In this case, the same structure as the conventional IPS mode liquid crystal display device shown in FIGS. 1 and 2 will not be described in detail, and only the features of the present invention will be described in detail.

3 is a cross-sectional view taken along line II-II 'of FIG. 1 according to the present invention.

As shown in the drawing, a plurality of first common electrodes 105a, third common electrodes 105c, and pixel electrodes 107a, which are electrically connected to a common line (not shown), on the first substrate 120. 107 are arranged in parallel with each other, and a gate insulating layer 122 is stacked thereon. The first common electrode 105a and the third common electrode 105c are disposed near the data line 104 formed on the gate insulating layer 122 to generate a transverse electric field between the pixel electrodes 107a and 107. At the same time, an electric field between the data line 104 and the pixel electrodes 107a and 107b is cut off. The first common electrode 105a and the third common electrode 105c are formed by depositing a metal such as Cu, Mo, Ta, Cr, Ti, Al, or Al alloy by evaporation or sputtering. It is composed of a single layer or a plurality of layers etched by etchant, and is preferably formed by the same process as the gate electrode of a thin film transistor (not shown) for simplicity of the process. In this case, the common line may be formed to overlap the gate line.

The pixel electrodes 107a and 107b are electrically connected to pixel electrode lines (not shown) arranged in the pixel so that the pixel voltage is applied when the thin film transistor is turned on. The pixel electrodes 107a and 107b may be formed of the same material as the source electrode and the drain electrode of the thin film transistor (for example, a metal such as Cr, Mo, Ta, Cu, Ti, Al, or Al alloy), but the process For the sake of simplicity, it is preferable to form the same material as the gate electrode of the thin film transistor. In this case, when the pixel electrode lines connected to the pixel electrodes 107a and 107b are arranged on the gate insulating layer 122, the pixel electrodes 107a and 107b and the pixel electrode lines are contact holes formed in the gate insulating layer 122. is connected via a contact hole.

A second common electrode 105b, a first auxiliary common electrode 106a, and a second auxiliary common electrode 106b are formed on the gate insulating layer 122. As shown in the drawing, a contact hole 125 is formed in the gate insulating layer 122, and a first auxiliary common electrode 106a and a second auxiliary common electrode 106b are formed through the contact hole 125, respectively. It is electrically connected to the first common electrode 105a and the third common electrode 105c. The second common electrode 105b, the first auxiliary common electrode 106a, and the second auxiliary common electrode 106b are formed on the same layer as the data line 104. Therefore, the second common electrode 105b, the first auxiliary common electrode 106a, and the second auxiliary common electrode 106b are made of the same material as the first common electrode 105a and the second common electrode 105b. Although it may be formed of a layer or a plurality of layers, it may be preferable to form the same material as the data line (ie, the source electrode and the drain electrode of the thin film transistor) by the same process to simplify the process.

As described above, in the IPS mode liquid crystal display device of the present invention, the pixel electrodes 107a and 107b are formed on the first substrate 120 so that the pixel electrodes 107a and 107b and the data line 104 are arranged on different layers. The electric field between the pixel electrodes 107a and 107b and the data line 104 can be minimized, and as a result, distortion of the transverse electric field applied to the liquid crystal layer 140 can be minimized.

In addition, double electrodes, that is, the first common electrode 105a and the first auxiliary common electrode 106a and the third common electrode, are disposed on the first substrate 120 and the gate insulating layer 122 near the data line 104. Since 105c and the second auxiliary common electrode 106b are formed, the electric field between the pixel electrodes 107a and 107b and the data line 104 can be blocked more effectively. Furthermore, since the contact hole 125 formed to connect the first and third common electrodes 105a and 105c and the first and second auxiliary common electrodes 106a and 106b is filled with metal, The electric field between 104 and the pixel electrodes 107a and 107b can be blocked more effectively.

In the above description, the electrodes 105a and 105c formed on the first substrate 120 are defined as common electrodes, and the electrodes 125a and 125b formed on the gate insulating layer 122 are defined as auxiliary common electrodes. Performs the same function. Therefore, the electrodes 105a and 105c formed on the first substrate 120 may be referred to as auxiliary common electrodes, and the electrodes 106a and 106b formed on the gate insulating layer 122 may be referred to as common electrodes. Substantially, the second common electrode 105b is formed on the gate insulating layer 122, and the transverse electric field formed in the liquid crystal layer 140 mainly includes the electrodes 105b, 106a, and 106b formed on the gate insulating layer 122. Since it occurs between the pixel electrodes 107a and 107b, it may be more appropriate to define the electrodes 106a and 106b formed on the gate insulating layer 122 as common electrodes. However, since the electrodes 105a, 105c, 106a, and 106b perform the same function, it is not meaningful to refer to the electrodes as common electrodes or auxiliary common electrodes, and in the present invention, such common electrodes or auxiliary common electrodes are distinguished. You can do it in reverse.

As described above, in the IPS mode liquid crystal display device of the present invention, the electric field between the data line 104 and the pixel electrodes 107a and 107b is formed by forming the first auxiliary common electrode 106a and the second auxiliary common electrode 106b. Since it is possible to block more effectively, the width t1 of the first common electrode 105a and the third common electrode 105c arranged near the data line 104 can be significantly reduced as compared with the conventional IPS mode liquid crystal display device. As a result, it is possible to improve the aperture ratio of the IPS mode liquid crystal display device. In the present invention, the width of the first common electrode 105a and the third common electrode 105c can be made smaller than that of the conventional IPS mode liquid crystal display device. That is, in the IPS mode liquid crystal display device of the present invention, even if the width t1 of the first common electrode 105a and the third common electrode 105c is about 5 μm similar to that of the second common electrode 105b, the data line The electric field between the 104 and the pixel electrodes 107a and 107b can be blocked.

Meanwhile, the width t2 of the first auxiliary common electrode 106a and the second auxiliary common electrode 106b is the same as the width t1 of the first common electrode 105a and the third common electrode 105c. You can do it, but you can make it smaller.

3B is a view showing another embodiment of the IPS mode liquid crystal display device according to the present invention. Since the IPS mode liquid crystal display device of this embodiment is the same except for the structure of the IPS mode liquid crystal display device shown in FIG. 3 (a) and only the formation positions of the auxiliary common electrodes 206a and 206b, detailed description thereof will be omitted. As shown in the figure, in this embodiment, the first common electrode 205a, the third common electrode 205c, and the first pixel electrode 207a and the second pixel electrode 207b are disposed on the first substrate 220. The first auxiliary common electrode 206a and the second auxiliary common electrode 206b are formed on the protective layer 224. The common electrodes 205a and 205c and the auxiliary common electrodes 206a and 206b are connected to each other through a contact hole 225 formed in the gate insulating layer 222 and the protective layer 224.

As described above, the configured IPS mode liquid crystal display device also has the same effect as the IPS mode liquid crystal display device shown in FIG. That is, since the pixel electrodes 207a and 207b are formed on the first substrate 220, the electric field between the data line 204 and the pixel electrodes 207a and 207b can be minimized, and the protective layer 224 is disposed on the protective layer 224. The formed auxiliary common electrodes 206a and 206b effectively block an electric field between the data line 204 and the pixel electrodes 207a and 207b. The embodiment of the present invention is not limited to the structure of the IPS mode, but may be applied to a structure in which the common electrode and / or the pixel electrode is formed in a zigzag shape, and the data lines are also formed in a zigzag shape. You can do it.

As described above, in the IPS mode liquid crystal display device of the present invention, since the data lines and the pixel electrodes are arranged on different layers by forming the pixel electrodes on the first substrate, the electric field between the data lines and the pixel electrodes can be minimized. Will be. Therefore, the distortion of the transverse electric field applied to the liquid crystal layer can be prevented, and the vertical crosstalk can be effectively prevented from occurring on the screen.

In addition, in the IPS mode liquid crystal display device of the present invention, an auxiliary common electrode connected to the common electrode near the data line is formed on the gate insulating layer or the protective layer to effectively block the electric field between the data line and the pixel electrode. Therefore, it is possible to prevent distortion from occurring in the transverse electric field applied to the liquid crystal layer, thereby preventing the occurrence of vertical crosstalk on the screen. Furthermore, since the electric field between the data line and the pixel electrode can be blocked by the auxiliary common electrode, the width of the common electrode arranged near the data line can be reduced, thereby improving the aperture ratio of the liquid crystal display device.

Claims (16)

A plurality of gate lines and data lines defining a plurality of pixels; A drive element disposed in each pixel; A plurality of first common electrodes and pixel electrodes arranged in the pixel to generate a transverse electric field; And A transverse electric field mode liquid crystal display device comprising a second common electrode formed on the first common electrode. The transverse electric field mode liquid crystal display of claim 1, wherein the second common electrode is arranged near the data line. The transverse electric field mode liquid crystal display device of claim 1, wherein a width of the second common electrode is equal to or smaller than a width of the first common electrode. The transverse electric field mode liquid crystal display device of claim 1, wherein the driving device is a thin film transistor. The method of claim 4, wherein the thin film transistor, A gate electrode formed on the substrate; An insulating layer stacked over the entire substrate on which the gate electrode is formed; A semiconductor layer formed on the insulating layer; A source electrode and a drain electrode formed on the semiconductor layer; And A transverse electric field mode liquid crystal display device comprising a protective layer stacked over the entire substrate on which the source and drain electrodes are formed. The transverse electric field mode liquid crystal display device of claim 5, wherein the first common electrode is formed on the substrate, and the second common electrode is formed on the insulating layer. The transverse electric field mode liquid crystal display device of claim 6, wherein a contact hole is formed in the insulating layer to connect the first common electrode and the second common electrode. The transverse electric field mode liquid crystal display device of claim 5, wherein the first common electrode is formed on the substrate, and the second common electrode is formed on the protective layer. The transverse electric field mode liquid crystal display device of claim 8, wherein a contact hole is formed in the insulating layer and the protective layer to connect the first common electrode and the second common electrode. The transverse electric field mode liquid crystal display device of claim 5, wherein the pixel electrode is formed on the substrate. A plurality of gate lines and data lines defining a plurality of pixels; A thin film transistor disposed in each pixel; At least one common electrode disposed in the pixel; A transverse electric field mode liquid crystal display device which generates the common electrode and a transverse electric field, and comprises at least one pixel electrode formed on a layer different from the data line. 12. The lateral field mode liquid crystal display of claim 11, further comprising at least one auxiliary common electrode disposed near the data line and overlapping the common electrode with an insulating layer interposed therebetween. The transverse electric field mode liquid crystal display device of claim 12, wherein the common electrode and the auxiliary common electrode are connected through a contact hole formed in an insulating layer. 12. The transverse electric field liquid crystal display device according to claim 11, wherein the insulating layer is a gate insulating layer of a thin film transistor. 12. The transverse electric field liquid crystal display device according to claim 11, wherein the insulating layer is a gate insulating layer and a protective layer of a thin film transistor. And the pixel electrode and the data line are arranged in different layers. A plurality of gate lines and data lines defining a plurality of pixels; A drive element disposed in each pixel; At least one common electrode and a pixel electrode arranged in the pixel to generate a transverse electric field; And And a field blocking electrode arranged near the data line to block an electric field between the data line and the pixel electrode.