KR20040008894A - Semiconductor fabrication equipment having multi-chamber - Google Patents
Semiconductor fabrication equipment having multi-chamber Download PDFInfo
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- KR20040008894A KR20040008894A KR1020020042629A KR20020042629A KR20040008894A KR 20040008894 A KR20040008894 A KR 20040008894A KR 1020020042629 A KR1020020042629 A KR 1020020042629A KR 20020042629 A KR20020042629 A KR 20020042629A KR 20040008894 A KR20040008894 A KR 20040008894A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
- H01L21/67201—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the construction of the load-lock chamber
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
- H01L21/67207—Apparatus for manufacturing or treating in a plurality of work-stations comprising a chamber adapted to a particular process
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
- H01L21/6719—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the construction of the processing chambers, e.g. modular processing chambers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
Abstract
Description
본 발명은 반도체 기술에 관한 것으로, 특히 멀티 챔버를 구비한 반도체 제조 장비에 관한 것이다.TECHNICAL FIELD This invention relates to semiconductor technology. Specifically, It is related with the semiconductor manufacturing equipment provided with the multi chamber.
반도체 생산 라인에서 사용되고 있는 식각 장비, 증착 장비 등은 통상적으로 2개 이상의 공정 챔버를 구비하고 있다. 각각의 공정 챔버에서는 동일한 레시피의 공정을 동시에 진행하거나 각각 다른 레시피의 공정을 동시에 진행하여 생산성을 높이고 있다.Etching equipment, deposition equipment, and the like used in semiconductor production lines typically have two or more process chambers. In each process chamber, the same recipe is processed at the same time or different recipes are processed at the same time to increase productivity.
도 1은 종래기술에 따른 멀티 챔버를 구비한 반도체 제조 장비의 구성도이다.1 is a block diagram of a semiconductor manufacturing equipment having a multi-chamber according to the prior art.
도 1을 참조하면, 종래기술에 따른 멀티 챔버를 구비한 반도체 제조 장비는, 장비의 본체 즉, 바디(body)(10)와, 그에 부속된 다수의 챔버를 구비한다.Referring to FIG. 1, a semiconductor manufacturing apparatus having a multi-chamber according to the prior art includes a main body of a device, that is, a body 10 and a plurality of chambers attached thereto.
우선, 바디(10)에는 공정챔버A(11) 및 공정챔버B(12)가 부속된다. 공정챔버A(11) 및 공정챔버B(12)는 각각 독립적으로 공정을 진행할 수 있다.First, the process chamber A 11 and the process chamber B 12 are attached to the body 10. Process chamber A 11 and process chamber B 12 may each independently process.
그리고, 바디(10)에는 로드락A(15) 및 로드락B(16)이 부속된다. 로드락A(15) 및 로드락B(16)은 웨이퍼의 로딩/언로딩을 수행하기 위한 것으로, 다수의 공정챔버(11, 12)를 지원하기 위하여 통상 2개의 로드락을 구비하고 있다.In addition, the load lock A 15 and the load lock B 16 are attached to the body 10. The load lock A 15 and the load lock B 16 are used for loading / unloading wafers, and are generally provided with two load locks to support a plurality of process chambers 11 and 12.
또한, 바디(10)에는 쿨링챔버(CC)(13)가 부속된다. 쿨링챔버(13)는 공정챔버A(11) 또는 공정챔버B(12)에서 공정을 마친 웨이퍼를 서서히 냉각시키기위한 챔버이다. 공정을 진행하면서 고온으로 가열된 웨이퍼가 상온의 대기에 노출되는 경우 급냉에 의해 웨이퍼의 파손이 우려되기 때문에 별도로 냉각을 위한 챔버를 구비하고 있다.In addition, a cooling chamber (CC) 13 is attached to the body 10. The cooling chamber 13 is a chamber for gradually cooling the wafer which has been processed in the process chamber A 11 or the process chamber B 12. When the wafer heated to a high temperature during the process is exposed to the atmosphere at room temperature, the wafer may be damaged by quenching. Thus, a chamber for cooling is provided separately.
또한, 바디(10)에는 얼라인챔버(AC)(14)가 부속된다. 얼라인챔버(14)는 웨이퍼를 정렬하여 각 챔버로 이동시키기 위한 것으로, 통상 트랜스퍼챔버에 하나의 얼라이너를 구비하여 얼라인챔버(14)로 사용하거나, 장비 외부에 얼라이너를 부착할 수도 있다. 한편, 얼라이너는 로봇 암(robot arm)을 구비하고 있다.In addition, the alignment chamber (AC) 14 is attached to the body 10. The alignment chamber 14 is used to align the wafers and move them into the respective chambers. In general, the alignment chamber 14 includes one aligner in the transfer chamber to be used as the alignment chamber 14, or the aligner may be attached to the outside of the equipment. On the other hand, the aligner is equipped with a robot arm.
전술한 바와 같이 현재 반도체 생산 라인에서 가동되고 있는 장비들은 하나의 바디(10)에 하나의 얼라이너가 배치된다. 상기와 같은 장비를 사용하여 공정을 진행할 때, 공정챔버A(11) 및 공정챔버B(12)에서 공정 시간이 다른 공정을 진행하는 경우, 공정 지연 및 필름의 열화가 발생하는 문제점이 있었다.As described above, the equipment currently operating in the semiconductor production line is arranged with one aligner in one body 10. When the process is performed using the above equipment, when the process time is different in the process chamber A (11) and the process chamber B (12), there is a problem in that process delay and film deterioration occur.
예컨대, 로드락A(15)에 증착 시간이 긴 레시피의 웨이퍼(L1)를 로딩하고, 로드락B(16)에 증착 시간이 짧은 레시피의 웨이퍼(S1)를 로딩한 경우를 가정하면, 증착 시간이 긴 레시피의 웨이퍼(L1)가 얼라인챔버(14)를 경유하여 공정챔버B(12)에서 증착 공정을 진행하고, 증착 시간이 짧은 레시피의 웨이퍼(S1)가 얼라인챔버(14)를 경유하여 공정챔버A(11)에서 증착 공정을 진행할 때, 로드락A(15)을 통해 로딩된 증착 시간이 긴 레시피의 웨이퍼(L2)가 공정챔버B(12)에서 진행 중인 공정이 종료할 때까지 얼라인챔버(14)에서 대기하게 된다. 이러한 상태에서 공정챔버A(11)에서 증착 시간이 짧은 레시피의 웨이퍼(S1)에 대한 공정이 종료되면, 증착 시간이 짧은 레시피의 웨이퍼(S1)는 쿨링챔버(13)로 옮겨지고, 공정챔버A(11)는 공정챔버B(12)에서 증착 시간이 긴 레시피의 웨이퍼(L1)에 대한 공정이 종료되고 증착 시간이 긴 레시피의 웨이퍼(L2)가 공정챔버B(12)로 로딩될 때까지는 아이들(idle) 상태로 있게 된다. 이는 공정챔버A(11)에서 공정이 예정된 증착 시간이 짧은 레시피의 웨이퍼(S2)가 얼라인챔버(14)에 대기하고 있는 증착 시간이 긴 레시피의 웨이퍼(L2) 때문에 얼라인챔버(14)로 가지 못하기 때문이다.For example, it is assumed that load lock A 15 is loaded with a wafer L1 having a long deposition time and load lock B 16 has a wafer S1 having a short deposition time. The wafer L1 of the long recipe proceeds through the alignment chamber 14 in the process chamber B 12, and the wafer S1 having the short deposition time passes through the alignment chamber 14. When the deposition process is performed in the process chamber A 11, the wafer L2 having the long deposition time loaded through the load lock A 15 is finished in the process chamber B 12 until the process in progress is completed. Waiting in the alignment chamber 14. In this state, when the process for the wafer S1 having the short deposition time is completed in the process chamber A 11, the wafer S1 having the short deposition time is transferred to the cooling chamber 13 and the process chamber A 11, the process chamber B 12 is idle until the process for the wafer L1 of the long deposition time is completed and the wafer L2 of the long deposition time is loaded into the process chamber B 12. (idle) state. This is because in the process chamber A 11, the wafer S2 of the recipe having a short deposition time scheduled for the process is waiting for the alignment chamber 14 to the alignment chamber 14 because of the wafer L2 of the long deposition time. Because you can't go.
이 경우, 원치 않는 공정챔버A(11)의 아이들 상태는 공정 지연을 유발하여 생산성을 저하시키며, 아이들 상태에서 대기 중인 공정챔버A(11)의 온도가 떨어지게 되어 증착될 필름의 특성이 열화되는 문제점이 있다.In this case, an undesired idle state of the process chamber A (11) causes a process delay, thereby lowering the productivity, and the temperature of the process chamber A (11) waiting in the idle state is lowered, thereby deteriorating characteristics of the film to be deposited. There is this.
본 발명은 상기와 같은 종래기술의 문제점을 해결하기 위하여 제안된 것으로, 멀티 챔버 사용에 따른 얼라이너에서의 웨이퍼 병목 현상을 해소할 수 있는 반도체 제조 장비를 제공하는데 그 목적이 있다.The present invention has been proposed to solve the above problems of the prior art, and an object of the present invention is to provide a semiconductor manufacturing equipment that can eliminate the wafer bottleneck in the aligner due to the use of a multi-chamber.
도 1은 종래기술에 따른 멀티 챔버를 구비한 반도체 제조 장비의 구성도.1 is a block diagram of a semiconductor manufacturing equipment having a multi-chamber according to the prior art.
도 2는 본 발명의 일 실시예에 따른 멀티 챔버를 구비한 반도체 제조 장비의 구성도.2 is a block diagram of a semiconductor manufacturing equipment having a multi-chamber according to an embodiment of the present invention.
* 도면의 주요 부분에 대한 부호의 설명* Explanation of symbols for the main parts of the drawings
20 : 바디20: body
21 : 공정챔버A21: Process chamber A
22 : 공정챔버B22: process chamber B
23 : 쿨링챔버23: cooling chamber
24a : 제1 얼라인챔버(AC-1)24a: 1st alignment chamber (AC-1)
24b : 제2 얼라인챔버(AC-2)24b: 2nd alignment chamber (AC-2)
25 : 로드락A25: load lock A
26 : 로드락B26: load lock B
상기의 기술적 과제를 달성하기 위한 본 발명의 일 측면에 따르면, 멀티 챔버를 구비한 반도체 제조 장비에 있어서, 바디; 상기 바디에 장착되어 웨이퍼를 로딩/언로딩하기 위한 로드락; 상기 바디에 장착되어 상기 웨이퍼에 대하여 예정된 공정을 독립적으로 진행하기 위한 다수의 공정챔버; 및 상기 웨이퍼를 정렬하기 위한 다수의 얼라이너를 구비하는 것을 특징으로 하는 반도체 제조 장비가 제공된다.According to an aspect of the present invention for achieving the above technical problem, a semiconductor manufacturing equipment having a multi-chamber, the body; A load lock mounted on the body for loading / unloading a wafer; A plurality of process chambers mounted on the body for independently performing a predetermined process on the wafer; And a plurality of aligners for aligning the wafers.
본 발명은 멀티 챔버를 구비하는 반도체 제조 장비(예컨대, 증착 장비, 식각 장비, 세정 장비 등)의 바디에 다수의 얼라이너를 설치하여 얼라이너에서의 웨이퍼 병목 현상을 해결한다. 얼라이너는 트랜스퍼챔버 내에 설치하거나 장비 외부에 설치할 수 있다.The present invention solves the wafer bottleneck in the aligner by installing a plurality of aligners in the body of the semiconductor manufacturing equipment (eg, deposition equipment, etching equipment, cleaning equipment, etc.) having a multi-chamber. The aligner can be installed in the transfer chamber or outside the machine.
이하, 본 발명이 속한 기술분야에서 통상의 지식을 가진 자가 본 발명을 보다 용이하게 실시할 수 있도록 하기 위하여 본 발명의 바람직한 실시예를 소개하기로 한다.Hereinafter, preferred embodiments of the present invention will be introduced in order to enable those skilled in the art to more easily carry out the present invention.
도 2는 본 발명의 일 실시예에 따른 멀티 챔버를 구비한 반도체 제조 장비의 구성도이다.2 is a block diagram of a semiconductor manufacturing equipment having a multi-chamber according to an embodiment of the present invention.
도 2를 참조하면, 본 실시예에 따른 멀티 챔버를 구비한 반도체 제조 장비는, 바디(20)와, 그에 부속된 다수의 챔버를 구비한다.Referring to FIG. 2, the semiconductor manufacturing equipment having the multichamber according to the present embodiment includes a body 20 and a plurality of chambers attached thereto.
우선, 바디(20)에는 공정챔버A(21) 및 공정챔버B(22)가 부속된다. 공정챔버A(21) 및 공정챔버B(22)는 각각 독립적으로 공정을 진행할 수 있다.First, the process chamber A 21 and the process chamber B 22 are attached to the body 20. Process chamber A 21 and process chamber B 22 may each independently process.
그리고, 바디(20)에는 로드락A(25) 및 로드락B(26)가 부속된다. 로드락A(25) 및 로드락B(26)은 웨이퍼의 로딩/언로딩을 수행하기 위한 것으로, 다수의 공정챔버(21, 22)를 지원하기 위하여 통상 2개의 로드락을 구비하고 있다.In addition, a load lock A 25 and a load lock B 26 are attached to the body 20. The load lock A 25 and the load lock B 26 are for carrying out loading / unloading of a wafer, and are generally provided with two load locks to support a plurality of process chambers 21 and 22.
또한, 바디(20)에는 쿨링챔버(CC)(23)가 부속된다. 쿨링챔버(23)는 공정챔버A(21) 또는 공정챔버B(22)에서 공정을 마친 웨이퍼를 서서히 냉각시키기 위한 챔버이다.In addition, a cooling chamber (CC) 23 is attached to the body 20. The cooling chamber 23 is a chamber for gradually cooling the wafer which has been processed in the process chamber A 21 or the process chamber B 22.
또한, 바디(20)에는 제1 얼라인챔버(AC-1)(24a) 및 제2 얼라인챔버(AC-2)(24b)가 부속된다. 제1 및 제2 얼라인챔버(24a, 24b)는 웨이퍼를 정렬하여 각 챔버로 이동시키기 위한 것이다. 제1 및 제2 얼라인챔버(24a, 24b)는 트랜스퍼챔버 내에 얼라이너를 설치하여 사용할 수 있다. 한편, 얼라이너는 로봇 암(robot arm)을 구비하고 있다.The body 20 is also accompanied by a first alignment chamber (AC-1) 24a and a second alignment chamber (AC-2) 24b. The first and second alignment chambers 24a and 24b are for aligning and moving wafers to each chamber. The first and second alignment chambers 24a and 24b may be used by installing an aligner in the transfer chamber. On the other hand, the aligner is equipped with a robot arm.
이하, 상기와 같이 구성된 반도체 제조 장비의 동작을 설명한다.Hereinafter, the operation of the semiconductor manufacturing equipment configured as described above will be described.
우선, 로드락A(25)에 로딩된 증착 시간이 긴 레시피의 웨이퍼(L1)가 제1 얼라인챔버(24a)를 경유하여 공정챔버B(12)에서 증착 공정을 진행하고, 로드락B(26)에 로딩된 증착 시간이 짧은 레시피의 웨이퍼(S1)가 제1 얼라인챔버(24a)를 경유하여 공정챔버A(21)에서 증착 공정을 진행한다.First, a wafer L1 having a long deposition time loaded on the load lock A 25 is subjected to a deposition process in the process chamber B 12 via the first alignment chamber 24a, and then load lock B ( The wafer S1 having the short deposition time loaded on the substrate 26 is subjected to the deposition process in the process chamber A 21 via the first alignment chamber 24a.
이어서, 로드락A(25)을 통해 로딩된 증착 시간이 긴 레시피의 웨이퍼(L2)는 공정챔버B(22)에서 진행 중인 공정이 종료할 때까지 제1 얼라인챔버(24a)에서 대기하고, 로드락B(26)를 통해 로딩된 증착 시간이 짧은 레시피의 웨이퍼(S2)는 공정챔버A(21)에서 진행 중인 공정이 종료할 때까지 제2 얼라인챔버(24b)에서 대기하게 된다.Subsequently, the wafer L2 of the recipe having a long deposition time loaded through the load lock A 25 is waited in the first alignment chamber 24a until the process in progress in the process chamber B 22 ends. The wafer S2 of the recipe having a short deposition time loaded through the load lock B 26 is waited in the second alignment chamber 24b until the process in progress in the process chamber A 21 ends.
이러한 상태에서 공정챔버A(21)에서 증착 시간이 짧은 레시피의 웨이퍼(S1)에 대한 공정이 종료되면, 증착 시간이 짧은 레시피의 웨이퍼(S1)는 쿨링챔버(23)로 옮겨지고, 곧이어 제2 얼라인챔버(24b)에서 대기 중인 증착 시간이 짧은 레시피의 웨이퍼(S2)가 공정챔버A(21)로 들어가 공정을 진행하게 된다.In this state, when the process for the wafer S1 having the short deposition time is completed in the process chamber A 21, the wafer S1 having the short deposition time is transferred to the cooling chamber 23, and immediately thereafter, to the second cooling chamber 23. In the alignment chamber 24b, the wafer S2 of the recipe having a short deposition time waiting in the process enters the process chamber A 21 to proceed with the process.
본 실시예에서는 2개의 얼라인챔버(24a, 24b)를 구비하기 때문에공정챔버A(21) 및 공정챔버B(22)에서 서로 공정 시간이 다른 공정을 진행하는 경우에도 얼라인챔버에서 병목 현상이 일어날 우려가 없으며, 공정챔버A(21) 또는 공정챔버B(22)에서 원치 않는 아이들 상태가 발생하는 것을 방지할 수 있다.In this embodiment, since the two alignment chambers 24a and 24b are provided, bottlenecks in the alignment chamber may occur even when processes having different process times are performed in the process chamber A 21 and the process chamber B 22. There is no risk of occurrence, and it is possible to prevent unwanted idle states from occurring in the process chamber A 21 or the process chamber B 22.
본 발명의 기술 사상은 상기 바람직한 실시예에 따라 구체적으로 기술되었으나, 상기한 실시예는 그 설명을 위한 것이며 그 제한을 위한 것이 아님을 주의하여야 한다. 또한, 본 발명의 기술 분야의 통상의 전문가라면 본 발명의 기술 사상의 범위 내에서 다양한 실시예가 가능함을 이해할 수 있을 것이다.Although the technical idea of the present invention has been described in detail according to the above preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.
예컨대, 전술한 실시예에서는 트랜스퍼챔버를 얼라인챔버로 사용하는 경우를 일례로 들어 설명하였으나, 본 발명은 장비 외부에 다수의 얼라이너를 구비하는 경우에도 적용된다.For example, in the above-described embodiment, the case in which the transfer chamber is used as the alignment chamber has been described as an example, but the present invention is also applicable to the case where a plurality of aligners are provided outside the equipment.
또한, 전술한 실시예에서는 2개의 공정챔버를 구비하는 경우를 일례로 들어 설명하였으나, 본 발명은 3개 이상의 공정챔버를 구비하는 경우에도 적용된다.In the above embodiment, the case of having two process chambers has been described as an example, but the present invention is also applicable to the case of having three or more process chambers.
또한, 전술한 실시예에서는 2개의 얼라이너를 구비하는 경우를 일례로 들어 설명하였으나, 본 발명은 3개 이상의 얼라이너를 구비하는 경우에도 적용된다.In the above-described embodiment, the case of providing two aligners has been described as an example, but the present invention is also applicable to the case of providing three or more aligners.
전술한 본 발명은 멀티 챔버 사용에 따른 얼라이너에서의 웨이퍼 병목 현상을 해소할 수 있으며, 이에 따라 공정 지연을 방지하여 생산성을 개선하고, 필름의 열화를 방지하여 수율을 개선하는 효과를 기대할 수 있다.The present invention described above can solve the wafer bottleneck in the aligner according to the use of the multi-chamber, thereby improving the productivity by preventing the process delay, it can be expected to the effect of improving the yield by preventing the degradation of the film .
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100600879B1 (en) * | 2004-09-21 | 2006-07-19 | 삼성에스디아이 주식회사 | Multi Chamber Thermal Evaporation Apparatus |
| US7585684B2 (en) | 2005-02-01 | 2009-09-08 | Samsung Electronics Co., Ltd. | Method and apparatus for detecting backside particles during wafer processing |
| KR100916141B1 (en) * | 2007-11-16 | 2009-09-08 | 세메스 주식회사 | Aligner chamber and substrate processing equipment of multi chamber type having the same |
| KR101372805B1 (en) * | 2012-11-30 | 2014-03-19 | 로체 시스템즈(주) | Wafer etching process and using the same wafer etching system |
| KR20180091961A (en) * | 2013-09-26 | 2018-08-16 | 어플라이드 머티어리얼스, 인코포레이티드 | Mixed-platform apparatus, systems, and methods for substrate processing |
-
2002
- 2002-07-19 KR KR1020020042629A patent/KR20040008894A/en not_active Application Discontinuation
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100600879B1 (en) * | 2004-09-21 | 2006-07-19 | 삼성에스디아이 주식회사 | Multi Chamber Thermal Evaporation Apparatus |
| US7585684B2 (en) | 2005-02-01 | 2009-09-08 | Samsung Electronics Co., Ltd. | Method and apparatus for detecting backside particles during wafer processing |
| KR100916141B1 (en) * | 2007-11-16 | 2009-09-08 | 세메스 주식회사 | Aligner chamber and substrate processing equipment of multi chamber type having the same |
| KR101372805B1 (en) * | 2012-11-30 | 2014-03-19 | 로체 시스템즈(주) | Wafer etching process and using the same wafer etching system |
| KR20180091961A (en) * | 2013-09-26 | 2018-08-16 | 어플라이드 머티어리얼스, 인코포레이티드 | Mixed-platform apparatus, systems, and methods for substrate processing |
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