KR20040003473A - Method of opening in bit line fuse - Google Patents

Abstract

PURPOSE: A bit line fuse opening method is provided to be capable of decreasing the level of difficulty of processes and reducing the failure of products. CONSTITUTION: After forming a plurality of bit line fuses(110) at the inner portion of a lower oxide layer(112), a polysilicon layer(114) is formed at the upper portion of the lower oxide layer. After sequentially forming the first to third oxide layer(116,118,120) at the upper portion of the polysilicon layer, a photoresist pattern(122) is formed at the upper portion of the resultant structure by depositing and patterning a photoresist layer. Then, the third oxide layer is selectively etched by using the photoresist pattern as the first etching mask. The second oxide layer is selectively etched by using the etched third oxide layer as the second etching mask. Then, the first oxide layer is selectively etched by using the second oxide layer as the third etching mask.

Description

Method of opening in bit line fuse

The present invention relates to a bit line fuse open method.

In general, as semiconductor memory devices become more integrated and higher in capacities, the area of cells and the size of components constituting cells become smaller. Accordingly, process conditions are becoming more stringent to prevent the occurrence of defects. However, even though the process conditions are becoming more stringent as the patterns in the cells become finer, it is difficult to prevent a fail cell. Some defective cells generated in the semiconductor memory chip may make the whole chip unusable. This lowers product yields and raises product prices. Since it is difficult to manufacture a chip without a completely defective cell, there is a need for a technology capable of coping with a defective cell. This technique is called a redundancy technique.

In more detail, the redundancy technique is to make extra cells in addition to the operation cells of the memory chip. That is, redundancy cells are formed around the main cell region. Since all cells are connected by bit line fuses, when a bad cell occurs, the bit line fuses are cut to replace an address with a redundancy cell. In this way, defective chips can be repaired, product yields can be improved, and product costs can be reduced.

The bit line fuse is formed in the bit line forming step. Therefore, various insulating films are deposited on the bit line fuse by a subsequent process. A laser is used to cut the bit line fuse. If the thickness of the insulating layer on the bit line fuse is too thick, the bit line fuse cannot be cut. In addition, if the thickness of the insulating film on the bit line fuse is too thin, the adjacent bit line fuse may be cut. Therefore, the insulating films thickly deposited on the bit line fuses must be etched so that the thickness of the insulating films on the bit line fuses is a predetermined thickness.

1 is a cross-sectional view illustrating a conventional bit line fuse opening method.

Referring to FIG. 1, a bit line fuse 110 is formed in the lower oxide film 112. The polysilicon film 114 is deposited on the lower oxide film 112. A first oxide film 116, a second oxide film 118, and a third oxide film 120 are sequentially deposited on the polysilicon film 114. As such, various types of films are thickly deposited on the bit line fuse 110.

In order to open the bit line in the bit line fuse 110 deposited as described above, the insulating layers on the bit line fuse 110 must be etched. That is, when the photoresist film is deposited on the third oxide film 120, the photoresist film is patterned and etched.

However, the thicknesses of the insulating films on the bit line fuse 110 are typically about 3000 m 3, which is too thick to be etched at once.

Therefore, the process difficulty is high, there is a problem that product defects can easily occur.

The present invention for solving the above problems is to provide a method for opening a bit line fuse to reduce the process difficulty and reduce product defects.

1 is a cross-sectional view illustrating a conventional bit line fuse opening method.

2 to 5 are flowcharts sequentially showing a method of opening a bit line fuse according to an exemplary embodiment of the present invention.

According to the present invention, a bit line fuse is formed in a lower oxide film, a polysilicon film is formed on the lower oxide film, a first oxide film, a second oxide film, and a third oxide film are formed on the polysilicon film, and then on the third oxide film. Forming a photoresist film, patterning the photoresist film; Etching the third oxide film using the photoresist pattern as a mask; Etching the second oxide film using the photoresist pattern and the etched third oxide film as a mask; Etching the first oxide layer using the photoresist pattern, the etched third oxide layer and the etched second oxide layer as a mask. Preferably, the first oxide film is a BPSG film, the second oxide film is a TEOS film, and the third oxide film is a PE oxide film.

Hereinafter, with reference to the drawings will be described an embodiment of the present invention;

2 to 5 are flowcharts sequentially showing a method of opening a bit line fuse according to an exemplary embodiment of the present invention.

2 is a cross-sectional view illustrating a problem of a conventional bit line fuse open method.

Referring to FIG. 2, a bit line fuse 110 is formed in the lower oxide layer 112, wherein the lower oxide layer 112 is a BPSG film (Boron Phosphorus Silicate Glasslayer). The polysilicon film 114 is formed on the lower oxide film 112. A first oxide film 116, a second oxide film 118, and a third oxide film 120 are sequentially deposited on the polysilicon film 114 as an insulating film. At this time, in the present invention, the first oxide film 116 is a BPSG film (Boron Phosphorus Silicate Glasslayer), the second oxide film 118 is a TEOS film (Tetra Ethyl Ortho Silicate layer), and the third oxide film 120 is a PE-oxide film (Plasma) Enhanced oxide layer) is used. As described above, various kinds of films are about 3000 micrometers thick on the bit line fuse 110. In order to open the bit line fuse, the insulating layers 116, 118, and 120 on the bit line fuse 110 are etched. Should be. Accordingly, a photoresist film is deposited on the third oxide film 120, so that the photoresist film is patterned through a photolithography process.

As shown in FIG. 3, the photoresist pattern 122 is used as a mask to etch the third oxide layer 120.

As shown in FIG. 4, the photoresist pattern 122 and the etched third oxide layer 120 are used as a mask to etch the second oxide layer 118.

As shown in FIG. 5, the photoresist pattern 122, the etched third oxide film 120, and the etched second oxide film 118 are used as a mask to etch the first oxide film 116, thereby completing the process. .

Therefore, the process difficulty for etching the thick layer is lowered by etching each of the insulating layers formed on the bit line fuse 110.

As described above, the present invention reduces the process difficulty for etching a thick layer by etching each insulating film formed on the bit line fuse, thereby reducing product defects.

Claims (4)

A bit line fuse is formed in the lower oxide film, a polysilicon film is formed on the lower oxide film, and a first oxide film, a second oxide film, and a third oxide film are formed on the polysilicon film, and then a photoresist film is formed on the third oxide film. Forming a patterned photoresist film; And Etching the third oxide film using the photoresist pattern as a mask; Etching the second oxide film using the photoresist pattern and the etched third oxide film as a mask; And And etching the first oxide film using the photoresist pattern, the etched third oxide film and the etched second oxide film as a mask. The method of claim 1, wherein the first oxide film A bit line fuse opening method using a BPSG film. The method of claim 1, wherein the second oxide film A bit line fuse opening method comprising using a TEOS film. The method of claim 1, wherein the third oxide film Bit-line fuse opening method characterized by using a PE-oxide film.