KR200354554Y1 - Semiconductor manufacturing chamber with static neutralization - Google Patents
Semiconductor manufacturing chamber with static neutralization Download PDFInfo
- Publication number
- KR200354554Y1 KR200354554Y1 KR2019980012906U KR19980012906U KR200354554Y1 KR 200354554 Y1 KR200354554 Y1 KR 200354554Y1 KR 2019980012906 U KR2019980012906 U KR 2019980012906U KR 19980012906 U KR19980012906 U KR 19980012906U KR 200354554 Y1 KR200354554 Y1 KR 200354554Y1
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- chamber
- static electricity
- semiconductor manufacturing
- load lock
- ions
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
- H01L21/67201—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the construction of the load-lock chamber
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67017—Apparatus for fluid treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
- H01L21/67207—Apparatus for manufacturing or treating in a plurality of work-stations comprising a chamber adapted to a particular process
- H01L21/67213—Apparatus for manufacturing or treating in a plurality of work-stations comprising a chamber adapted to a particular process comprising at least one ion or electron beam chamber
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
본 고안은 정전기 중화 기능이 구비된 반도체 제조 챔버를 개시한다. 개시된 본 고안은, 반도체 제조용 로드락 챔버(3)의 저면에 진공 라인(32)이 연결되고, 상부에는 퍼지 가스 라인(31)이 연결된다. 챔버(3)의 저면에 정전기를 이온으로 중화시키는 이온화 칩(61)이 배치되고, 이온화 칩(61)은 컨트롤러(62)에 의해 제어된다. 또한, 퍼지 가스 라인(31)에는 이온 발생기(6)가 설치되어, 가스 퍼지시 발생되는 정전기가 이온에 의해 중화된다.The present invention discloses a semiconductor manufacturing chamber equipped with an electrostatic neutralization function. In the disclosed subject matter, a vacuum line 32 is connected to a bottom of a load lock chamber 3 for semiconductor manufacturing, and a purge gas line 31 is connected to an upper portion thereof. An ionization chip 61 is disposed on the bottom of the chamber 3 to neutralize static electricity with ions, and the ionization chip 61 is controlled by the controller 62. In addition, the ion generator 6 is provided in the purge gas line 31, and the static electricity generated when the gas is purged is neutralized by the ions.
Description
본 고안은 정전기 중화 기능이 구비된 반도체 제조 챔버에 관한 것으로서, 보다 구체적으로는 각 부품간의 마찰이나 가스 퍼지로 인해 발생되는 정전기를 중화시키는 기능이 구비된 반도체 제조 챔버에 관한 것이다.The present invention relates to a semiconductor manufacturing chamber having an electrostatic neutralization function, and more particularly, to a semiconductor manufacturing chamber having a function of neutralizing static electricity generated by friction or gas purge between components.
일반적으로, 반도체 제조 챔버는 도 1에 도시된 바와 같이, 공정 챔버(2)와 로드락 챔버(3) 및 반송 챔버(1)로 구성된다. 로드락 챔버(3)는 공정 챔버(2)로/에서 다수의 웨이퍼가 수납된 카세트(5)를 반입 또는 반출하기 전에 일시적으로 대기하는 챔버로서, 반송 챔버(1)에 의해 공정 챔버(2)에 연결되어 있다. 따라서, 반송 챔버(1)에는 웨이퍼를 공정 챔버(2)와 로드락 챔버(3) 각각으로 반송하는 로보트(4)가 구비되어 있다.Generally, the semiconductor manufacturing chamber is composed of a process chamber 2, a load lock chamber 3, and a transfer chamber 1, as shown in FIG. 1. The load lock chamber 3 is a chamber that temporarily waits before loading or unloading a cassette 5 containing a plurality of wafers into and out of the process chamber 2, by the transfer chamber 1 by the process chamber 2. Is connected to. Therefore, the conveyance chamber 1 is equipped with the robot 4 which conveys a wafer to each of the process chamber 2 and the load lock chamber 3.
로드락 챔버(3)는 도 2에 내부 구조가 도시된 바와 같이, 스테이지(34)상에 카세트(5)가 안치되어 있고, 또한 챔버 내부를 퍼지하기 위한 질소 라인(32)과, 진공을 부여하기 위한 진공 라인(33)이 각기 연결되어 있다. 한편, 스테이지(34)는 모터(52)에 의해 작동되는 축(51)에 연결되어, 승강되도록 되어 있다.As shown in FIG. 2, the load lock chamber 3 has a cassette 5 placed on the stage 34, and a nitrogen line 32 and a vacuum for purging the inside of the chamber. The vacuum lines 33 are connected to each other. On the other hand, the stage 34 is connected to the shaft 51 which is operated by the motor 52, and is moved up and down.
한편, 반송 챔버(1)는 도 3에 도시된 바와 같이, 그 내부에 반송암(41)을 갖는 반송 로보트(4)가 구비되어 있고, 로드락 챔버(3)와 마찬가지로 질소 라인(11)과 진공 라인(12)이 연결되어 있다.On the other hand, as shown in FIG. 3, the conveyance chamber 1 is equipped with the conveyance robot 4 which has the conveyance arm 41 in its inside, and the nitrogen line 11 and the load line chamber 3 are similarly carried out. The vacuum line 12 is connected.
그런데, 각 챔버에서 로보트의 이동시, 질소 가스 퍼지시, 카세트와 웨이퍼간의 마찰 등으로 인하여 정전기가 발생된다. 이 정전기는 웨이퍼에 형성된 회로에 심각한 악영향을 끼치는데, 종래의 챔버에는 정전기를 중화시키는 기능이 구비되어 있지 않았다.However, static electricity is generated due to friction between the cassette and the wafer during movement of the robot, purge of nitrogen gas, and the like in each chamber. This static electricity seriously affects the circuit formed on the wafer. The conventional chamber is not equipped with a function of neutralizing static electricity.
따라서, 본 고안은 챔버내에 형성된 정전기를 중화시켜서, 웨이퍼의 회로 손상을 방지할 수 있는 정전기 중화 기능이 구비된 반도체 제조 챔버를 제공하는데 목적이 있다.Accordingly, an object of the present invention is to provide a semiconductor manufacturing chamber having an electrostatic neutralization function capable of neutralizing the static electricity formed in the chamber, thereby preventing circuit damage of the wafer.
도 1은 공정 챔버와 반송 챔버 및 로드락 챔버의 배치 구조를 나타낸 평면도1 is a plan view showing the arrangement of the process chamber, the transfer chamber and the load lock chamber;
도 2는 종래의 로드락 챔버를 나타낸 단면도Figure 2 is a cross-sectional view showing a conventional load lock chamber
도 3은 종래의 반송 챔버를 나타낸 단면도3 is a cross-sectional view showing a conventional transport chamber.
도 4는 본 고안에 따른 정전기 중화 기능이 구비된 로드락 챔버를 나타낸 단면도4 is a cross-sectional view showing a load lock chamber equipped with an electrostatic neutralization function according to the present invention
도 5는 본 고안에 따른 정전기 중화 기능이 구비된 반송 챔버를 나타낸 단면도5 is a cross-sectional view showing a transfer chamber equipped with an electrostatic neutralization function according to the present invention
- 도면의 주요 부분에 대한 부호의 설명 --Explanation of symbols for the main parts of the drawing-
6 - 이온 발생기 11,32 - 퍼지 가스 라인6-ion generator 11,32-purge gas line
12,33 - 진공 라인 61 - 이온화 칩12,33-vacuum line 61-ionization chip
62 - 컨트롤러62-controller
상기와 같은 목적을 달성하기 위한 본 고안에 따른 챔버는 다음과 같은 구성으로 이루어진다.Chamber according to the present invention for achieving the above object consists of the following configuration.
반도체 제조 챔버의 저면에 진공 라인이 연결되고, 상부에는 퍼지 가스 라인이 연결된다. 챔버의 저면에 정전기를 이온으로 중화시키는 이온화 칩이 배치되고, 이온화 칩은 컨트롤러에 의해 제어된다. 또한, 퍼지 가스 라인에는 이온 발생기가 설치되어, 가스 퍼지시 발생되는 정전기가 이온에 의해 제거된다.A vacuum line is connected to the bottom of the semiconductor manufacturing chamber, and a purge gas line is connected to the top. An ionization chip is disposed at the bottom of the chamber to neutralize static electricity with ions, and the ionization chip is controlled by a controller. In addition, an ion generator is installed in the purge gas line, and static electricity generated when the gas is purged is removed by the ions.
상기된 본 고안의 구성에 의하면, 이온화 칩 및 이온 발생기에 의해 챔버 내부에서 발생된 정전기가 중화되므로써, 정전기에 의한 웨이퍼 회로 손상이 방지된다.According to the configuration of the present invention described above, the static electricity generated inside the chamber by the ionization chip and the ion generator is neutralized, thereby preventing damage to the wafer circuit by static electricity.
이하, 본 고안의 바람직한 실시예를 첨부도면에 의거하여 설명한다.Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.
도 4는 본 고안에 따른 정전기 중화 기능이 구비된 로드락 챔버를 나타낸 단면도이고, 도 5는 본 고안에 따른 정전기 중화 기능이 구비된 반송 챔버를 나타낸 단면도이다.Figure 4 is a cross-sectional view showing a load lock chamber with an electrostatic neutralization function according to the present invention, Figure 5 is a cross-sectional view showing a transfer chamber with an electrostatic neutralization function according to the present invention.
도 4에 도시된 바와 같이, 로드락 챔버(3)내에 배치된 스테이지(34)에 수 개의 웨이퍼가 수납된 카세트(5)가 안치된다. 카세트(5)는 모터(52)로 구동되는 축(51)에 연결되어 승강된다. 로드락 챔버(3)의 저면에는 진공을 부여하는 진공 라인(33)이 연결되고, 상부에는 퍼지 가스 라인(32)이 연결된다.As shown in FIG. 4, a cassette 5 containing several wafers is placed in a stage 34 disposed in the load lock chamber 3. The cassette 5 is lifted up by being connected to the shaft 51 driven by the motor 52. The bottom surface of the load lock chamber 3 is connected to a vacuum line 33 for applying a vacuum, the upper purge gas line 32 is connected.
여기서, 본 고안에서 제시되는 정전기 중화 기능이 로드락 챔버(3)에 구비된다. 즉, 이동하는 물체들간의 마찰로 인한 정전기를 이온으로 중화시키기 위해서, 이온화 칩(61)이 로드락 챔버(3)의 저면에 설치되고, 이 이온화 칩(61)은 컨트롤러(62)로 제어된다. 이온화 칩(61)을 로드락 쳄버(3)의 저면에 배치시키는 이유는, 이온화 칩(61)에 묻게 되는 미립자가 다시 로드락 챔버(3)를 오염시키는 것을 방지하기 위함이다. 즉, 이온화 칩(61)이 로드락 챔버(3)의 상부에 배치되면, 이온화 칩(61)에 묻은 미립자가 떨어져서, 로드락 챔버(3)를 오염시키게 되므로, 이온화 칩(61)을 로드락 챔버(3)의 저면에 배치시킨다.Here, the static neutralization function proposed in the present invention is provided in the load lock chamber (3). That is, in order to neutralize static electricity due to friction between moving objects with ions, an ionization chip 61 is installed on the bottom of the load lock chamber 3, and the ionization chip 61 is controlled by the controller 62. . The reason for disposing the ionization chip 61 on the bottom surface of the load lock chamber 3 is to prevent the fine particles deposited on the ionization chip 61 from contaminating the load lock chamber 3 again. That is, when the ionization chip 61 is disposed above the load lock chamber 3, the particles deposited on the ionization chip 61 fall off and contaminate the load lock chamber 3, thereby loading the ionization chip 61. It is arrange | positioned at the bottom face of the chamber 3.
또한, 가스 퍼지시 발생되는 정전기도 이온으로 중화시키기 위해서, 퍼지 가스 라인(32)에 이온 발생기(6)가 설치된다.In addition, in order to neutralize the static electricity generated when the gas is purged with ions, an ion generator 6 is provided in the purge gas line 32.
한편, 도 5는 상기와 같은 정전기 중화 기능이 반송 챔버(1)에 구비된 것을 나타낸 것으로서, 마찬가지로 이온 발생기(6)는 퍼지 가스 라인(11)에 설치되고, 컨트롤러(62)로 제어되는 이온화 칩(61)은 반송 챔버(1)의 저면에 설치된다.On the other hand, Figure 5 shows that the electrostatic neutralization function as described above is provided in the transfer chamber 1, the ion generator 6 is similarly installed in the purge gas line 11, the ionization chip controlled by the controller 62 61 is provided in the bottom face of the conveyance chamber 1.
즉, 각 챔버에서 정전기가 발생되고, 이 정전기가 웨이퍼나 카세트 또는 챔버 내벽에 대전되면, 이온 발생기(6)와 이온화 칩(61)에서 코로나 방전에 의해 발생된 이온들이 대전된 각 물체에 흡착되어서, 전기적으로 중성이 되게 하므로써, 정전기를 중화시키게 된다.That is, when static electricity is generated in each chamber and the static electricity is charged on the wafer, cassette or chamber inner wall, the ions generated by the corona discharge in the ion generator 6 and the ionization chip 61 are adsorbed to each charged object. By being electrically neutral, it neutralizes static electricity.
이상에서 설명한 바와 같이 본 고안에 의하면, 챔버에서 발생된 정전기가 이온으로 중화되므로써, 정전기에 의한 웨이퍼 회로가 손상되는 것이 방지된다.As described above, according to the present invention, the static electricity generated in the chamber is neutralized with ions, thereby preventing damage to the wafer circuit due to static electricity.
이상에서는 본 고안을 실시하기 위한 바람직한 실시예에 대하여 도시하고 또한 설명하였으나, 본 고안은 상기한 실시예에 한정되지 않고, 이하 청구범위에서 청구하는 본 고안의 요지를 벗어남이 없이 당해 고안이 속하는 분야에서 통상의 지식을 가진자라면 누구든지 다양한 변경 실시가 가능할 것이다.In the above has been shown and described with respect to a preferred embodiment for carrying out the present invention, the present invention is not limited to the above embodiment, the field to which the subject innovation belongs without departing from the gist of the subject innovation claimed in the claims below Anyone of ordinary skill in the art will be able to implement various changes.
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| Application Number | Priority Date | Filing Date | Title |
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| KR2019980012906U KR200354554Y1 (en) | 1998-07-13 | 1998-07-13 | Semiconductor manufacturing chamber with static neutralization |
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| KR2019980012906U KR200354554Y1 (en) | 1998-07-13 | 1998-07-13 | Semiconductor manufacturing chamber with static neutralization |
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| KR200354554Y1 true KR200354554Y1 (en) | 2004-08-26 |
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