KR20030082325A - Liquid crystal display and fabrication method thereof - Google Patents

Abstract

PURPOSE: A liquid crystal display and a method for fabricating the liquid crystal display are provided to shorten a period of time required for waiting for deposition of the second gate insulating layer and an active layer after deposition of the first gate insulating layer so as to improve production efficiency. CONSTITUTION: A gate electrode(2) is formed on a substrate. The first gate insulating layer(3a) is formed on the gate electrode. The second gate insulating layer(3b) thinner than the first gate insulating layer and an active layer are sequentially formed on the first gate insulating layer. Source and drain electrodes(5a,5b) are formed on the active layer. A passivation layer(8) is formed on the source and drain electrodes. A pixel electrode(9) connected to a part of the drain electrode is formed on the passivation layer.

Description

Liquid crystal display and its manufacturing method {LIQUID CRYSTAL DISPLAY AND FABRICATION METHOD THEREOF}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to a manufacturing method of a liquid crystal display device capable of shortening the process time of the liquid crystal display device.

The active matrix driving type liquid crystal display device displays a natural moving image using a thin film transistor as a switching element. Such a liquid crystal display device can be miniaturized compared to a CRT and commercialized as a monitor such as a portable television or a laptop (Lap-Top) type personal computer.

In general, as shown in FIG. 1, the liquid crystal display as described above is arranged such that the lower substrate 10 including the switching element 19 and the upper substrate 20 including the color filter 6 face each other. The liquid crystal layer 30 into which the liquid crystal 7 is injected is formed between the lower substrate 10 and the upper substrate 12.

The thin film transistor 19 disposed at each pixel on the lower substrate 10 to apply and block a signal voltage to the liquid crystal is formed on a glass substrate or a plastic substrate, and has a gate electrode 2 to which a scan signal is applied. An active layer 4 composed of a semiconductor layer 4a for transmitting a data signal in response to a signal, an n + doped ohmic contact layer 4b on both sides of the semiconductor layer 4a, and the active layer A gate insulating film 3 that electrically isolates the gate electrode 2 from the gate electrode 2, a source electrode 5a formed on the active layer 4 to apply a data signal, and a data signal to the pixel electrode. It consists of the drain electrode 5b to apply, and the protective film 8 which protects the source electrode 5a and the drain electrode 5b. The drain electrode 5b is connected to the pixel electrode 9 through the contact hole 11.

In addition, in the pixel region of each pixel except for the region where the thin film transistor 19 is formed, ITO applies a signal voltage applied through the thin film transistor 19 to the liquid crystal cell, and transparent ITO to transmit the backlight light incident from the backlight. A pixel electrode 9 formed of a material is formed.

When a gate signal having a high level is applied to the gate electrode 2a of the thin film transistor configured as described above, a channel through which electrons can move is formed in the active layer 5 so that the source electrode 5a may be formed. The data signal is transmitted to the drain electrode 5b via the active layer 5.

On the other hand, when a gate signal having a low level is applied to the gate electrode 2a, the channel formed in the active layer 5 is cut off and the transmission of the data signal to the drain electrode 5b is stopped.

Hereinafter, a manufacturing method of a thin film transistor configured as described above with reference to the drawings in detail.

2A to 2D illustrate a method of manufacturing a thin film transistor. First, as shown in FIG. 2A, as shown in FIG. 2A, a metal material is sputtered on the lower substrate 10 to form a photoresist. The gate electrode 2 of the thin film transistor is formed by patterning the photo-etching method using a resist.

Next, as shown in FIG. 2B, an insulating material is entirely deposited on the lower substrate 10 on which the gate electrode 2 is formed to form a first gate insulating film 3a having a thickness of 2000 μs. After the transfer, a second gate insulating film 3b having a thickness of 2000 상 에 is formed on the first gate insulating film 3a. At this time, the reason why the gate insulating film is divided into the first and second gate insulating films without depositing 4000 Å continuously as described above is to suppress the growth of foreign matter during the growth of the gate insulating film as a single layer (4000 Å). Subsequently, a semiconductor layer 4a made of amorphous silicon (Si) and an ohmic contact layer 4b made of n + amorphous silicon doped with phosphorus (P) are successively deposited on the second gate insulating layer 3b. Patterning is performed to form the active layer 4 of the thin film transistor.

Next, as shown in FIG. 2C, a metal material is entirely deposited on the active layer 4 and the gate insulating film 3 and then patterned. In this case, the patterned metal material layer becomes the source electrode 5a and the drain electrode 5b of the thin film transistor.

Next, as shown in FIG. 2D, the protective film 8 is entirely formed on the gate insulating film 3 including the exposed semiconductor layer 4a and the source and drain electrodes 5b and the like, and then the protective film on the A contact hole 11 is formed in the portion 8 to expose a portion of the drain electrode 5b.

Next, as shown in FIG. 2E, an ITO material is entirely deposited on the protective film 8 by sputtering, and then patterned to form the pixel electrode 9. The pixel electrode 9 is electrically connected to the drain electrode 5b of the thin film transistor through the contact hole 11.

In order to deposit the first and second gate insulating layers and active layers, nine chemical vapor deposition (CVD) devices are currently used. In this case, three and second gate insulating layers and Five deposition apparatuses are allocated to deposit the active layer, and one apparatus for simultaneously depositing the first and second gate insulating layers and the active layer is allocated.

However, although the number of deposition equipment for depositing the second gate insulating film and the active layer is larger than the number of equipment allocated for depositing the first gate insulating film as described above, in the process line, the first gate insulating film is substantially the second gate insulating film rather than the deposition time. And about 5 times longer to deposit the active layer. Accordingly, after depositing the first gate insulating film, the time required to wait for the deposition of the second gate insulating film and the active layer is long, resulting in a problem of lowering productivity.

Accordingly, the present invention has been made to solve the above problems, and the thickness of the first gate insulating film is deposited to be about 1000 mm thicker than before, and the second gate insulating film is deposited to be about 1000 mm thinner than before. The present invention provides a method of manufacturing a liquid crystal display device that can increase production efficiency by reducing waiting time for waiting for depositing a two-gate insulating film and an active layer.

Other objects and features of the present invention will be described in detail in the configuration and claims of the following invention.

1 is a schematic view of a general liquid crystal display device.

2a to 2e is a process flowchart showing a method of manufacturing a conventional thin film transistor.

3 to 3E are process flowcharts showing a method of manufacturing a thin film transistor of the present invention.

4 is a schematic diagram schematically showing components of a CVD deposition apparatus.

*** Explanation of symbols for main parts of drawing ***

1: substrate 3a: first gate insulating film

3b: second gate insulating film 3: gate insulating film

4a: semiconductor layer 4b: ohmic contact layer

4: active layer 5a: source electrode

5b: drain electrode 6: color filter

7: liquid crystal 8: protective film

9: pixel electrode 11: contact hole

According to an aspect of the present invention, there is provided a method of manufacturing a liquid crystal display device, the method comprising: preparing a substrate; forming a gate electrode on the substrate; forming a first gate insulating film having a thickness of 3000 상 에 on the gate electrode; Wow; Forming a 1000 nm thick second gate insulating film and a 1000 nm thick active layer on the first gate insulating film; Forming a source electrode and a drain electrode on the active layer; Forming a passivation layer on the source electrode and the drain electrode; and forming a pixel electrode connected to a portion of the drain electrode on the passivation layer.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

3A to 3E are process flowcharts illustrating a method of manufacturing a liquid crystal display device according to the present invention.

First, as shown in FIG. 3A, a glass or plastic substrate 1 is prepared, a metal material is deposited on the substrate 1, and then patterned by photolithography using a photoresist to form a gate electrode of a thin film transistor ( 2) form.

Next, as shown in FIG. 3B, an insulating material such as SiN or SiO is deposited on the upper surface of the gate electrode 2 and the substrate 1 by using a chemical vapor deposition (CVD) device, and the first gate having a thickness of about 3000 μm. The insulating film 3a is deposited.

At this time, CVD (Chmical Vapor Deposition) equipment is used as shown in Figure 4 A, B, C, D four deposition chamber 23, and the substrate is waiting to be introduced into the deposition chamber 23 It consists of a loader section 21 and a heater section 25 for raising the temperature in the deposition chamber 23, and three CVD equipments for depositing the first gate insulating film 3a having a thickness of 3000 Å are provided. It is used. Hereinafter, three CVD apparatuses for depositing the first gate insulating layer 3a will be referred to as first deposition apparatus.

Next, as shown in FIG. 3C, the substrate on which the first gate insulating layer 3a is formed is subjected to a cleaning process after removing a foreign matter on the upper portion of the first gate insulating layer 3a formed in the first deposition apparatus. After loading with other CVD equipment, the second gate insulating film is deposited on the upper surface of the first gate insulating film 3a with the same material as that of the first gate insulating film 3a to a thickness of about 1000 Å, and then the second gate insulating film ( 3b) Depositing 2000 Å thick amorphous silicon layer and n + amorphous silicon layer on the entire upper surface in succession. In this case, the number of allocated CVD equipment is five, hereinafter, five CVD equipment for depositing the second gate insulating film 3b and the active layer 4 are referred to as second deposition equipment.

Compared with the conventional conditions for forming the gate insulating film and the active layer including the amorphous silicon layer and the n + amorphous silicon layer, the thickness of the first gate insulating film deposited in the first deposition equipment is about 2000 kPa, and the second deposition is performed. The thicknesses of the second gate insulating film and the active layer deposited in the equipment are 2000 mW, respectively, compared to the time required for the deposition of the first gate insulating film 2000 m in the first deposition device. While the time required for the deposition of the layer (2000Å + 2000Å) is about 4 to 5 times longer, the flow of logistics may not proceed smoothly, but the present invention provides the thickness of the first gate insulating film deposited by the first deposition equipment. Is deposited about 1000Å thicker than before, and the second gate insulating film deposited by the second deposition equipment is deposited about 1000Å thinner than the existing one to increase the first gate insulating film. After the deposition, the waiting time for waiting for depositing the second gate insulating film and the active layer can be reduced.

That is, the first gate insulating film is deposited to have a thickness of 3000 μs to increase the time required to deposit the first gate insulating film in the first deposition equipment, and the second gate insulating film is deposited to have a thickness of 1000 μs to reduce the time required for the second deposition equipment. By reducing, the flow of logistics can be smoothly progressed.

As described above, the second gate insulating layer 3b and the active layer 4 are deposited, and then an amorphous silicon layer and an n + amorphous silicon layer are patterned on the second gate insulating layer 3b corresponding to the gate electrode 2. The active layer 4 is formed. The active layer 4 includes a semiconductor layer 4a made of patterned amorphous silicon (Si) and an ohmic contact layer 4b made of n + amorphous silicon doped with phosphorus (P).

Thereafter, a metal material is entirely deposited on the active layer 4, and then patterned by photolithography using a photoresist to expose a predetermined portion of the center portion of the semiconductor layer 4a to expose the source electrode 5a of the thin film transistor. And the drain electrode 5b.

Next, as shown in FIG. 3D, a protective film 8 is deposited on the entire upper surface of the source electrode 5a and the drain electrode 5b including the exposed semiconductor layer 4a, and then the protective film 8 The contact hole 11 is formed so that a portion of the drain electrode 5b is exposed at the ()) portion.

Next, as shown in FIG. 3E, an ITO material is deposited on the entire upper surface of the passivation layer 8 by sputtering, and then patterned to form a pixel electrode 9. The pixel electrode 9 is electrically connected to the drain electrode 5b of the thin film transistor through the contact hole 11.

As shown in FIG. 3E, the liquid crystal display device manufactured by the above process includes: a gate electrode 2 formed on a glass substrate or a plastic substrate, to which a scan signal is applied; An active layer 4 composed of a semiconductor layer 4a for transmitting a data signal in response to the scan signal and an n + doped ohmic contact layer 4b on both sides of the semiconductor layer 4a; A first gate insulating film 3a electrically insulating the active layer 4 from the gate electrode 2 and having a thickness of about 3000 GPa and a second gate insulating film having a thickness of about 1000 GPa on the first gate insulating film 3a. A gate insulating film 3 composed of (3b); A source electrode 5a formed on the active layer 4 to apply a data signal; A drain electrode 5b for applying a data signal to the pixel electrode; The passivation layer 8 protects the source electrode 5a and the drain electrode 5b, and the drain electrode 5b is connected to the pixel electrode 9 through the contact hole 11.

In addition, the pixel region of each pixel except for the region where the thin film transistor 19 is formed is applied a signal voltage applied through the thin film transistor 19 to the liquid crystal cell, and the backlight light incident from the backlight (not shown) may pass through. The pixel electrode 9 formed of a transparent ITO material is formed.

When a gate signal having a high level is applied to the gate electrode 2 of the thin film transistor fabricated as described above, a channel through which electrons can move is formed in the active layer 4, so that the source electrode 5a is formed. Is transmitted to the drain electrode 5b via the active layer 4.

On the other hand, when a gate signal having a low level is applied to the gate electrode 2, the channel formed in the active layer 4 is cut off and the transmission of the data signal to the drain electrode 5b is stopped.

In addition, as described above, in the present invention, in forming the gate insulating film, the time required for the first deposition equipment and the second deposition equipment are corrected by correcting the deposition time for depositing the first gate insulating film and the second gate insulating film. The time difference can be reduced by about three times.

As described above, in the method of manufacturing the liquid crystal display device according to the present invention, the thickness of the first gate insulating film is deposited to be about 1000 mm thicker than that of the conventional film, and the second gate insulating film is deposited to be about 1000 mm thinner than the conventional film. By reducing the waiting time to wait for depositing the gate insulating film and the active layer, there is an effect that can increase the production efficiency.

Claims (10)

Preparing a substrate; Forming a gate electrode on the substrate; Depositing a first gate insulating film on the gate electrode; Depositing a second gate insulating film and an active layer thinner than a thickness of the first gate insulating film on the first gate insulating film; Forming a source electrode and a drain electrode on the active layer; Forming a passivation layer on the source electrode and the drain electrode; Forming a pixel electrode connected to a part of the drain electrode on the passivation layer. The method of claim 1, further comprising cleaning the first gate insulating layer after depositing the first gate insulating layer. 2. The method of claim 1, wherein the first gate insulating film is formed to a thickness of about 3000 [mu] s. The method of claim 1, wherein the first gate insulating layer is formed to a thickness of about 1000 GPa. The method of claim 1, wherein the second gate insulating layer and the active layer are formed in the same deposition apparatus. The method of claim 1, wherein the active layer is formed by successively depositing amorphous silicon and n + doped amorphous silicon, followed by patterning. The method of claim 1, wherein nine deposition apparatuses are used for depositing the first gate insulating film, the second gate insulating film / active layer, and the protective film, and among them, the first gate insulating film, the second gate insulating film / active layer, and the protective film. The equipment allocated to deposit the bay is 1, 3, and 2, respectively, one of the other two deposition equipments is the deposition of the first gate insulating film and the second gate insulating film, and the other one is the second gate insulating film / active A method of manufacturing a liquid crystal display device, characterized by using both a layer and a protective film for deposition. A gate electrode formed on the substrate; A first gate insulating film formed over the gate electrode and the upper surface of the substrate; A second gate insulating film formed on the first gate insulating film and formed thinner than a thickness of the first gate insulating film; An active layer formed on a second gate insulating layer corresponding to an upper portion of the second gate insulating layer; Source / drain electrodes formed on the active layer and spaced apart from each other by a predetermined distance; A protective film formed on the source electrode and the drain electrode and exposing a part of the drain electrode; And a pixel electrode formed on the passivation layer and electrically connected to the exposed drain electrode. 10. The liquid crystal display device according to claim 8, wherein the thickness of the first gate insulating film is about 3000 [mu] s. 10. The liquid crystal display device according to claim 8, wherein the thickness of the second gate insulating film is about 1000 GPa.