KR20030057614A - A X-ray detector and a method for fabricating thereof - Google Patents

Abstract

PURPOSE: An X-ray detector and a method for manufacturing the same are provided to be capable of improving the carrier mobility of a TFT(Thin Film Transistor) channel by using a silicon insulating material layer as a contact layer of the TFT channel. CONSTITUTION: A gate electrode and a gate line having a gate pad(206) are formed on a semiconductor substrate(200). A gate isolating layer is formed on the entire surface of the resultant structure for covering the gate line. A semiconductor layer made of an active layer and an ohmic contact layer, is formed at the upper portion of the gate isolating layer. A source and drain electrode(214) are located and separated apart from each other at the upper portion of the semiconductor layer. A data line including the source electrode and a data pad, and a ground line are formed on the resultant structure. The first protecting layer is formed on the resultant structure. At this time, the first protecting layer directly contacts the active layer. Preferably, the first protecting layer is one selected from a group consisting of an SiNx layer and an SiOx layer.

Description

X-ray detector and a method for manufacturing the same

The present invention relates to an X-ray detector using a thin film transistor array process and a method of manufacturing the same.

Diagnostic X-ray examination method currently widely used in medicine is taken by using an X-ray detection film, and to know the result had to go through a predetermined film print time.

However, in recent years, with the development of semiconductor technology, digital x-ray detectors using thin film transistors have been researched and developed. The X-ray detector has a merit of diagnosing a result by displaying an X-ray image on a screen in real time immediately after X-ray photographing using a thin film transistor as a switching element.

Hereinafter, the configuration and operation of the X-ray detector will be described.

FIG. 1 is a schematic view illustrating the structure and operation of the X-ray detector 10, in which a substrate 1 is formed at a lower portion thereof, and a thin film transistor T, a storage capacitor C _ST , and a collecting electrode 12. ), A photoconductive film 14, a protective film 16, a high voltage electrode 18, a high voltage direct current power supply 20, and the like.

The photoconductive film 14 forms an electrical signal, that is, electron and hole pair 22, internally in proportion to the signal intensity of an external electric wave or magnetic wave incident thereto. The photoconductive film 14 serves as a converter for converting an external signal, in particular, an X-ray into an electrical signal. The electron and hole pairs 22 formed by the X-ray light are disposed under the photoconductive film 14 by the voltage Ev applied from the high voltage DC power supply 20 to the high voltage electrode 18 positioned on the photoconductive film 14. Collected in the form of a charge on the current collector electrode 12 is located, and stored in the storage capacitor (C _ST ) formed together with the capacitor electrode grounded from the outside. In this case, the charge stored in the storage capacitor C _ST is turned on by the gate signal applied to the gate of the thin film transistor T, and the thin film transistor is turned on and connected to an external source through a data line connected to the source of the thin film transistor T. It is sent to an image processing circuit to produce an x-ray image.

In order to detect and convert even weak X-ray light into charge in the X-ray detector, the number of trap state densities trapping charge in the photoconductive film 14 is reduced, and when the thin film transistor T is in a turn-off state. The leakage current of should be reduced.

2 is a plan view of a conventional X-ray detector, and for convenience of description, a plan view corresponding to one pixel unit is described as an example.

As shown, the gate wiring 30 is formed in the horizontal direction, and the data wiring 40 is formed in the vertical direction by crossing the gate wiring 30, and the gate and the data wirings 30 and 40 are formed. The thin film transistor T which is a switching element which has the gate electrode 32, the source electrode 42, and the drain electrode 44 is formed in this intersection part.

In the pixel portion, the first and second capacitor electrodes 46 and 56 constituting the storage capacitor C _ST are formed with a dielectric material (not shown) interposed therebetween.

In addition, the second capacitor electrode 56 has a drain electrode 44 through the drain contact hole 50 so that holes stored in the storage capacitor C _ST can be combined with electrons coming through the thin film transistor T. ) Is electrically connected.

In addition, gates and data pads 34 and 41 are formed at one ends of the gate and data lines 30 and 40, respectively.

The data pad 41 includes a wire bonding data pad portion 41a and a data wiring link data pad portion 41b. The data pad link 41b for a data wiring link has a first data link hole 43a. It is connected to the data line 40 through.

The data pad 41 is formed of the same material in the same process as the gate wiring 30 in order to improve the contact force between the wire and each pad in a wire bonding process for connecting the driving circuit later.

The function of the above-described X-ray detector is summarized as follows.

Holes generated from the photoconductive film 14 of FIG. 1 are collected by the collecting electrodes 12 of FIG. 1 and are stored in the storage capacitor C _ST configured together with the first and second capacitor electrodes 46 and 56.

In addition, holes stored in the storage capacitor C _ST are moved from the drain electrode 44 to the source electrode 42 by the operation of the thin film transistor T, and are processed in an external circuit (not shown) to be represented as an image. .

3A to 3E are cross-sectional views illustrating the manufacturing processes of the cross sections cut along the IIIa-IIIa, IIIb-IIIb, and IIIc-IIIc directions of FIG. 2, respectively. Transistor portion, gate pad portion, data wiring, and data pad portion.

The manufacturing process involves fabricating a separate mask and patterning each layer (insulating layer, active layer, metal layer) in an arbitrary form through etching by a photolithography process, and a series of processes This is called a mask process.

First, in FIG. 3A, the first metal is deposited on the substrate 1, and then the gate wiring 30 and the data pad 41 including the gate electrode 32 and the gate pad 34 are formed by a first mask process. ) Respectively.

At this time, the data pad 41 is composed of a wire bonding data pad portion 41a and a data wiring link data pad portion 41b.

The first metal material is formed of a low resistance metal.

In FIG. 3B, a first insulating material, a pure amorphous silicon (a-Si: H) layer, and an impurity amorphous silicon (n + a-Si) layer are successively deposited on the substrate having passed through FIG. 3A. The insulating material is used as the gate insulating film 60, and the pure amorphous silicon layer and the impurity amorphous silicon layer are formed as an active layer 62a and an ohmic contact layer 62b by a second mask process, respectively. Thus, the semiconductor layer 62 is formed.

Next, the first gate pad contact is made to the gate insulating film 60 so that the gate pad 34, the data wire link data pad portion 41b and the wire bonding data pad portion 41a are partially exposed by the third mask process. The hole 61a, the first data link hole 43a, and the first data pad contact hole 45a are formed.

3C illustrates the first capacitor electrode 46, the source and drain electrodes 42 and 44, and the source electrode 42 by the fourth mask process after depositing the second metal on the substrate having passed through FIG. 3B. Forming a data line 40 connected to the data line 40.

The data line 40 is in contact with the data pad portion 41b for data wire link through the first data link hole 43a and is connected to the data pad portion 41a for wire bonding.

Next, only the ohmic contact layer 62b exposed between the source and drain electrodes 42 and 44 is removed using the source and drain electrodes 42 and 44 as a mask to expose a portion of the active layer 62a. (ch) is formed.

The second metal is formed of a chromium (Cr) -based metal.

FIG. 3D illustrates a deposition process of the second insulating material on the substrate that has undergone the process of FIG. 3C, and then a fifth mask process to correspond to the first gate and data pad contact holes (61a and 45a of FIG. 3B). The first protective layer 66 may be formed to have the second gate and data pad contact holes 61b and 45b and the drain contact hole 50 exposing a part of the drain electrode 44, respectively.

As the second insulating material, an organic insulating material capable of uniformly applying the X-ray photosensitive material to the entire pixel area is mainly used.

In FIG. 3E, after depositing the transparent conductive material on the substrate having passed through FIG. 3D, the second capacitor electrode 56 is formed by the sixth mask process.

In this case, the second capacitor electrode 56 is connected to the drain electrode 44 through the drain contact hole 50.

At this time, it can be seen that the gate pad 34 and the wire bonding data pad part 41a have the same structure. This is because the gate pad 34 and the data pad 41 are formed at the same time in the same process.

The gate pad 34 and the wire bonding data pad portion 41a are exposed to the outside by the gate and data pad contact holes and are bonded by the gate and the data driving circuit and the wire in the driving circuit mounting process.

After the process shown in FIG. 3E, the photosensitive material and the protective film 16 (FIG. 1) are coated, although not shown in the drawing. The photosensitive material is used as a transducer for receiving an external signal and converting it into an electrical signal. A compound of amorphous selenium (a-Se) is deposited to a thickness of 100 to 500 μm using an evaporator. When X-ray light is exposed to the photosensitive material, electrons and hole pairs are generated in the photosensitive material according to the intensity of the exposed light.

Finally, a transparent conductive electrode is formed as a high voltage electrode (18 in FIG. 1) so that the X-ray light can be transmitted. When x-ray light is received while applying a voltage to the high voltage electrode (18 in FIG. 1), electrons and hole pairs formed in the photosensitive material are separated from each other, and holes separated by the conductive electrode are provided in the current collecting electrode (12 in FIG. 1). Gathered and stored in a storage capacitor (C _ST of FIG. 1).

The channel (ch in FIG. 3c) is a region where the active layer 62a is partially exposed, and is made of amorphous silicon based on silicon, and the bond between silicon atoms forming the surface of the channel (ch in FIG. 3c) is weak. Therefore, the mobility of electrons in the channel can be determined by the insulating material in contact with this channel (ch in FIG. 3C).

As an insulating material in contact with the channel (ch in FIG. 3C), an organic insulating material such as BCB is more reactive than an inorganic insulating material, and thus easily bonds with silicon atoms on the surface of the channel having the unstable bonding state. Due to the interelectron action of the layer, a trap level at which electrons are trapped is partially present at the interface between the channel (ch in FIG. 3C) and the first protective layer (66 in FIG. 3E), causing a problem of generating a leakage current. have.

4 is a plan view corresponding to one pixel part of the X-ray detector and relates to an X-ray detector for improving the above-described problem.

As shown in the drawing, the gate wiring 151 is formed in the row direction and the data wiring 152 is formed in the column direction to intersect the gate wiring 151.

An area defined by the intersection of the two wires 151 and 152 is called a pixel area, and a ground wire 154 spaced in parallel with the data wire 152 is formed in the pixel area.

The gate line 151 is connected to the gate pad electrode 134b through the gate connection line 134a, and the data line 152 is connected to the data pad electrode 136b through the data connection line 136a.

The connection wirings 134a and 136a are positioned between the driving region where the pad electrodes 134b and 136b are positioned and the pixel region where the wirings 151 and 152 are located to connect the wiring lines and the pad electrodes.

A capacitor electrode 168 and a pixel electrode 174 are formed in the pixel region, and the capacitor electrode 168 is in contact with the ground wiring 154 through the ground wiring contact holes 160a and 160b and the pixel electrode ( 174 is configured to be in contact with the drain electrode 150.

The capacitor electrode 168 and the pixel electrode 174 are formed with a thinly deposited inorganic insulating layer (not shown) to form a storage capacitor C.

In the above-described configuration, the gate pad electrode 134b and the data pad electrode 136b are exposed through the contact holes 176 and 178.

Although not shown, the pixel electrode 174 serves as a current collecting electrode that collects charges so that holes generated in the photoconductive film (2 of FIG. 1) can accumulate in the storage capacitor C.

5A through 5K are flowcharts illustrating the process sequence by cutting along the cutting lines Va-Va, Vb-Vb, and Vc-Vc of FIG. 4, and FIG. In this step, the gate buffer layer 102 and the data buffer layer 104 are formed.

The buffer layers 102 and 104 are means for raising the gate pad electrode and the data pad electrode to be formed later.

The reason for increasing the height of each pad electrode is to expose the pad electrodes by etching the insulating layer on each of the pad electrodes without forming an auxiliary electrode on each pad electrode separately in the last step. The height of each pad electrode is increased by using the buffer layer so as to easily contact each pad electrode.

FIG. 5B illustrates the steps of depositing and patterning a conductive metal in duplicate to form a first metal layer of dual structure.

Among the double metal layers, the first metal 132a uses low-resistance aluminum (Al), an aluminum alloy (mainly AlNd), and the like, and the second metal 132b includes molybdenum (Mo), chromium (Cr), and tungsten. Use the selected one of (W).

The metal layer having a dual structure is patterned to form the gate connection wiring 134a and the gate pad electrode 134b extending from the gate wiring 151 of FIG. 4.

At the same time, the data connection line 136a and the data pad electrode 136b extending from the data connection line are formed in an area not parallel to the region where the gate pad electrode 134b is formed.

Next, as shown in FIG. 5C, a silicon nitride film () is formed on the entire surface of the substrate 100 on which the gate electrode 132, the data pad electrode 136b, the gate pad electrode 134b, and the gate wiring 151 are formed. One selected from an inorganic insulating material group including SiN _x ) and a silicon oxide film (SiO _x ), and optionally an organic insulating material group consisting of benzocyclobutene (BCB) and an acrylic resin (resin). The gate insulating film 138 is formed by depositing or applying.

Next, as shown in FIG. 5C, a silicon nitride film SiN _X and a silicon oxide film are formed on the entire surface of the substrate 100 on which the gate electrode 132, the gate pad electrode 134b, and the data pad electrode 136b are formed. The gate insulating film is deposited or coated with an inorganic insulating material group including (SiO ₂ ), and optionally one selected from the group of organic insulating materials including benzocyclobutene (BCB), acrylic resin, and the like. (138) is formed to a thickness of 100 kPa to 3000 kPa.

5D is a diagram illustrating a step of forming the active layer 140 and the ohmic contact layer 142.

First, pure amorphous silicon (A-Si: H) and impurity amorphous silicon (n + a-Si: H) are sequentially formed on the gate insulating film 138 while the insulating film is not exposed to the outside air. After stacking and patterning, the active layer 140 and the ohmic contact layer 142 are formed.

Next, a portion of the gate insulating layer 138 on the data connection line 136a is etched to form a data line contact hole 146.

FIG. 5E illustrates a pattern of a second metal layer formed on the gate insulating layer 138 on which the data line contact hole 146, the active layer 140, and the ohmic contact layer 142 are formed, thereby patterning the active layer 140. The source electrode 148 and the drain electrode 150 formed on both sides of the upper portion, and the data wiring 152 connected to the source electrode 148 are formed.

At the same time, a ground wiring 154 is formed across the center of the pixel region.

In this structure, one end of the data line 152 contacts the data connection line 136a through the data line contact hole 146.

Next, the ohmic contact layer 142 exposed between the source and drain electrodes is etched using the patterned source and drain electrodes 148 and 150 as a mask to expose a portion of the active layer 140.

Alternatively, the ohmic contact layer 142 may be etched away while the source and drain electrodes 148 and 150 are patterned using a photoresist (not shown) photomask and the photoresist is not removed.

The exposed surface of the active layer 140 functions as a channel through which electrons flow.

FIG. 5F illustrates a step of forming a first passivation layer 156 on the entire surface of the substrate 100 on which the source and drain electrodes 148 and 150, the ground line 154, the data line 152, and the like are formed.

The first passivation layer 156 is formed by depositing a silicon insulating layer (silicon nitride (SiN _x ) or silicon oxide (SiO ₂ )) by a predetermined method to a thickness of 500 kV to 1300 kV.

As such, when the first passivation layer, which is a layer in direct contact with the exposed active layer 140, is formed of a silicon insulating layer, the first active layer 140 may have excellent interfacial properties between the exposed active layer 140 and the first passivation layer 156. The area to be trapped becomes smaller, and therefore, the result is that the mobility of electrons becomes faster.

Therefore, it is possible to prevent the increase in leakage current due to the direct contact between the passivation layer made of the organic insulating layer formed in the subsequent process and the channel.

Here, the first passivation layer 156 is patterned so that a part of the drain electrode 150 and a part of the ground wiring 154 are exposed to expose the first drain contact hole 158a and the first ground wiring contact hole, respectively. 160a).

FIG. 5G illustrates a step of forming a second passivation layer 164 as a transparent organic layer on the patterned first passivation layer 156.

That is, the second passivation layer may be coated on the first passivation layer 156 by applying one selected from a group of transparent organic insulating materials including benzocyclobutene (BCB), acryl resin, etc. to 1 μm to 1.5 μm. 164 is formed.

Before the organic insulating layer is coated, the thin film transistor region is higher than the pixel pixel region P as shown in FIG. 5F. However, by applying the organic insulating film, the surface of the organic insulating film on these two regions can be flattened from the same substrate to the same height.

Subsequently, the second protective layer 164 of the portion corresponding to the first drain contact hole 158a and the first ground interconnection contact hole 160a is etched to form the drain electrode 150 and the ground wiring 154. The second drain contact hole 158b and the second ground wiring contact hole 160b are formed so as to be exposed again.

In this case, each of the first and second drain contact holes 158a and 158b and the first and second ground contact holes 160a and 160b are exposed with the same mask, respectively, and then the first passivation layer 156 using dry etching. ) And the second passivation layer 164 may be simultaneously formed by etching.

Next, FIG. 5H illustrates forming a capacitor electrode 168 on the drain auxiliary electrode 166 and the ground wiring contact hole as an etch stop layer on the drain contact holes 158 (a, b) as transparent electrodes.

That is, the drain auxiliary electrode 166 contacting the exposed drain electrode 150 by depositing and patterning a transparent conductive material such as indium tin oxide (ITO) on the patterned second passivation layer 164, and the A capacitor electrode 168 is formed in contact with the exposed ground line 154.

The ground line 154 is formed to pass a part of the pixel (FIG. 4), but the capacitor electrode 168 is wider than the ground line 154 so as not to overlap with the data line 152, so that the subsequent process It overlaps with at least half of the area of the pixel electrode formed at.

Next, as shown in FIG. 5I, one of the above-described organic insulating material groups is deposited on the entire surface of the substrate 100 including the drain auxiliary electrode 166 and the capacitor electrode 168 to form a third passivation layer 172. ).

The third passivation layer 172 is patterned to form a third drain contact hole 158c exposing the drain auxiliary electrode 166.

As described above, the third drain contact hole 158c is formed to have a smaller area than the drain auxiliary electrode already formed. Since the drain auxiliary electrode 166 is formed on the drain electrode, damage to the drain electrode 150 may be prevented when the third drain contact hole 158c is formed.

At the same time, the third passivation layer 172 on the gate pad electrode 134b and the data pad electrode 136b is removed.

Next, FIG. 5J illustrates a method of depositing and patterning a transparent conductive metal on the entire surface of the third passivation layer 172 on which the third drain contact hole 158c is formed to contact the exposed drain auxiliary electrode 166. The pixel electrode 174 is formed on the drain electrodes 148 and 150 and on the pixel region P.

The pixel electrode 174 is formed to overlap with the capacitor first electrode 168 with the third passivation layer 172 therebetween.

The passivation layer inserted between the pixel electrode 174 and the storage first electrode 168 is a third passivation layer 172 of the present invention used for planarization of the surface and is thicker than the conventional planarization layer (66 in FIG. 3D). Since it is small, the capacity of the storage capacitor C can be increased.

Accordingly, a storage capacitor C may be formed in the pixel region P, and the pixel electrode 174 also functions as a capacitor second electrode.

FIG. 5K illustrates a step of exposing the gate pad electrode 134b and the data pad electrode 136b over the gate buffer layer 102 and the data buffer layer 104.

As illustrated, the gate insulating layer 138, the first passivation layer 156, and the second passivation layer 164 on the gate pad electrode 134b and the data pad electrode 136b are etched to form a lower gate pad electrode ( A gate pad contact hole 176 and a data pad contact hole 178 exposing the 134b and the data pad electrode 136b are formed. The third passivation layer 172 formed on the etched insulating layer is already removed in the previous step.

As described above, the X-ray detector formed gates and data pads of the same material in the same process. This is to use aluminum used as the gate metal in wire bonding. In other words, wire bonding uses a metal having excellent ductility, so that data pads and gate pads are used as aluminum.

However, the manufacturing process of the X-ray detector described above requires a very large number of processes.

In particular, a process of exposing the data pads from the gate insulating film is required for the process of forming the gate and data buffer layer formed first in the X-ray detector manufacturing process and the connection between the data pads and the data lines by a later process.

This adds to the number of processes and adds to the photolithography process, increasing costs.

In addition, the wire bonding method is advantageous for the connection of a semiconductor device having a small number of contact pins, but when the number of contact pins increases, the time required for the wire bonding process increases.

In the wire bonding process, as shown in FIG. 6, the wire 170 is contacted with each gate pad electrode 134b and the data pad electrode 136b for wire bonding, and then a physical force is applied to the contact point O. As a method of bonding, it is very likely that each of the pad electrodes 134b and 136b is damaged.

In conclusion, it is an object of the present invention to provide an X-ray detector and a method of manufacturing the improved production yield by reducing the number of manufacturing process.

1 is a cross-sectional view showing the operation of a general X-ray detector.

2 is a plan view of a conventional X-ray detector.

3A to 3E are cross-sectional views illustrating a step of manufacturing a cross section taken along IIIa-IIIa, IIIb-IIIb, and IIIc-IIIc in FIG. 2.

4 is a plan view of an x-ray detector.

5A to 5K are cross-sectional views illustrating a step of manufacturing a cross section cut in the Va-Va, Vb-Vb, and Vc-Vc directions of FIG. 4.

6 illustrates a method of wire bonding to a general X-ray detector.

7 is a plan view of an x-ray detector according to the present invention.

8A to 8H are cross-sectional views showing step-by-step manufacturing processes of sections taken in the directions VIIa-VIIa and VIIb-VIIb of FIG.

<Explanation of symbols for main parts of drawing>

206: gate pad 218: data pad

214: drain electrode 224c: third data pad contact hole

226c: third drain contact hole 230c: third gate pad contact hole

234b: second data pad 240b: second gate pad

242: third protective layer 244: second capacitor electrode

C _ST : Storage Capacitor

In order to achieve the above object, in the present invention, a gate wiring is formed on the substrate in a first direction and has a gate electrode and a gate pad at one end thereof; A gate insulating film formed on an entire surface of the substrate covering the gate wiring; A semiconductor layer in which an active layer and an ohmic contact layer are sequentially formed on the gate insulating layer; A source and drain electrode formed in an area covering the semiconductor layer and spaced apart from each other by a predetermined distance, including the source electrode, formed in a second direction crossing the first direction, and including a data pad at one end; A data line and a ground line formed to be spaced apart from the data line in the second direction by a predetermined distance; A first gate pad contact hole, a first data pad contact hole, a first capacitor contact hole, and a first drain formed on an entire surface of the substrate covering the ground wire, and partially exposing the gate pad, the data pad, the ground wire, and the drain electrode. A first protective layer each having a contact hole and made of a silicon insulating material; A second gate pad contact hole disposed on the first passivation layer and corresponding to the first gate pad contact hole, the first data pad contact hole, the first capacitor contact hole, and the first drain contact hole; A second protective layer having a data pad contact hole, a second capacitor contact hole, and a second drain contact hole and made of a transparent organic insulating material; A first capacitor electrode disposed on the second protective layer and connected to the ground line through the second capacitor contact hole and made of a transparent conductive material; A third gate pad contact hole and a second gate pad contact hole, a second data pad contact hole, a second capacitor contact hole, and a second gate contact hole at a position corresponding to the entire surface of the substrate covering the first capacitor electrode; A third protective layer each having a third data pad contact hole, a third capacitor contact hole, and a third drain contact hole; A gate pad, a data pad, a first capacitor electrode, a drain electrode through the third gate pad contact hole, the third data pad contact hole, the third capacitor contact hole, and the third drain contact hole on the third passivation layer; An X-ray detector is connected to each other and includes a gate pad electrode, a data pad electrode, a second capacitor electrode, and a pixel electrode formed of the same material as the first capacitor electrode.

The silicon insulating material constituting the first protective layer is any one of a silicon nitride film (SiN _x ) and a silicon oxide film (SiO _x ), and the gate wiring material is a metal layer including aluminum (Al) as a lower layer. Molybdenum (Mo), nickel (Ni), chromium (Cr), tungsten (W) on the lower layer is characterized by consisting of a double metal layer having an upper layer.

In the same process as the first capacitor electrode, the same material is connected to the gate pad, the data pad, and the drain electrode through the second gate pad contact hole, the second data pad contact hole, and the second drain contact hole, respectively. And an auxiliary gate pad electrode, an auxiliary data pad electrode, and an auxiliary pixel electrode, wherein the transparent conductive material is indium tin oxide (ITO).

The gate and data pad electrodes may be connected to an external driving circuit, and further include a photoconductive film on the second capacitor electrode.

The transparent organic insulating material forming the second protective layer may be any one of benzocyclobutene (BCB) and an acrylic resin, and the material forming the third protective layer may be selected from an organic insulating material having a low dielectric constant. It is characterized by.

In still another aspect of the present invention, there is provided a method including forming a gate wiring on a substrate, the gate wiring being positioned in a first direction and including a gate electrode and a gate pad at one end thereof; Forming a gate insulating film on an entire surface of the substrate covering the gate wiring; Forming a semiconductor layer in which an active layer and an ohmic contact layer are sequentially formed at a position covering the gate electrode on the gate insulating layer; A data line including a source electrode and a data pad at one end thereof and positioned in a second direction crossing the first direction by using the same metal material on the semiconductor layer; and a data line in the second direction. Forming a ground line spaced apart from each other and a drain electrode spaced apart from the source electrode at a predetermined interval; Exposing an active layer in a section between the source and drain electrodes to form a channel using the source and drain electrodes as masks; The first gate pad contact hole, the first data pad contact hole, the first capacitor contact hole, and the first drain contact hole exposing the gate pad, the data pad, the ground wiring, and the drain electrode are partially disposed on the substrate on which the channel is formed. Forming a first protective layer each having a silicon insulating material; The second gate pad contact hole and the second gate pad contact hole and the first gate pad contact hole, the first data pad contact hole, the first capacitor contact hole, and the first drain contact hole are respectively positioned on the first passivation layer. Forming a second protective layer having a data pad contact hole, a second capacitor contact hole, and a second drain contact hole and made of a transparent organic insulating material; Forming a first capacitor electrode on the second passivation layer, the first capacitor electrode being connected to the ground line and formed of a transparent conductive material through the second capacitor contact hole; A third gate pad contact hole and a third data pad on a position corresponding to the second gate pad contact hole, the second data pad contact hole, the second capacitor contact hole, and the second drain contact hole on the first capacitor electrode. Forming a third passivation layer each having a contact hole, a third capacitor contact hole, and a third drain contact hole; A gate pad, a data pad, a first capacitor electrode, a drain electrode through the third gate pad contact hole, the third data pad contact hole, the third capacitor contact hole, and the third drain contact hole on the third passivation layer; A method of manufacturing an X-ray detector, the method comprising: forming a gate pad electrode, a data pad electrode, a second capacitor electrode, and a pixel electrode, each of which is connected to each other and made of the same material as the first capacitor electrode.

In the forming of the first capacitor electrode, an auxiliary gate pad electrode, an auxiliary data pad electrode, and an auxiliary pixel electrode connected through the second gate pad contact hole, the second data pad contact hole, and the second drain contact hole, respectively, are formed. And forming the auxiliary gate pad electrode, the auxiliary data pad electrode, and the auxiliary pixel electrode, respectively, with the gate pad electrode, the data pad electrode, and the pixel electrode.

The material forming the first protective layer may be any one of a silicon nitride film and a silicon oxide film. The transparent organic insulating material forming the second protective layer may be any one of benzocyclobutene (BCB) and acrylic resin. The material forming the third protective layer is an organic insulating material having a low dielectric constant value, and the transparent conductive material is ITO.

The gate and data pad electrodes may be connected to an external driving circuit by a tape automated bonding (TAB) bonding method using a tape carrier package (TCP), and a corresponding pattern of each step of the X-ray detector may be exposed. ), And is formed by photolithography, which includes development and etching.

The method may further include forming a photoconductive film on the second capacitor electrode by using an X-ray photosensitive material, and forming a conductive electrode on the photoconductive film, wherein the X-ray photosensitive material may include amorphous selenium (a Se, iodide mercury (HgI ₂ ), lead monoxide (PbO), tellurium cadmium (CdTe), selenium cadmium (CdSe), thallium bromide (Tl bromide), characterized in that any one of cadmium sulfide (cadmi um sulfide) do.

And, the first protective layer is characterized in that deposited to 500 ~ 1300 Å thickness.

The present invention is characterized by using a tape automated bonding (TAB) bonding method, which uses a tape carrier package (TCP) to bond an X-ray detector substrate to an external driving circuit using an anisotropic conductive film.

That is, the gate and data pads may be protected by connecting the pad electrode made of the transparent conductive material of the driving circuit unit and the X-ray detector by the TAB bonding method.

In addition, by using the above scheme, the gate and data buffer layers can be omitted, and the data pads can be formed integrally with the data lines, thereby reducing the number of mask processes.

Hereinafter, the configuration and operation according to the embodiment of the present invention will be described with reference to the accompanying drawings.

7 is a plan view corresponding to one pixel area of the X-ray detector according to the present invention, in which a gate line 204 having a gate pad 206 is formed at one end thereof in a first direction, and a data pad 218 at one end thereof. ) Is formed in a second direction defining a pixel region intersecting the first direction. In addition, a thin film transistor T is formed as a switching element at a portion where the gate and data lines 204 and 216 cross each other, and a ground line 220 extending in one direction and connected in common is arranged. The ground wiring 220 and the first capacitor electrode 238 are connected through the capacitor contact hole 228.

In addition, the second capacitor electrode 244 is formed at a position corresponding to the first capacitor electrode 238 to form the storage capacitor C _ST as the charge storage means with an insulating material interposed therebetween.

The first and second capacitor electrodes 238 and 244 may be made of a transparent conductive material.

Although not shown in the drawings, the second capacitor electrode 244 serves as a current collecting electrode that collects electric charges so that holes generated in the photoconductive film 14 of FIG. 1 may accumulate in the storage capacitor C _ST . .

Meanwhile, gate and data pad contact holes 230 and 224 are formed in the inner regions of the gate and data pads 206 and 218, and the gate and data are formed through the gate and data pad contact holes 230 and 224. Gate and data pad electrodes 240 and 234 connected to the pads 206 and 218 are formed.

Here, the second capacitor electrode 244 extends to the channel CH region of the thin film transistor T, which is formed by the inflow of charge concentrated on the second capacitor electrode 244 and X-ray light irradiation. To protect it.

In addition, holes stored in the storage capacitor C _ST move to the source electrode 212 through the drain electrode 214 and are processed in an external circuit (not shown) via the data line 216 to be imaged. Is displayed. The detailed operation thereof is the same as described with reference to FIG.

The gate and data pad electrodes 240 and 234 are made of the same material as the first and second capacitor electrodes 238 and 244.

That is, since the data pad 218 of the X-ray detector according to the present invention is integrally formed with the data line 216, and the data pad 218 is covered with the data pad electrode 234, the TAB process is performed by TCP. It is configured to be possible, and the same applies to the gate pad 206 portion.

Hereinafter, the present invention will be described in detail with reference to FIGS. 8A to 8H. 8A to 8H are cross-sectional views each showing a manufacturing process of a cross section cut in the VIIa-VIIa and VIIb-VIIb directions of FIG. 7.

In FIG. 8A, a gate wiring 204 including a gate electrode 202 and a gate pad 206 is formed by a first mask process after depositing a first metal.

The first metal is preferably a double metal layer including a lower metal layer including aluminum and an upper metal layer made of a metal having high chemical corrosion resistance such as molybdenum, nickel, chromium, and tungsten.

The reason why the first metal is used as a double metal layer is that aluminum has a low resistance in order to reduce the RC delay as the gate electrode 202 material, but pure aluminum has low chemical resistance and high temperature. Since it causes a wiring defect problem due to the formation of a hillock in the process, it is preferable to have a laminated structure as described above.

In the present invention, since the pad unit is connected to the driving circuit unit through a TAB process by TCP, a process of forming a separate gate and data buffer layer for raising the height of the pad unit may be omitted, and the lower aluminum layer of the gate pad unit may be exposed. A separate mask process can also be omitted.

In FIG. 8B, after successively depositing the first insulating material, the pure amorphous silicon layer, and the impurity amorphous silicon layer on the substrate having passed through FIG. 8A, the first insulating material is used as the gate insulating film 208, and the pure amorphous material is used. The silicon layer and the impurity amorphous silicon layer are formed as the active layer 210a and the ohmic contact layer 210b by the second mask process to form the semiconductor layer 210.

In forming the first insulating material from any one of an inorganic insulating material and an organic insulating material, the inorganic insulating material is preferably a silicon nitride film (Si ₃ N ₄ ), a silicon oxide film (Si0 ₂ ), and the like. As the organic insulating material, BCB, acrylic resin, or the like is preferable, and the deposition or coating thickness of such insulating material is preferably set to 100 kPa to 3000 kPa.

The present invention does not include a separate contact hole forming step in this step, and the contact hole process is simultaneously performed in the data pad forming step later, so that a separate mask process is not required.

In FIG. 8C, after depositing the second metal on the substrate having passed through FIG. 8B, a third mask process is performed to integrate the data pad 218 and the source electrode 212 of the thin film transistor T at one end. The data line 216 is formed, the drain electrode 214 is spaced apart from the source electrode 212, and the ground line 220 is formed in the pixel portion P.

Next, using the source and drain electrodes 212 and 214 as a mask, the ohmic contact layer 210b in the spaced apart interval between the source and drain electrodes 212 and 214 is etched to expose a part of the active layer 210a. By doing so, the channel CH is formed.

Alternatively, the ohmic contact layer 210b of the channel (CH) region may be patterned using the source and drain electrodes 212 and 214 as a photoresist (not shown) photomask, and the photoresist is not removed. It can also be etched.

In FIG. 8D, the first gate and data pad contacts exposing a portion of the gate and data pads 206 and 218 by a fourth mask process after depositing a second insulating material on the substrate having passed through FIG. 8C. First protective layer 222 having holes 230a and 224a, a first drain contact hole 226a and a first capacitor contact hole 228a exposing portions of the drain electrode 214 and the ground wiring 220. ) To form.

The second insulating material is formed by depositing an inorganic insulating material such as a silicon nitride film or a silicon oxide film by a predetermined method and having a thickness of 500 kPa to 1300 kPa.

As such, when the first protective layer 222, which is a layer directly contacting the active layer 210a of the channel CH portion, is formed of an inorganic insulating material, the active layer 210a and the inorganic insulating material have excellent contact characteristics. The area trapping electrons becomes smaller, and therefore, the result is that the mobility of electrons becomes faster. In addition, the isolation of the second protective layer formed of the organic insulating film and the active layer 210a can reduce the occurrence of leakage current.

In FIG. 8E, after the third insulating material is coated on the substrate having passed through FIG. 8D, the first gate and data pad contact holes (230a and 224a of FIG. 8D) and the first drain are formed by a fifth mask process. 8D and the second gate and data pad contact holes 230b and 224b and the second drain contact hole 226b respectively at positions corresponding to the first capacitor contact hole 228a of FIG. 8D, respectively. The second protective layer 232 having the second capacitor contact hole 228b is formed.

As the third insulating material, a material that is substantially transparent to light is used, and it is preferable to apply BCB or acrylic resin having excellent planarization characteristics and a dielectric constant of 3 or less to a thickness of 1 μm to 1.5 μm.

FIG. 8F illustrates the second gate and data pad contact holes (230b and 224b of FIG. 8E) and the second drain contact hole by depositing a transparent conductive material on the substrate having passed through FIG. 8E, and by a sixth mask process. (226b in FIG. 8E) and the first gate and data connected to the gate and data pads 206 and 218, the drain electrode 214, and the ground wiring 220 through the second capacitor contact hole (228b in FIG. 8E). The pad electrodes 240a and 234a, the auxiliary electrode 236, and the first capacitor electrode 238 are formed.

Examples of the transparent conductive material include ITO, indium tin zinc oxide (ITZO), and indium zinc oxide (IZO), of which ITO is most preferable.

In FIG. 8G, the second gate and data pad contact holes (230b and 224b of FIG. 8F) are formed by applying a fourth insulating material (deposition) on the substrate that has passed through FIG. 8F and then performing a seventh mask process. The third protective layer 242 having the third gate and data pad contact holes 230c and 224c and the third drain contact hole 226c at positions corresponding to the second drain contact hole 226b of FIG. 8F, respectively, is formed. Forming.

Since the fourth insulating material forms an insulator of the storage capacitor later by forming the second capacitor electrode, the fourth insulating material is preferably formed of an organic insulating material such as BCB having a small dielectric constant value.

In FIG. 8H, after the transparent conductive material is deposited on the substrate having passed through FIG. 8G, the third gate and data pad contact holes 230c and 224c and the third drain contact hole 226c are formed by an eighth mask process. ), Forming the gate and data pads 206 and 218, the second gate and data pad electrodes 240b and 234b and the second capacitor electrode 244 connected to the drain electrode 214.

The second capacitor electrode 244 is formed to overlap the first capacitor electrode 238 with the third protective layer 242 interposed therebetween.

In addition, the second capacitor electrode 244 may be formed to a region covering the channel CH of the thin film transistor T.

After the above step, the storage capacitor C _ST may be configured in the pixel portion P, and the second capacitor electrode 244 functions as a current collecting electrode that collects electric charges.

In this step, the gate and data pad electrodes 240 and 234 constituted by the first and second gate pad electrodes 240a and 240b and the first and second data pad electrodes 234a and 234b are completed.

In this case, the gate and data pad electrodes 240 and 234 may be formed as a single electrode layer in the step of forming the second capacitor electrode 244, but for the convenience and uniformity of the process, without the addition of a separate mask process It is preferable to comprise two layers as a 1st, 2nd electrode layer.

As such, since the X-ray detector according to the present invention may be manufactured by an eight mask process, the X-ray detector has an effect of shortening the mask process at least twice than the conventional one.

In addition, since the pad unit according to the present invention applies the TAB mounting technique by TCP, the gate and the data pad and the driving circuit unit are connected through the pad electrode, thereby preventing the loss of the gate and the data pad and Since it is formed integrally with the data line instead of being formed of a separate aluminum metal, the process for linking with the data line can be omitted.

Although the following process is not shown, the photosensitive material is applied, and the photosensitive material is used as a transducer which receives an external signal and converts it into an electrical signal. The compound of amorphous selenium (a-Se) is used by an evaporator. To a thickness of 100 μm to 500 μm. In addition, it has small external conductivity and low external conductivity such as mercury iodide (HgI ₂ ), lead monoxide (PbO), tellurium cadmium (CdTe), selenium cadmium (CdSe), thallium bromide, cadmium sulfide, etc. X-ray photosensitive materials that are sensitive to signals, especially X-ray photoconductors, may be used. When the photosensitive material is exposed to X-ray light, electrons and hole pairs are generated in the photosensitive material according to the intensity of the exposed light.

After the X-ray photosensitive material is applied, a transparent conductive electrode or a metal layer is formed as thin as high pressure electrode so that the X-ray light can be transmitted.

When the X-ray light is applied while applying a voltage to the conductive electrode, electrons and hole pairs formed in the photosensitive material are separated from each other, and holes separated by the conductive electrode are collected in the current collecting electrode and stored in the storage capacitor C _ST .

In the process as described above, the thin film transistor array substrate for the X-ray detector according to the present invention may be manufactured.

As described above, according to the X-ray detector and the manufacturing method thereof according to the present invention has the following effects.

First, as the insulating material in contact with the thin film transistor channel for the X-ray detector, by using a silicon insulating material which is an inorganic insulating film having excellent contact characteristics with the active layer forming the channel, carrier mobility in the thin film transistor channel is improved, That is, the operation characteristics are improved to provide high speed driving and high quality products.

Second, since the drive circuit can be mounted using the TAB method using TCP for the connection between the pad unit and the external drive circuit unit, the work efficiency is improved and the total manufacturing process number is omitted by omitting the mask process for the conventional wire bonding method. By shortening the production yield can be improved.

Third, since the TAB bonding process by TCP is the same process as that of a general liquid crystal display device, a production facility is not required separately.

Fourth, since the drive circuit is mounted in the TAB bonding method using TCP instead of the wire bonding method, the pads may be prevented from being damaged due to the wire bonding method.

Claims (20)

A gate wiring formed on the substrate in a first direction and having a gate electrode and a gate pad at one end thereof; A gate insulating film formed on an entire surface of the substrate covering the gate wiring; A semiconductor layer in which an active layer and an ohmic contact layer are sequentially formed on the gate insulating layer; A source and drain electrode formed in an area covering the semiconductor layer and spaced apart from each other by a predetermined distance, including the source electrode, formed in a second direction crossing the first direction, and including a data pad at one end; A data line and a ground line formed to be spaced apart from the data line in the second direction by a predetermined distance; A first gate pad contact hole, a first data pad contact hole, a first capacitor contact hole, and a first drain formed on an entire surface of the substrate covering the ground wire, and partially exposing the gate pad, the data pad, the ground wire, and the drain electrode. A first protective layer each having a contact hole and made of a silicon insulating material; A second gate pad contact hole disposed on the first passivation layer and corresponding to the first gate pad contact hole, the first data pad contact hole, the first capacitor contact hole, and the first drain contact hole; A second protective layer having a data pad contact hole, a second capacitor contact hole, and a second drain contact hole and made of a transparent organic insulating material; A first capacitor electrode disposed on the second protective layer and connected to the ground line through the second capacitor contact hole and made of a transparent conductive material; A third gate pad contact hole and a second gate pad contact hole, a second data pad contact hole, a second capacitor contact hole, and a second gate contact hole at a position corresponding to the entire surface of the substrate covering the first capacitor electrode; A third protective layer each having a third data pad contact hole, a third capacitor contact hole, and a third drain contact hole; A gate pad, a data pad, a first capacitor electrode, a drain electrode through the third gate pad contact hole, the third data pad contact hole, the third capacitor contact hole, and the third drain contact hole on the third passivation layer; A gate pad electrode, a data pad electrode, a second capacitor electrode, and a pixel electrode each made of the same material as the first capacitor electrode. X-ray detector comprising. The method of claim 1, The silicon insulating material forming the first protective layer is any one of a silicon nitride film (SiN _x ) and a silicon oxide film (SiO _x ). The method of claim 1, The gate wiring material includes a metal layer including aluminum (Al) as a lower layer, and an upper layer of any one of molybdenum (Mo), nickel (Ni), chromium (Cr), and tungsten (W) on the lower layer. X-ray detector consisting of a double metal layer. The method of claim 1, In the same process as the first capacitor electrode, the same material is connected to the gate pad, the data pad, and the drain electrode through the second gate pad contact hole, the second data pad contact hole, and the second drain contact hole, respectively. An X-ray detector including an auxiliary gate pad electrode, an auxiliary data pad electrode, and an auxiliary pixel electrode. The method of claim 1, The transparent conductive material is indium tin oxide (ITO) X-ray detector, characterized in that. The method of claim 1, And an external driving circuit connected to the gate and data pad electrodes. The method of claim 1, The X-ray detector further comprises a photoconductive film on the second capacitor electrode. The method of claim 1, The transparent organic insulating material forming the second protective layer is any one of BCB (benzocyclobutene) and acrylic resin (acrylic resin). The method of claim 1, The material forming the third protective layer is an X-ray detector selected from an organic insulating material having a low dielectric constant value. Forming a gate wiring on the substrate, the gate wiring being positioned in a first direction and including a gate electrode and a gate pad at one end thereof; Forming a gate insulating film on an entire surface of the substrate covering the gate wiring; Forming a semiconductor layer sequentially formed of an active layer and an ohmic contact layer at a position covering the gate electrode on the gate insulating layer; A data line including a source electrode and a data pad at one end thereof and positioned in a second direction crossing the first direction by using the same metal material on the semiconductor layer; and a data line in the second direction. Forming a ground line spaced apart from each other and a drain electrode spaced apart from the source electrode at a predetermined interval; Exposing an active layer in a section between the source and drain electrodes to form a channel using the source and drain electrodes as masks; The first gate pad contact hole, the first data pad contact hole, the first capacitor contact hole, and the first drain contact hole exposing the gate pad, the data pad, the ground wiring, and the drain electrode are partially disposed on the substrate on which the channel is formed. Forming a first protective layer each having a silicon insulating material; The second gate pad contact hole and the second gate pad contact hole and the first gate pad contact hole, the first data pad contact hole, the first capacitor contact hole, and the first drain contact hole are respectively positioned on the first passivation layer. Forming a second protective layer having a data pad contact hole, a second capacitor contact hole, and a second drain contact hole and made of a transparent organic insulating material; Forming a first capacitor electrode on the second passivation layer, the first capacitor electrode being connected to the ground line and formed of a transparent conductive material through the second capacitor contact hole; A third gate pad contact hole and a third data pad on a position corresponding to the second gate pad contact hole, the second data pad contact hole, the second capacitor contact hole, and the second drain contact hole on the first capacitor electrode. Forming a third passivation layer each having a contact hole, a third capacitor contact hole, and a third drain contact hole; A gate pad, a data pad, a first capacitor electrode, a drain electrode through the third gate pad contact hole, the third data pad contact hole, the third capacitor contact hole, and the third drain contact hole on the third passivation layer; Forming a gate pad electrode, a data pad electrode, a second capacitor electrode, and a pixel electrode respectively connected to each other and made of the same material as the first capacitor electrode; Method of manufacturing an x-ray detector comprising a. The method of claim 10, In the forming of the first capacitor electrode, an auxiliary gate pad electrode, an auxiliary data pad electrode, and an auxiliary pixel electrode connected through the second gate pad contact hole, the second data pad contact hole, and the second drain contact hole, respectively, are formed. And forming an auxiliary gate pad electrode, an auxiliary data pad electrode, and an auxiliary pixel electrode connected to the gate pad electrode, the data pad electrode, and the pixel electrode, respectively. The method of claim 10, The material forming the first protective layer is any one of a silicon nitride film and a silicon oxide film. The method of claim 10, The transparent organic insulating material forming the second protective layer is any one of BCB (benzocyclobutene), acrylic resin (acrylic resin) manufacturing method of the X-ray detector. The method of claim 10, The material forming the third protective layer is an organic insulating material having a low dielectric constant value of the X-ray detector manufacturing method. The method of claim 10, The transparent conductive material is ITO manufacturing method of the X-ray detector. The method of claim 10, The gate and the data pad electrode is connected to an external driving circuit by a tape automated bonding (TAB) bonding method by a tape carrier package (TCP). The method of claim 10, The corresponding pattern of each step of the X-ray detector is formed by a photolithography process (exposure), development (develop), etching (etching) comprising a photolithography method. The method of claim 10, Forming a photoconductive film on the second capacitor electrode by using an X-ray photosensitive material, and forming a conductive electrode on the photoconductive film. The method of claim 18, The X-ray photosensitive material is amorphous selenium (a-Se), mercury iodide (HgI ₂ ), lead monoxide (PbO), tellurium cadmium (CdTe), selenium cadmium (CdSe), thallium bromide (Tl bromide), cadmium sulfide (cadmi) um sulfide) any one of the x-ray detector manufacturing method. The method of claim 10, The first protective layer is a method of manufacturing an x-ray detector, characterized in that deposited to a thickness of 500 ~ 1300 Å.