KR20030057077A - manufacturing method of an array panel of liquid crystal display - Google Patents

Abstract

PURPOSE: A method for manufacturing an array substrate for an LCD(Liquid Crystal Display) device is provided to secure the uniformity of line width and to improve yield rate by preventing defects. CONSTITUTION: Gate lines(122) and gate electrodes are formed on a substrate(110). A gate insulating film(130) is formed on the gate lines and gate electrodes. An active layer(141) is formed on the gate insulating film. Ohmic contact layers are formed on the active layer. Data lines and source/drain electrodes are formed on the ohmic contact layer. A passivation layer is formed on the source/drain electrodes and the data lines. A pixel electrode connected with the drain electrode is formed on the passivation layer. The source/drain electrode is formed by depositing first to third metal films, forming a photoresist pattern on the third metal film, patterning the second and third metal films, removing the photoresist pattern, etching the patterned third metal film, and patterning the first metal film by using the second metal film as a mask.

Description

Manufacturing method of an array substrate for a liquid crystal display device

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to a manufacturing method of an array substrate for a liquid crystal display device.

Recently, with the rapid development of the information society, there is a need for a flat panel display having excellent characteristics such as thinning, light weight, and low power consumption. Among them, a liquid crystal display having excellent color reproducibility, etc. displays are actively being developed.

In general, a liquid crystal display device is formed by arranging two substrates having electrodes formed on one side thereof so that the surfaces on which the two electrodes are formed face each other, injecting a liquid crystal material between the two substrates, and then applying voltage to the two electrodes. By moving the liquid crystal molecules by the electric field is a device that represents the image by the transmittance of light that varies accordingly.

The lower substrate of the liquid crystal display is formed by repeating a process of forming a thin film and photolithography with an array substrate including a thin film transistor for applying a signal to a pixel electrode. The upper substrate is a substrate including a color filter. Three colors of red (R), green (G) and blue (B) are sequentially arranged, and are produced by methods such as pigment dispersion, dyeing, and electrodeposition.

Hereinafter, a structure of a general liquid crystal display device will be described with reference to the accompanying drawings.

1 is a cross-sectional view of a general liquid crystal display.

As illustrated, a gate electrode 12 made of a conductive material such as a metal is formed on the transparent first substrate 11, and a gate insulating film made of silicon nitride (SiN _x ) or silicon oxide (SiO ₂ ) is formed thereon. 13 covers the gate electrode 12. An active layer 14 made of amorphous silicon is formed on the gate insulating layer 13 on the gate electrode 12, and ohmic contact layers 15a and 15b made of amorphous silicon doped with impurities are formed thereon.

Source and drain electrodes 16a and 16b made of a conductive material such as a metal are formed on the ohmic contact layers 15a and 15b, and the source and drain electrodes 16a and 16b are formed together with the gate electrode 12. (T).

Subsequently, a passivation layer 17 made of a silicon nitride layer, a silicon oxide layer, or an organic insulating layer is formed on the source and drain electrodes 16a and 16b, and the passivation layer 17 has a contact hole 17c exposing the drain electrode 16b. .

A pixel electrode 18 made of a transparent conductive material is formed in the pixel area above the passivation layer 17, and the pixel electrode 18 is connected to the drain electrode 16b through the contact hole 17c.

Meanwhile, the second substrate 21 is disposed on the first substrate 11 and spaced apart from the first substrate 11 at a predetermined interval, and the black matrix 22 is disposed on the lower surface of the second substrate 21. ) Is formed at a position corresponding to the thin film transistor T. The black matrix 22 prevents light leakage from portions other than the pixel electrode 18, and the light enters the channel of the thin film transistor T. To prevent photo current from occurring. Under the black matrix 22, color filters 23a and 23b are formed to realize different colors. In the color filters 23a and 23b, the colors of red, green, and blue are sequentially repeated. It corresponds to one pixel area. The common electrode 24 made of a transparent conductive material is formed under the color filters 23a and 23b.

Next, the liquid crystal layer 30 is positioned between the pixel electrode 18 and the common electrode 24.

However, as the liquid crystal display device becomes larger and higher in size, the length of the wiring becomes longer and the width thereof becomes smaller, thereby increasing the probability of occurrence of signal delay. Therefore, in order to reduce the resistance of the wiring, the wiring must be formed using a low resistance material. Since the specific resistance of aluminum (Al) is relatively low, aluminum or an aluminum alloy material is used as the material of the wiring. Since aluminum is easily oxidized and weak due to chemicals, it is easily corroded, so that other metal materials are deposited together and used as a double layer or triple layer.

When the source and drain electrodes are formed of a triple layer, the first metal layer and the third metal layer may be formed of molybdenum (Mo), and the second metal layer may be formed of aluminum alloy (AlNd), wherein the first to third metals may be formed. When the film is etched together in one etchant, a galvanic phenomenon occurs and the desired wiring width is not obtained.

On the other hand, when the thickness of the lower first metal film is thicker than the thickness of the third metal film, the second metal film is not etched according to the pattern, so that a reverse taper phenomenon occurs, and the second metal film is settled in a subsequent process. It is in contact with the active layer or the ohmic contact layer. Accordingly, the characteristics of the thin film transistors are degraded, such as an increase in the leakage current, and defects are caused.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned conventional problems, and an object of the present invention is to improve the uniformity of the line width when the wiring is formed into multiple films, and to prevent the defects, thereby improving the yield. It is to provide a method for producing an array substrate for use.

1 is a cross-sectional view of a general liquid crystal display device.

2 is a plan view of an array substrate for a liquid crystal display according to an exemplary embodiment of the present invention.

3 is a cross-sectional view taken along line III-III of FIG. 2.

4A to 4E are cross-sectional views illustrating a manufacturing process of the array substrate according to the present invention.

5A to 5F are cross-sectional views illustrating a process of forming source and drain electrodes according to the present invention.

<Description of Symbols for Main Parts of Drawings>

110 substrate 122 gate electrode

130: gate insulating film 141: active layer

153 impurity semiconductor layers 162a and 162b source electrodes

163a and 163b: drain electrode

In the method for manufacturing an array substrate for a liquid crystal display device according to the present invention for achieving the above object, a gate wiring and a gate electrode are formed on a substrate, and a gate insulating film is formed thereon. Next, an active layer is formed on the gate insulating film, and an ohmic contact layer is formed on the active layer. Next, a multi-layer is formed on the ohmic contact layer, and data lines and source and drain electrodes defining pixel regions are formed to cross the gate lines. Next, a protective layer is formed on the data line and the source and drain electrodes, and a pixel electrode connected to the drain electrode is formed thereon. The forming of the source and drain electrodes may include depositing first to third metal layers, forming a photoresist pattern on the third metal layer, and using the photoresist pattern as a mask to form the second and third metal layers. Patterning a film, removing a photoresist pattern on the patterned third metal film, etching the entire patterned third metal film, and patterning the first metal film using the patterned second metal film as a mask. Steps.

In the present invention, the second metal film may be made of any one of aluminum and aluminum alloy, the first metal film may be made of chromium, and the third metal film may be made of molybdenum.

Meanwhile, the patterning of the second and third metal layers may be performed using an etchant including phosphoric acid, nitric acid, and acetic acid.

In addition, the entire surface etching of the third metal film may be performed using fruit trees, and the patterning of the first metal film may be performed using an etchant including nitric acid.

As described above, in the present invention, when the source and drain electrodes are formed of the triple layer, the photoresist pattern is formed, the second and third metal layers are patterned, the photoresist pattern is removed, the third metal layer is etched entirely, and the first metal layer is patterned. As a result, the line width can be secured and the defects can be reduced.

Hereinafter, an array substrate for a liquid crystal display according to an exemplary embodiment of the present invention and a manufacturing method thereof will be described in detail with reference to the accompanying drawings.

2 is a plan view of an array substrate for a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 3 is a cross-sectional view taken along line III-III of FIG. 2.

As illustrated, in the array substrate according to the present invention, a horizontal gate line 121 made of a metal material and a gate electrode 122 extending from the gate line 121 are formed on the insulating substrate 110.

Subsequently, a gate insulating film 130 formed of a silicon nitride film or a silicon oxide film is formed thereon to cover the gate wiring 121 and the gate electrode 122.

An active layer 141 made of amorphous silicon is formed on the gate insulating layer 130 on the gate electrode 122, and ohmic contact layers 151 and 152 made of amorphous silicon doped with impurities are formed thereon.

Next, a data line 161 formed of a metal material on the ohmic contact layers 151 and 152 and defining a pixel area orthogonal to the gate line, a source electrode 162 extending from the data line 161, and a gate electrode A drain electrode 163 facing the source electrode 162 is formed around the 122, and the source and drain electrodes 162 and 163 together with the gate electrode 122 form the thin film transistor T1. The data line 161 and the source and drain electrodes 162 and 163 are formed of multiple films.

Subsequently, a passivation layer 170 is formed on the data line 161 and the source and drain electrodes 162 and 163, and the passivation layer 170 has a contact hole 171 exposing the drain electrode 163.

Next, a pixel electrode 181 made of a transparent conductive material is formed in the pixel area on the passivation layer 170. The pixel electrode 181 is connected to the drain electrode 163 through the contact hole 171, and overlaps the gate wiring 121 to form a storage capacitor.

A manufacturing process of the array substrate according to the present invention will be described with reference to FIGS. 4A to 4E. 4A to 4E correspond to a cross section taken along line III-III of FIG. 2.

As shown in FIG. 4A, a metal material is deposited and patterned on the insulating substrate 110 to form the gate wiring 121 and the gate electrode 122.

Subsequently, as shown in FIG. 4B, the gate insulating layer 130 is formed, and the silicon layer doped with amorphous silicon and impurities doped is sequentially deposited and then patterned to form the active layer 141 on the gate electrode 122. And the impurity semiconductor layer 153 is formed.

Next, as shown in FIG. 4C, the first to third metal films are deposited and patterned by a sputtering method to form the source electrode 162 and the drain electrode 163, which will be described later. Next, the ohmic contact layers 151 and 152 are completed by etching the impurity semiconductor layer 153 of FIG. 4B exposed between the source electrode 162 and the drain electrode 163. At this time, a data line (not shown) connected to the source electrode 162 is also formed.

Next, as shown in FIG. 4D, an inorganic insulating film or an organic insulating film is deposited to form a protective film 170, and then patterned to form a contact hole 171 exposing the drain electrode 171.

Next, as illustrated in FIG. 4E, a transparent conductive material such as indium-tin-oxide is deposited and patterned to form the pixel electrode 181. Here, the pixel electrode 181 is connected to the drain electrode 163 through the contact hole 171 and overlaps the gate wiring 121.

As mentioned above, the process of forming the source and drain electrodes according to the present invention will be described with reference to FIGS. 5A to 5C.

First, as shown in FIG. 5A, the first to third portions are disposed on the substrate 110 on which the gate electrode 122, the gate insulating layer 130, and the active layer 141 and the impurity semiconductor layer 153 are sequentially formed. The metal films 160a, 160b, 160c are sequentially deposited. In this case, the first to third metal layers 160a, 160b, and 160c may be deposited by a sputtering method, and the first to third metal layers 160a, 160b, and 160c may each be 30 to 1,000 mW, It may be formed to a thickness of 1,000 to 3,000 kPa, and 30 to 1,000 kPa. Here, the second metal film 160b is made of an aluminum-neodymium (AlNd) alloy, and the first metal film 160a is for preventing the second metal film 160b from penetrating into the lower film. Cr). In addition, the third metal film 160c may be formed of molybdenum to improve contact resistance between the second metal film 160a and the pixel electrode.

Next, as shown in FIG. 5B, a photo-resist pattern 210 for forming source and drain electrodes is formed on the third metal layer 160c. The photoresist pattern 210 is formed by exposing and developing the photoresist after coating.

Next, as shown in FIG. 5C, the third metal film (160c of FIG. 5B) and the second metal film (160b of FIG. 5B) are patterned using the photoresist pattern 210 as a mask to form the second and third metal film patterns ( 162b, 162c, 163b, and 163c. In this case, the third metal layer 160c and the second metal layer 160b may be patterned by using an etchant including phosphoric acid, nitric acid, and acetic acid.

Subsequently, as illustrated in FIG. 5D, the photoresist pattern 210 is removed.

Next, as shown in FIG. 5E, the third metal film patterns 162c and 163c of FIG. 5D are etched to prevent the etching uniformity of the first metal film 160a from decreasing. In this case, the fruit may be etched using the fruit tree (H ₂ O ₂ ). The third metal film patterns 162c and 163c are not completely removed and form a thin film layer on the second metal film patterns 162b and 163b.

Next, as illustrated in FIG. 5F, the first metal film 160a of FIG. 5F is patterned using the second metal film patterns 162b and 163b as a mask to complete the source and drain electrodes 162a, 162b, 163a and 163b. do. Here, the first metal layer 160a is patterned by using an etchant containing nitric acid.

As described above, in the present invention, the source and drain electrodes can be formed in a triple film with uniform line width.

The present invention is not limited to the above embodiments, and various changes and modifications can be made without departing from the spirit of the present invention.

In the method of manufacturing an array substrate for a liquid crystal display device according to the present invention, after forming the photoresist pattern when forming the source and drain electrodes with the triple layer, patterning the second and third metal layers, the photoresist pattern is removed, and the third metal layer is etched entirely. Then, by patterning the first metal film, the line width can be secured and the defects can be reduced.

Claims (7)

Forming a gate wiring and a gate electrode on the substrate; Forming a gate insulating film on the gate wiring and the gate electrode; Forming an active layer on the gate insulating layer; Forming an ohmic contact layer on the active layer; Forming a data line, a source and a drain electrode on the ohmic contact layer, wherein the data line is formed of multiple layers and crosses the gate line to define a pixel area; Forming a protective layer on the data line and on the source and drain electrodes; Forming a pixel electrode connected to the drain electrode on the passivation layer, The forming of the source and drain electrodes may include depositing first to third metal films; Forming a photoresist pattern on the third metal layer; Patterning the second and third metal layers using the photoresist pattern as a mask; Removing the photoresist pattern on the patterned third metal layer; Etching the patterned third metal layer over the entire surface; And patterning the first metal film using the patterned second metal film as a mask. The method of claim 1, The second metal film is a manufacturing method of an array substrate for a liquid crystal display device comprising any one of aluminum and aluminum alloy. The method of claim 2, And said first metal film is made of chromium. The method of claim 3, wherein And said third metal film is made of molybdenum. The method of claim 4, wherein The patterning of the second and third metal layers may be performed using an etchant including phosphoric acid, nitric acid, and acetic acid. The method of claim 5, And etching the entire surface of the third metal layer using fruit trees. The method of claim 6, And patterning the first metal layer using an etchant containing nitric acid.