KR100698242B1 - Liquid Crystal Display Device And Fabricating Method Thereof - Google Patents

Abstract

The present invention relates to a liquid crystal display device and a method of manufacturing the same that can prevent the transmission of the light in the directional direction due to the misalignment of the liquid crystal.

     A liquid crystal display according to the present invention comprises: a storage capacitor formed on a lower substrate and including a gate line, a storage electrode, and a pixel electrode overlapping each other with a dielectric interposed therebetween; And a black matrix formed on the upper substrate facing the lower substrate and the liquid crystal, and overlapping at least half of the storage capacitor.

     Through the liquid crystal display and the method of manufacturing the same according to the present invention, the black matrix can be extended to the overlapping regions of the gate lines, the storage electrodes, and the pixel electrodes, thereby preventing the transmission of light in the directional direction, thereby improving image quality.

Description

Liquid crystal display device and manufacturing method therefor {Liquid Crystal Display Device And Fabricating Method Thereof}

1 is a plan view showing a liquid crystal display device formed of five conventional masks.

FIG. 2 is a cross-sectional view of a portion of the liquid crystal display shown in FIG. 1 taken along the line "A-A '"; FIG.

3 is a plan view showing a liquid crystal display device formed of four masks using a conventional mask for diffraction patterns.

FIG. 4 is a cross-sectional view of a portion of the liquid crystal display shown in FIG. 3 taken along the line "B-B '". FIG.

5 is a view showing a liquid crystal display device formed of four masks using a conventional half-turn mask.

FIG. 6 is a cross-sectional view illustrating a portion of the liquid crystal display shown in FIG. 5 taken along line "C-C '". FIG.

FIG. 7 is a cross-sectional view of a liquid crystal display showing a state in which the liquid crystal shown in FIG. 6 is injected;

8 is a cross-sectional view of a liquid crystal display showing a state in which a liquid crystal is injected into the liquid crystal display according to an embodiment of the present invention.

            <Description of Symbols for Main Parts of Drawings>

      1,31,61,91: Board 3,33,63: Data line

      5,35,65 source electrode 7,37,67 drain electrode

      9,39,59,79: Storage electrodes 11,41,71,101: Gate lines

      13,43,73: Data line 15,45,75: Contact hole

      17,47,77,107: Black matrix 19,49,79,109: Color filter

      21, 51, 81, 111: common electrode 23, 53: liquid crystal

      25, 55, 85, 115: gate insulating film 29, 59, 89, 119: pixel electrode

      30,60: protective film 57,87,117: active layer

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device and a method for manufacturing the same, and more particularly, to a liquid crystal display device and a method for manufacturing the same, which can improve image quality by preventing light transmission.

 The liquid crystal display device includes a switching element including a thin film transistor including a gate electrode, a gate insulating layer, an active layer, an ohmic contact layer, a source and a drain electrode, a lower plate on which a pixel electrode is formed, and an upper plate on which a color filter is formed. It consists of the injected liquid crystal.

1 is a plan view of a liquid crystal display device formed of five conventional masks.                         

FIG. 2 is a cross-sectional view illustrating a portion of the liquid crystal display shown in FIG. 1 taken along line "A-A '".

1 and 2, a plurality of color filters 19 for transmitting only light of a predetermined color and a black matrix 17 for blocking light transmission are formed on the upper plate of the liquid crystal display, and a voltage is applied to the liquid crystal. The common electrode 21 is formed. The color filter 19 is formed to correspond to the pixel region of the lower substrate 1b, and the black matrix 17 is formed to correspond to an area other than the pixel region.

In addition, in the case of the lower plate of the liquid crystal display device, aluminum (Al) or copper (Cu) or the like is deposited on the lower substrate 1b by sputtering or the like to form a metal thin film. The metal thin film is patterned by a photolithography method including a wet method to form the gate electrode 3 and the gate line 11 on the lower substrate 1b.

The gate insulating film 25, the active layer and the ohmic contact layer (not shown) that cover the gate line 11 and the gate electrode 3 on the lower substrate 1b are referred to as chemical vapor deposition (hereinafter referred to as "CVD"). To form sequentially.

The gate insulating layer 25 is formed by depositing an insulating material with silicon nitride or silicon oxide, and the active layer is formed of amorphous silicon or polycrystalline silicon that is not doped with impurities. In addition, the ohmic contact layer is formed of amorphous silicon or polycrystalline silicon doped with N-type or P-type impurities at a high concentration.

The ohmic contact layer and the active layer are patterned so that the gate insulating film 25 is exposed by a photolithography method including this method angle so that only the portion corresponding to the gate electrode 3 remains. At this time, the active layer and the ohmic contact layer are allowed to remain only in the portion corresponding to the gate electrode (3).

Molybdenum alloys such as molybdenum (Mo), MoW, MoTa, or MoNb are deposited on the gate insulating film 25 by a CVD method or a sputtering method to cover the ohmic contact layer. The deposited metal or metal alloy is in ohmic contact with the ohmic contact layer.

The metal or metal alloy is patterned by a photolithography method so that the gate insulating film 25 is exposed to form a data line 13 perpendicular to the gate line 5 and source and drain electrodes 5 and 7. At this time, the metal or metal alloy is patterned to remain to overlap the gate line 11 to form the storage electrode 9 of the storage capacitor. In the case of the storage capacitor, the storage electrode 9 becomes an upper electrode, the lower electrode of the gate line 11, and the gate insulating layer 25 becomes a dielectric layer.

In the above, the ohmic contact layer of the portion corresponding to the gate electrode 3 between the source and drain electrodes 5 and 7 is also patterned to expose the active layer. The portion corresponding to the gate electrode between the source and drain electrodes 5 and 7 of the active layer becomes a channel.

An inorganic insulating material such as silicon nitride or silicon oxide or an acrylic organic compound such as silicon nitride or silicon oxide, Teflon, BCB so as to cover the storage electrode 9, the source and drain electrodes 5, 7 on the gate insulating layer 25 A protective film 30 is formed by depositing an organic insulator having a low dielectric constant such as (benzocyclobutene), cytotope, or perfluorocyclobutane (PFCB). The protective layer 30 is patterned by photolithography to form first and second contact holes 15a and 15b exposing the drain electrode 7 and the storage electrode 9.

A transparent conductive material such as ITO, IZO, or ITZO is deposited on the passivation layer 30 through the first and second contact holes 15a and 15b to form the pixel electrode 29. The pixel electrode 29 contacts the storage electrode 9 through the second contact hole 15b and electrically contacts the drain electrode 7 through the first contact hole 15a.

However, in the case of using the gate electrode as aluminum in the five mask process, at least two masks are required to solve the problem of hillock that may occur on the aluminum surface. Therefore, at least five to six mask processes are required to construct the thin film transistor substrate.

As a result, the consumption and processing time of the raw materials used in each mask process are becoming a problem to reduce the yield as well as a high manufacturing cost in manufacturing a liquid crystal display device has been proposed a four mask process to solve this problem.

3 is a plan view showing a liquid crystal display device formed by a four mask process using a mask for diffraction pattern.

FIG. 4 is a cross-sectional view illustrating a portion of the liquid crystal display shown in FIG. 3 taken along the line "B-B '".

3 and 4, a plurality of color filters 49 for transmitting only light of a predetermined color and a black matrix 47 for blocking light transmission are formed on the upper plate of the liquid crystal display, and a voltage is applied to the liquid crystal. The common electrode 51 is formed. The color filter 47 is formed to correspond to the pixel area of the lower substrate 31b, and the black matrix 47 is formed to correspond to an area other than the pixel area.

In addition, the lower plate of the liquid crystal display device deposits a gate electrode 33 and a gate line 41 by depositing a metal on the lower substrate 31b. As the metal used to form the gate line 41 and the gate electrode 33, chromium (Cr), molybdenum (Mo) and the like may be generally used, and aluminum-neodium / molybdenum (AlNd / Mo), which is an aluminum metal, may be used. You can also use Since the aluminum-based metal used to form the gate line 41 has a small resistance, the RC delay of the signal flowing through the gate line 41 can be reduced. However, since the aluminum-based metal has a low corrosion resistance to chemicals, there is a problem in that disconnection defects occur due to etching erosion by an etching solution. Therefore, a metal such as molybdenum having high corrosion resistance to chemicals is used to prevent this problem. .

A gate insulating film 55, an active layer 57 having a semiconductor material (a-Si) and an amorphous silicon (n + Si) containing impurities deposited on the entire surface of the lower substrate 31b on which the gate line 41 and the like are formed; After depositing the source / drain metal successively, the pattern is patterned with a diffraction pattern, which is a second mask, to etch the active layer 57 and the gate insulating film 55, and to form the active layer 57 and the source / drain metal of the TFT. Is etched to remove the source / drain metal in the channel region to pattern the source / drain electrodes 35 and 37.

Here, in the photolithography process of the mask for diffraction pattern, after the photoresist is applied, the data line 43 and the TFT channel region are exposed and developed using the mask for diffraction pattern to form a photoresist pattern.                         

The photoresist partially exposed to the TFT channel region is removed through the photo etch back process of the photoresist in the RIE mode or the anisotropic etching mode, thereby patterning the source and drain electrodes 35 and 37.

In the third mask process, a process of forming the contact hole 45 by patterning the passivation layer 60 is formed, and the contact hole 45 is formed on the drain electrode 37. The contact hole 45 is for contact between the pixel electrode 59 and the drain electrode 37 formed later.

A transparent conductive metal such as ITO, IZO, or ITZO is deposited on the entire surface of the substrate on which the protective film 60 is patterned by the third mask process, and patterned with a fourth mask to form the pixel electrode 59. At this time, the pixel electrode 59 is in side contact with the exposed portion of the drain electrode 37.

However, in the case of the four mask process using the mask for diffraction pattern, since the diffraction pattern forms a narrower pattern than the optical wavelength, precision is required, so the process is difficult and the cost is high. In order to solve this problem, a four-mask process using a half-turn mask has been proposed.

5 is a plan view illustrating a liquid crystal display device formed by a four mask process using a half turn mask.

FIG. 6 is a cross-sectional view illustrating a portion of the liquid crystal display shown in FIG. 5 taken along the line "C-C '".

5 and 6, in the upper panel of the liquid crystal display, a plurality of color filters 79 for transmitting only light of a predetermined color and a black matrix 77 for blocking light transmission are formed and a voltage is applied to the liquid crystal. The common electrode 81 is formed. The color filter 79 is formed to correspond to the pixel area of the lower substrate 61b, and the black matrix 77 is formed to correspond to an area other than the pixel area.

In addition, the lower plate of the liquid crystal display device forms a metal thin film by depositing aluminum-nedium (AlNd) or molybdenum (Mo) on the lower substrate 61b by sputtering or the like. The metal thin film is patterned by a photolithography method including a wet method to form the gate electrode 63 and the gate line 71 on the lower substrate 61b. As the metal used to form the gate line 71 and the gate electrode 63, chromium (Cr), molybdenum (Mo) and the like may be generally used, and aluminum-neodium / molybdenum (AlNd / Mo), which is an aluminum metal, may be used. You can also use Since the aluminum-based metal used to form the gate line 71 has a small resistance, the RC delay of the signal flowing through the gate line 71 can be reduced. However, since the aluminum-based metal has a low corrosion resistance to chemicals, there is a problem in that disconnection defects occur due to etching erosion by an etching solution. Therefore, a metal such as molybdenum having high corrosion resistance to chemicals is used to prevent this problem. .

Chemical Vapor Deposition (CVD) of a gate insulating film 85, an active layer 87, an ohmic contact layer and a source / drain metal layer not shown to cover the gate line 71 and the gate electrode 63 on the lower substrate 61b. Vapor Deposition: Formed sequentially by "CVD").

The gate insulating layer 85 is formed by depositing an insulating material with silicon nitride or silicon oxide, the active layer 87 is formed of amorphous silicon or polycrystalline silicon without doping impurities, and the ohmic contact layer is N-type or P Type impurities are formed of highly doped amorphous silicon or polycrystalline silicon. In addition, the source / drain metal layer is formed of a molybdenum alloy (Mo alloy) such as molybdenum (Mo), MoW, MoTa, or MoNb.

The deposited source / drain metal layer is patterned by a photolithography method so that the active layer 87 is exposed to form data lines 73 and source and drain electrodes 75 and 77 perpendicular to the gate line 71. In this case, the source / drain metal layer is patterned to remain to overlap the gate line 71 to form the storage electrode 69 of the storage capacitor. Then, a portion of the ohmic contact layer is etched using the source / drain metal layer as a mask to reduce the leakage current.

Patterning is performed with a third mask to pattern a protective film (not shown). The third mask is a half-turn mask using a semi-transmissive film, and is composed of a blocking portion for blocking incident light, a semi-transmissive portion for transmitting a part of the incident light, and an open portion for transmitting almost all of the incident light.

An inorganic insulating material such as silicon nitride and silicon oxide or an organic insulating material containing benzocyclobutene and acryl resin is deposited on the active layer 87 to cover the above-described structure. A protective film is formed. The protective film is patterned to form a contact hole 75 exposing the drain electrode 67 of the TFT.

The side and upper portions of the source and drain electrodes 65 and 67 are exposed by etching the passivation layer. At this time, the active layer 39 located in all regions except for the portion where the passivation layer is patterned is simultaneously etched to form a source / drain. Electrodes 65 and 67 and active layer 87 are formed in a vertical structure.

A transparent conductive metal such as ITO, IZO, or ITZO is deposited on the entire surface of the substrate on which the protective film is formed, and patterned with a fourth mask to form the pixel electrode 89. At this time, the pixel electrode 89 is in side contact with the exposed portion of the drain electrode 67.

FIG. 7 is a cross-sectional view of a liquid crystal display showing a state in which liquid crystal is injected into the liquid crystal display shown in FIG. 6.

Referring to FIG. 7, the upper and lower plates are completed by applying an alignment layer to the front surfaces of the upper and lower substrates 61a and 61b of the liquid crystal display device. After the upper and lower plates are fixed and bonded, the liquid crystal 23 is injected. The liquid crystals 23 injected into the space between the upper plate and the lower plate are arranged in a structure having a predetermined pretilt in the space by the alignment state of the alignment film formed on the upper substrate and the lower substrate.

However, since the rubbing force is weakened at the overlapped steps when rubbing due to the overlap of the steps at the boundary between the gate line, the storage electrode, and the pixel electrode, the liquid crystal is hardly oriented. Due to the non-orientation of the liquid crystal, since light is transmitted in the egg direction in this portion, there is a disadvantage in that image quality is deteriorated.

Accordingly, an object of the present invention is to provide a liquid crystal display device and a method for manufacturing the same, which can prevent the transmission of light in the directional direction at portions overlapping the side surfaces of the gate line, the storage electrode, and the pixel electrode.

According to an aspect of the present invention, a liquid crystal display device includes: a storage capacitor formed on a lower substrate and including a gate line, a storage electrode, and a pixel electrode overlapping each other with a dielectric interposed therebetween; And a black matrix formed on the upper substrate facing the lower substrate and the liquid crystal, and overlapping at least half of the storage capacitor.
The black matrix is formed to overlap an edge where the gate line, the storage electrode, and the pixel electrode of the storage capacitor overlap.
The upper substrate includes a color filter formed with the black matrix interposed therebetween, a common electrode formed on the front surface of the color filter and the black matrix, the lower substrate includes a data line intersected with the gate line, And a thin film transistor formed at an intersection of the gate line and the data line.
The upper substrate and the lower substrate further include an alignment layer formed on a surface facing the liquid crystal.
According to an aspect of the present invention, there is provided a method of manufacturing a liquid crystal display device, the method including: forming a storage capacitor including a gate line, a storage electrode, and a pixel electrode overlapping each other with a dielectric interposed on a lower substrate; And forming a black matrix on the upper substrate facing the lower substrate and the liquid crystal so as to overlap at least half of the storage capacitor.
The black matrix is formed to overlap an edge where the gate line, the storage electrode, and the pixel electrode of the storage capacitor overlap.
According to an aspect of the present invention, there is provided a method of manufacturing a liquid crystal display, including forming a color filter on the upper substrate with the black matrix interposed therebetween; Forming a common electrode over the color filter and the black matrix; Forming a data line on the lower substrate to cross the gate line; The method may further include forming a thin film transistor at an intersection of the gate line and the data line.
The method of manufacturing a liquid crystal display according to the present invention further includes forming an alignment layer on a surface of the upper substrate and the lower substrate facing each other with the liquid crystal interposed therebetween.
Other objects and features of the present invention in addition to the above object will be apparent from the description of the embodiments with reference to the accompanying drawings.

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Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to FIG. 8.

8 is a cross-sectional view illustrating a liquid crystal display device according to an exemplary embodiment of the present invention.

Referring to FIG. 8, a plurality of color filters 109 for displaying red, green, and blue colors and a black matrix 107 for blocking transmission of light are formed on the upper plate of the liquid crystal display by transmitting light of a specific wavelength band. In addition, the common electrode 111 is formed on the color filters and applied to the liquid crystal. The color filter 109 is formed to correspond to the pixel region of the lower substrate 91b, and the black matrix 107 is formed at the edge of the gate line 101, the storage electrode 99, and the pixel electrode 119 in the storage capacitor region. It extends to the overlapping area of these.

In addition, the lower plate of the liquid crystal display device forms a metal thin film by depositing aluminum-nedium (AlNd) or molybdenum (Mo) on the lower substrate 91b by sputtering or the like. The metal thin film is patterned by a photolithography method including a wet method to form a gate electrode and a gate line 101 on the lower substrate 91b. As the metal used to form the gate line 101 and the gate electrode, chromium (Cr) and molybdenum (Mo) may be generally used, and aluminum-neodium / molybdenum (AlNd / Mo), which is an aluminum metal, may be used. have. Since the aluminum-based metal used to form the gate line 101 has a small resistance, the RC delay of the signal flowing through the gate line 101 can be reduced. However, since the aluminum-based metal has a low corrosion resistance to chemicals, there is a problem in that disconnection defects occur due to etching erosion by an etching solution. Therefore, a metal such as molybdenum having high corrosion resistance to chemicals is used to prevent this problem. .

Chemical Vapor Deposition: A gate insulating film 115, an active layer 117, an ohmic contact layer (not shown), and a source / drain metal layer are covered on the lower substrate 91b to cover the gate line 101 and the gate electrode. Hereinafter referred to as " CVD ".

The gate insulating film 115 is formed by depositing an insulating material with silicon nitride or silicon oxide, the active layer 117 is formed of amorphous silicon or polycrystalline silicon that is not doped with impurities, and the ohmic contact layer is an N type or a P type. Impurities are formed of highly doped amorphous silicon or polycrystalline silicon. In addition, the source / drain metal layer is formed of a molybdenum alloy (Mo alloy) such as molybdenum (Mo), MoW, MoTa, or MoNb.                     

The deposited source / drain metal layer is patterned by a photolithography method so that the active layer 117 is exposed to form a data line perpendicular to the gate line 101 and a source and drain electrode. In this case, the source / drain metal layer is patterned to remain to overlap the gate line 101 to form the storage electrode 99 of the storage capacitor. Then, a portion of the ohmic contact layer is etched using the source / drain metal layer as a mask to reduce the leakage current.

Patterning is performed with a third mask to pattern a protective film (not shown). The third mask is a half-turn mask using a semi-transmissive film, and is composed of a blocking portion for blocking incident light, a semi-transmissive portion for transmitting a part of the incident light, and an open portion for transmitting almost all of the incident light.

On the active layer 117, an inorganic insulating material such as silicon nitride or silicon oxide or an organic insulating material containing benzocyclobutene and acrylic resin are deposited to cover the above-described structure. A protective film is formed. The protective film is patterned to form a contact hole exposing the drain electrode of the TFT.

The side and upper portions of the source and drain electrodes are exposed by etching the passivation layer. At this time, the active layers located in all regions except for the portion where the passivation layer is patterned are simultaneously etched, so that the source / drain electrodes and the active layer 117 are vertical. It is formed into a structure.

A transparent conductive metal such as ITO, IZO, or ITZO is deposited on the entire surface of the substrate on which the protective film is formed, and patterned with a fourth mask to form the pixel electrode 119. At this time, the pixel electrode 119 is in side contact with the exposed portion of the drain electrode.

After the alignment layer is coated on the front surfaces of the upper substrate 91a and the lower substrate 91b of the liquid crystal display device formed as described above, a rubbing process is performed to complete the upper and lower plates. After the upper plate and the lower plate are fixed to each other, the liquid crystal 53 is injected. The liquid crystals 53 injected into the space between the upper plate and the lower plate are arranged in a structure having a predetermined pretilt in the space by the alignment state of the alignment film formed on the upper substrate and the lower substrate. As the alignment film, polyimide is generally used.

As described above, the liquid crystal display according to the present invention is formed by extending the black matrix in the storage capacitor region to an area where the edges of the gate line, the storage electrode, and the pixel electrode overlap, thereby blocking the transmitted light in the directional direction due to the misalignment of the liquid crystal. Can improve picture quality.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (8)

A storage capacitor formed on the lower substrate and including a gate line, a storage electrode, and a pixel electrode overlapping each other with a dielectric interposed therebetween; And a black matrix formed on the upper substrate facing the lower substrate with the liquid crystal interposed therebetween and overlapping at least half of the storage capacitor. According to claim 1, And the black matrix is formed to overlap an edge where the gate line, the storage electrode and the pixel electrode of the storage capacitor overlap. According to claim 1, The upper substrate includes a color filter formed with the black matrix interposed therebetween, and a common electrode formed on the color filter and the black matrix in front of the color filter. And the lower substrate includes a data line intersecting the gate line and a thin film transistor formed at an intersection of the gate line and the data line. The method of claim 3, wherein And the upper substrate and the lower substrate further include an alignment layer formed on a surface facing the liquid crystal. Forming a storage capacitor including a gate line, a storage electrode, and a pixel electrode overlapping each other with a dielectric interposed therebetween on a lower substrate; And forming a black matrix on the lower substrate and the upper substrate facing the liquid crystal to overlap at least half of the storage capacitor. The method of claim 5, And the black matrix is formed to overlap an edge where the gate line, the storage electrode, and the pixel electrode of the storage capacitor overlap each other. The method of claim 5, Forming a color filter on the upper substrate with the black matrix interposed therebetween; Forming a common electrode over the color filter and the black matrix; Forming a data line on the lower substrate to cross the gate line; And forming a thin film transistor at an intersection portion of the gate line and the data line. The method of claim 7, wherein And forming an alignment layer on a surface of the upper substrate and the lower substrate facing each other with the liquid crystal interposed therebetween.

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