KR20030020464A - A PCB having stepped structure - Google Patents
A PCB having stepped structure Download PDFInfo
- Publication number
- KR20030020464A KR20030020464A KR1020010052378A KR20010052378A KR20030020464A KR 20030020464 A KR20030020464 A KR 20030020464A KR 1020010052378 A KR1020010052378 A KR 1020010052378A KR 20010052378 A KR20010052378 A KR 20010052378A KR 20030020464 A KR20030020464 A KR 20030020464A
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- South Korea
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- pcb
- circuit board
- printed circuit
- layer
- stepped part
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Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4688—Composite multilayer circuits, i.e. comprising insulating layers having different properties
Abstract
Description
본 발명은 무선통신용 단말기에 장착되는 인쇄회로기판(PCB)에 관한 것으로, 특히 하나의 PCB로 두개의 PCB 효과를 나타낼 수 있는 단차를 갖는 인쇄회로기판에 관한 것이다.The present invention relates to a printed circuit board (PCB) mounted on a wireless communication terminal, and more particularly, to a printed circuit board having a step that can exhibit two PCB effects with one PCB.
일반적으로, PCB의 제조는 도1을 참조하여 간략히 설명하면 다음과 같다.In general, the manufacturing of the PCB is briefly described with reference to FIG. 1 as follows.
도1a는 IVH(Interstital Via Hole PCB) 6층의 예시도로서, 도면에 도시된 바와 같이, FR-4C 스테이지(1a)와 전해동박(1b)이 결합된 원단(1)을 3개층으로 적층하되, 상기 2층과 3층 및 4층과 5층 사이에 FR-4B 스테이지(2)를 삽입하여 적층시킨 후, 그에 층간 비아홀(via hole)(3)을 가공하고, 관통된 홀에 도금(4)을 한다. 그리고, 2층과 5층, 3층과 4층을 에칭하여 내층 회로 패턴을 형성하고, 적층된 원단(1)을 고온으로 압착하여 2층과 3층 4층과 5층 사이의 B스테이지의 프리 프레그(pre preg)를 C스테이지로 만들어 굳힌다. 다음에, 외층 드릴 가공을 하여 1층에서 6층까지 관통홀(5)을 형성하고, 그 홀에 도금(4)을 한 후 회로패턴을 만들고, 레지스터의 도포 및 실크인쇄후 금도금으로 표면처리하여 도1b와 같은 기판을 완성한다.FIG. 1A is an exemplary diagram of six layers of IVV (Interstital Via Hole PCB), and as shown in the drawing, the fabric 1 having the FR-4C stage 1a and the electrolytic copper foil 1b bonded thereto is laminated in three layers. After inserting and stacking the FR-4B stage 2 between the 2nd and 3rd layers, and the 4th and 5th layers, interlayer via holes 3 were processed therein, and the plated holes were plated 4. Do it. Then, the second and fifth layers, the third and fourth layers are etched to form an inner layer circuit pattern, and the laminated fabric 1 is pressed at a high temperature to free the B stage between the second and third and fourth and fifth layers. Pre preg to C stage to harden. Next, through-layer drilling is performed to form through-holes 5 from one to six layers, plating (4) on the holes, and then forming a circuit pattern, and coating the resist and surface-treating with gold plating after silk printing. Complete the substrate as shown in Figure 1b.
다른 예로서 도1c에 도시된 바와 같이 FR-4C 스테이지 원단(11)을 2개 적층하되, 그 사이에 FR-4B 스테이지(12)를 채운후, 상기 적층된 FR-4C 스테이지 원단(11) 상하단부에 동판(13a)을 씌운 에폭시(13)로 이루어진 RCC(Resin Coated Copper Foil)(13)를 적층시킨 후, 3층과 4층 사이를 FR-4B 스테이지(12)를 매개로 열압착한다. 그리고, 2층 내지 5층 사이에 관통홀을 가공한 후 도금을 하고, 2층과5층에 회로패턴을 구성하고, 상기 RCC(13)를 고압으로 열 압착한 후, 상기 RCC 외관 동박에 에칭으로 비아홀 부위를 부식시키고, 레이저로 비아홀을 가공한다. 다음에, 상기 레이저에 의해 생성된 미세 탄화물을 제거하고, 1층 내지 6층을 관통하는 관통홀을 형성한 후, 동 도금을 실시한다. 마지막으로, 1층과 6층에 회로패턴을 구성한 후, 레지스터를 도포하고, 금도금을 표면처리하여 완성한다.As another example, as shown in FIG. 1C, two FR-4C stage fabrics 11 are stacked, and the FR-4B stage 12 is filled therebetween, and then the FR-4C stage fabrics 11 are stacked. After laminating a Resin Coated Copper Foil (RCC) 13 made of an epoxy 13 covered with a copper plate 13a at the lower end, thermocompression bonding is performed between the third and fourth layers through the FR-4B stage 12. After the through holes are processed between the 2 to 5 layers, plating is performed, circuit patterns are formed on the 2 and 5 layers, and the RCC 13 is thermocompressed at high pressure, and then the RCC exterior copper foil is etched. The via hole is corroded and the via hole is laser processed. Next, fine carbide produced by the laser is removed, and through holes penetrating through one to six layers are formed, followed by copper plating. Finally, after the circuit patterns are formed on the first and sixth layers, a resistor is applied and the surface is gold plated to finish.
상기와 같이 제작되어 구성된 일반적인 PCB(14)는 평판형상을 가지며, 이러한 PCB가 도3에 도시된 바와 같이 무선통신 단말기의 LCD(15)와 배터리(16) 사이에 탑재되어 사용되고 있다. 그러나, 상기 단말기의 경우 두께를 최소화하려는 시도가 계속 진행중에 있으며, 또한 단말기의 외관을 소비자의 취향에 맞게 미려하게 할 필요성이 계속적으로 대두되고 있다. 따라서, 종래에는 단말기의 디자인이 굴곡이 진 형상을 가질 경우, 평판 PCB에 단차를 주어 탑재할 필요성이 있었으며, 이 경우에 도2에 도시된 바와 같이 두개의 하드 PCB를 커넥터로 연결하여 구성하였다. 그러나 상기 두개의 평판PCB를 커넥터로 연결하는 구조는 단말기의 두께가 두꺼워지는 요인으로 작용하고 있으며, 제품설계시 각각의 평판PCB에 회로패턴을 구현하고 이를 연결시켜야 하므로, 접속불량등을 유발하는 문제점을 내포하고 있었다.The general PCB 14 manufactured and configured as described above has a flat plate shape, and the PCB is mounted and used between the LCD 15 and the battery 16 of the wireless communication terminal as shown in FIG. However, in the case of the terminal, an attempt to minimize the thickness is ongoing, and there is a continuous need to enhance the appearance of the terminal to the taste of the consumer. Therefore, in the related art, when the design of the terminal has a curved shape, it was necessary to mount the flat PCB by giving a step, and in this case, two hard PCBs were connected to each other by a connector. However, the structure of connecting the two flat panel PCBs to the connector acts as a factor in the thickness of the terminal, and when designing a product, a circuit pattern must be implemented and connected to each flat panel PCB, causing problems in connection. Was implicated.
따라서, 본 발명은 상기와 같은 제반 문제점을 해결하기 위하여 안출된 것으로, FR-4에 전해동박이 구비된 원재료 자체에 단차가 형성되도록 가공한 후 그에 회로패턴을 구성함으로써 기존의 PCB를 두개 이상을 써야하는 것을 하나의 PCB로가능하도록 하였으며, 각종 PCB가 탑재되는 제품을 두께를 줄일 수 있는 단차를 갖는 인쇄회로기판을 제공함에 그 목적이 있다.Therefore, the present invention has been devised to solve the above problems, it is required to use two or more existing PCBs by forming a circuit pattern after processing to form a step in the raw material itself is equipped with an electrolytic copper foil in FR-4. The purpose of the present invention is to provide a printed circuit board having a step that can reduce the thickness of a product on which various PCBs are mounted.
도1a 내지 도1c는 일반적인 인쇄회로기판(PCB)의 제작공정을 나타낸 예시도.1A to 1C are exemplary views illustrating a manufacturing process of a general printed circuit board (PCB).
도2는 종래기술에 따른 이중 인쇄회로기판의 구성예시도.Figure 2 is an exemplary view of the configuration of a double printed circuit board according to the prior art.
도3은 평탄화된 인쇄회로기판이 단말기에 장착된 예시도.3 is an exemplary diagram in which a flattened printed circuit board is mounted on a terminal.
도4a 및 도4b는 본 발명에 따른 단차를 갖는 인쇄회로기판의 일실시예 구성을 나타낸 정면도 및 평면도.Figures 4a and 4b is a front view and a plan view showing an embodiment configuration of a printed circuit board having a step according to the present invention.
도5는 본 발명의 인쇄회로기판이 단말기에 장착된 예시도.5 is an exemplary diagram in which a printed circuit board of the present invention is mounted on a terminal.
* 도면의 주요 부분에 대한 부호의 설명* Explanation of symbols for the main parts of the drawings
21: 원단 21a: 단차부21: fabric 21a: stepped portion
22: FR-4C 23: 전해동박22: FR-4C 23: electrolytic copper foil
25: PCB 26: LCD25: PCB 26: LCD
27: 배터리27: battery
상기 목적을 달성하기 위한 본 발명은, 평탄면을 가지며, 그 소정부에 소정 기울기의 단차가 형성된 원단에 회로패턴을 구성하고, 이를 소정 층으로 적층하여 고온의 압력으로 압착한 후, 외곽층에 패턴이 구성된 수지코팅동박을 적층하여 제조된 단차를 갖는 인쇄회로기판을 제공한다.According to the present invention for achieving the above object, a circuit pattern is formed on a fabric having a flat surface, and a step of a predetermined slope is formed at a predetermined portion thereof, and the laminate is laminated in a predetermined layer and compressed at a high pressure. Provided is a printed circuit board having a step manufactured by laminating a resin coated copper foil having a pattern.
이하, 첨부된 도면을 참조하여 본 발명의 실시예를 상세히 설명하면 다음과 같다.Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.
본 발명에 의한 단차를 갖는 인쇄회로기판은 하나의 PCB로 두개의 PCB효과를 나타낼 수 있도록 구현한 것으로, 본 실시예에서는 도4a 및 도4b에 도시된 바와 같이 기판 원단(21)의 소정부에 소정 기울기의 단차(21a)를 형성하고, 이 단차진 원단을 소정층으로 적층한다. 여기서, 본 실시예에서는 적층(build up)방식에 사용되는 FR-4C 스테이지(22) 상하부에 전해 동박(23)이 부착된 원단이 사용된 예를 보여주고 있다. 상기 적층된 FR-4C 스테이지의 적층부 사이에는 FR-4B 스테이지를 이용하여 결합하고, 상기 적층된 원판에 비아홀과 관통홀을 형성하고 도금하는 등의 공정을 거쳐 회로패턴을 구성한다. 그 다음에 적층된 원단을 고온 열압으로 압착시킨 후, 다시 외곽층에 패턴이 구성된 수지코팅동박을 적층하여 제조한다.The printed circuit board having the step according to the present invention is implemented to show two PCB effects with one PCB. In this embodiment, as shown in FIGS. 4A and 4B, a predetermined portion of the substrate fabric 21 is shown. A step 21a of a predetermined slope is formed, and the stepped original fabric is laminated in a predetermined layer. Here, the present embodiment shows an example in which a fabric having an electrolytic copper foil 23 attached to upper and lower portions of the FR-4C stage 22 used in the build up method is used. A circuit pattern is formed by combining the stacked portions of the stacked FR-4C stages by using a FR-4B stage, forming a via hole, a through hole, and plating the stacked original plate. Then, the laminated fabric is pressed under high temperature and thermal pressure, and then, a resin coated copper foil having a pattern formed on the outer layer is laminated.
상기와 같은 일련의 제조과정에서 고온 열압으로 압착시에 사용되는 프레스를 원단과 동일하게 단차지도록 형성하여 최종제품의 PCB가 단차를 가지도록 한다.In the series of manufacturing processes as described above, the press used at the time of pressing at high temperature and thermal pressure is formed to be stepped with the fabric so that the PCB of the final product has a step.
도5는 본 발명의 단차진 PCB(25)를 단말기의 LCD(26)와 배터리(27) 사이에 탑재한 예를 보여주고 있다.5 shows an example in which the stepped PCB 25 of the present invention is mounted between the LCD 26 and the battery 27 of the terminal.
이상에서 설명한 본 발명은 전술한 실시예 및 첨부된 도면에 의해 한정되는 것이 아니고, 본 발명의 기술적 사상을 벗어나지 않는 범위 내에서 여러가지 치환, 변형 및 변경이 가능함은 본 발명이 속하는 기술분야에서 통상의 지식을 가진 자에게 있어 명백할 것이다.The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and various substitutions, modifications, and changes are possible within the scope without departing from the technical spirit of the present invention. It will be apparent to those who have knowledge.
전술한 바와 같은 본 발명에 따르면, 소정 기울기의 단차를 갖는 PCB를 각종 전자제품에 이용함으로써 두께와 원가절감을 이룰 수 있다.According to the present invention as described above, it is possible to achieve the thickness and cost reduction by using a PCB having a step of a predetermined slope for various electronic products.
즉, 예를들어 단말기의 경우, 두께를 고려하여 외형 디자인을 하게 되며, 또한 기존의 LCD와 배터리부가 평탄한 PCB를 사이에 두고 제작됨으로써 외형적인 변화를 주기가 어려웠으며, 또한 두께도 두꺼워진 단점이 있었는데, 이를 단차진 PCB를 이용함으로써 두께를 현저히 줄일 수 있을 뿐만 아니라, 단차효과를 주기 위해서 기존에는 두개의 PCB를 커넥터로 연결하여 사용하던 것을 하나의 단차진 PCB로 대체할 수 있으므로, 제조면에서 경제적인 이득을 얻을 수 있는 효과를 가진다.That is, for example, in case of a terminal, the external design is made in consideration of the thickness, and it is difficult to change the external appearance by making the existing LCD and the battery part with a flat PCB interposed therebetween. In addition, by using the stepped PCB, not only can the thickness be significantly reduced, but in order to give the step effect, it is possible to replace the one used by connecting two PCBs with the connector with one stepped PCB. It has the effect of obtaining economic benefits.
Claims (1)
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KR1020010052378A KR20030020464A (en) | 2001-08-29 | 2001-08-29 | A PCB having stepped structure |
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KR1020010052378A KR20030020464A (en) | 2001-08-29 | 2001-08-29 | A PCB having stepped structure |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2015102242A1 (en) * | 2014-01-06 | 2015-07-09 | 주식회사 엘지화학 | Stepped battery, and method and apparatus for manufacturing same |
KR101538272B1 (en) * | 2014-01-06 | 2015-07-22 | 주식회사 엘지화학 | Stepped battery, method for manufacturing the same, and device thereof |
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WO1988002978A1 (en) * | 1986-10-20 | 1988-04-21 | Fanuc Ltd | Multi-layer printed circuit board and a method of fabricating the same |
KR900006062Y1 (en) * | 1986-03-10 | 1990-06-30 | 알프스덴기 가부시기가이샤 | Magnetic head |
KR900013822A (en) * | 1989-02-23 | 1990-09-06 | 후지제록스 가부시끼가이샤 | Wiring board and its manufacturing method |
JPH06252530A (en) * | 1991-06-03 | 1994-09-09 | American Teleph & Telegr Co <Att> | Pattern etching method |
KR19990071099A (en) * | 1998-02-27 | 1999-09-15 | 윤종용 | Printed Circuit Board and Manufacturing Method |
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2001
- 2001-08-29 KR KR1020010052378A patent/KR20030020464A/en not_active Application Discontinuation
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
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KR900006062Y1 (en) * | 1986-03-10 | 1990-06-30 | 알프스덴기 가부시기가이샤 | Magnetic head |
WO1988002978A1 (en) * | 1986-10-20 | 1988-04-21 | Fanuc Ltd | Multi-layer printed circuit board and a method of fabricating the same |
KR900013822A (en) * | 1989-02-23 | 1990-09-06 | 후지제록스 가부시끼가이샤 | Wiring board and its manufacturing method |
JPH06252530A (en) * | 1991-06-03 | 1994-09-09 | American Teleph & Telegr Co <Att> | Pattern etching method |
KR19990071099A (en) * | 1998-02-27 | 1999-09-15 | 윤종용 | Printed Circuit Board and Manufacturing Method |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2015102242A1 (en) * | 2014-01-06 | 2015-07-09 | 주식회사 엘지화학 | Stepped battery, and method and apparatus for manufacturing same |
KR101538272B1 (en) * | 2014-01-06 | 2015-07-22 | 주식회사 엘지화학 | Stepped battery, method for manufacturing the same, and device thereof |
CN104904035A (en) * | 2014-01-06 | 2015-09-09 | 株式会社Lg化学 | Stepped battery, and method and apparatus for manufacturing same |
US9882233B2 (en) | 2014-01-06 | 2018-01-30 | Lg Chem, Ltd. | Stepped battery and method and device for manufacturing the same |
CN104904035B (en) * | 2014-01-06 | 2019-05-21 | 株式会社Lg化学 | Staged battery and its manufacturing method and its device |
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