KR20030003335A - Method for fabricating capacitor in semiconductor memory device - Google Patents

Abstract

PURPOSE: A method for fabricating a capacitor in a semiconductor memory device is provided to prevent a leakage current caused by adhesion of an adhesive layer to a high permittivity layer. CONSTITUTION: The first insulation layer, an etch stopping layer, and the second layer are stacked on a semiconductor substrate(201). The first insulation layer, the etch stopping layer, and the second layer are etched to form a hole. A adhesive layer is formed along the sidewall and bottom in the hole. A conductive layer for a lower electrode(211) of a capacitor is deposited according to the step coverage in the hole. A CMP is performed to expose the etch stopping layer. The high permittivity layer and the upper electrode(213) are formed in accord with the step coverage of the hole formed at the adhesive layer.

Description

Method for fabricating capacitor in semiconductor memory device

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a capacitor of a semiconductor device, and more particularly, to a process of manufacturing a capacitor having a concave structure.

As the degree of integration of semiconductor memory elements increases, the area of memory cells that store 1 bit, which is a basic unit of memory information, is decreasing. However, it is not possible to reduce the area of the capacitor in proportion to the shrinking of the cell, which is necessary for sensing signal margin, sensing speed, and durability against soft errors caused by α-particles. This is because a certain charging capacity is required per unit cell.

Therefore, the method for maintaining the capacity of the memory capacitor in a limited cell area more than the appropriate value is the first method of reducing the thickness of the dielectric, such as C = ε As / d (ε: dielectric constant, As: surface area, d: dielectric thickness), The second method is to increase the effective area of the capacitor, and the third method is to use materials with high dielectric constant.

Among them, a method of increasing the effective surface area (As) of a capacitor by using a three-dimensional structure such as a simple stack structure, a concave structure, a cylinder structure, and a multilayer pin structure has been developed. As a result, the internal space of the capacitors becomes smaller and the height continues to increase.

As a result, it is difficult to secure a desired capacitance only by considering the three-dimensional structure, and a dielectric film having a high dielectric constant has been applied. Current high dielectric constant films include Ta2O5, BaxSr1-xTiO3 (BST), StTiO3 (STO), and the like. In order to represent the required capacitance of the high-k film, it is essential to use noble metals such as Ru and Pt as storage nodes.

However, these metals are inferior in adhesion with an insulating film (for example, a silicon oxide film or a silicon nitride film) constituting a container of a storage node, and an application of an adhesive film is required. The most popular titanium nitride film (TiN) is used as an adhesive film. It is used.

1 is a cross-sectional view showing a capacitor of a concave structure manufactured according to the prior art.

Referring to FIG. 1, after forming the interlayer insulating film 102 on the semiconductor substrate 101, the interlayer insulating film 102 is connected to an active region (not shown) of the semiconductor substrate. A storage contact hole is formed. The contact hole is filled with polysilicon 103, titanium silicide 104, and TiN 105 to form a conductive plug.

Then, in order to form a storage node of the concave capacitor, a silicon oxide layer 106 and an silicon nitride layer 107 are formed as an etch barrier using an interlayer insulating layer, and the upper portion of the plug is selectively etched to form a storage node hole. Thereafter, the conductive layer on which the adhesive layer 109 and the lower electrode 111 are to be formed is deposited, and the lower electrode 111 and the adhesive layer 109 are etched until the silicon nitride film 107 is exposed to separate the neighboring electrodes. do.

Thereafter, the high dielectric constant film 112 and the upper electrode 113 are deposited and patterned on the lower electrode 111 pattern to complete a concave capacitor.

In the concave structure capacitor manufactured according to the prior art as described above, a portion in which TiN used as the adhesive layer 109 is bonded to the high dielectric constant film as in the portion A of FIG. 1 occurs, and although the contact area is small, subsequent thermal processes Through this process, leakage current increases in this area, which causes deterioration of the characteristics of the capacitor.

SUMMARY OF THE INVENTION An object of the present invention is to provide a capacitor manufacturing method suitable for preventing a leakage current caused by adhesion of an adhesive layer and a high dielectric constant film in manufacturing a capacitor of a semiconductor memory device.

1 is a cross-sectional view showing a capacitor of a concave structure manufactured according to the prior art.

2A to 2F are cross-sectional views of a manufacturing process of a concave capacitor according to a preferred embodiment of the present invention.

* Explanation of symbols for the main parts of the drawings

201: silicon substrate 202: interlayer insulating film

203: polysilicon plug 204: titanium silicide

205: titanium nitride 206: silicon oxide film

207: silicon nitride film 208: adhesive film

210: photosensitive film 211: lower electrode film

212: high dielectric constant film 213: upper electrode film

The present invention for achieving the above object, the step of laminating a first insulating layer, an etch stop layer and a second insulating layer on a substrate having a predetermined process; Etching the first insulating layer, the etch stop layer, and the second insulating layer to form holes; Forming an adhesive layer along the sidewall and the bottom to a predetermined height inside the hole; Depositing a conductive film for the lower electrode of the capacitor along the inner step of the hole on the adhesive layer and performing chemical mechanical polishing until the etch stop layer is exposed; And forming a high dielectric constant film and an upper electrode along the hole step in which the adhesive layer is formed.

The present invention deposits an adhesive film such as TiN, for example, inside a concave-type storage node, and removes the adhesive film on the upper surface portion of the substrate and the upper portion of the concave sidewall by photoresist coating and wet etching. The lower electrode film is formed on the adhesive film prepared above, and the high dielectric film is deposited to prevent direct contact between the adhesive film and the high dielectric film.

Hereinafter, preferred embodiments of the present invention will be introduced in order to enable those skilled in the art to more easily carry out the present invention.

2A through 2F are process cross-sectional views showing an embodiment of the present invention.

First, referring to FIG. 2A, a SiO 2 film is deposited on the silicon single crystal substrate 201 with an interlayer insulating film 202 in the range of 2000 GPa to 10000 GPa, and then contact holes are formed to the single crystal substrate using a photomask and anisotropic etching method. do. After depositing the polysilicon film containing impurity on the entire substrate where the contact hole is formed by chemical vapor deposition, the polysilicon film other than the contact hole is removed by the front etching method, and the polysilicon film inside the contact hole is 500Å to 1500Å from the contact hole inlet. Further front etching is performed to enter the depth to form a recessed contact plug 203.

The titanium film is deposited on the substrate and subjected to heat treatment to react with the silicon plug to form the titanium silicide 204 and to remove the unreacted titanium other than the contact hole by wet etching. Again, TiN is deposited on the entire substrate, and TiN other than the contact hole is removed using chemical mechanical polishing to finally form plugs (3, 4, 5).

Subsequently, referring to FIG. 2B, a silicon oxide film 206, a silicon nitride film 207, and a silicon oxide film 208 are sequentially stacked as an insulating film to form a container-type storage node on the contact plug.

Next, referring to FIG. 2C, a concave-shaped hole is formed on the contact plug by performing a photomask and anisotropic etching method, and then deposited with TiN or Ti using an adhesive film 209, and then a predetermined inside of the hole. The photosensitive film 210 is filled up to the height. At this time, the height of the photoresist film is adjusted to 50 to 200 kHz lower from the surface of the concave oxide film 206.

Next, referring to FIG. 2D, portions other than the adhesive film 209 protected by the photoresist film are removed, and then a Ru or Pt film is deposited on the lower electrode film 211.

Next, referring to FIG. 2E, a chemical mechanical polishing method is performed to remove the lower electrode layer outside the inside of the hole and separate it from the neighboring electrode, wherein the silicon nitride layer 207 serves as an etch stopping layer. Will be

Next, referring to FIG. 2F, Ta 2 O 5, Ba x Sr 1-x TiO 3 (BST), and StTiO 3 (STO) films are deposited on the entire substrate as a high-k dielectric film 212, and heat-treated at 500 ° C. to 800 ° C. in a nitrogen atmosphere by an electric furnace. After the deposition, the upper electrode film 213 of TiN, Ru, or Pt is deposited to complete the capacitor.

As a result, a capacitor which prevents a contact portion between the high dielectric constant film 212 and the titanium nitride used as the adhesive layer 209 as shown in part B of FIG. 2F is completed.

The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and various substitutions, modifications, and changes are possible in the art without departing from the technical spirit of the present invention. It will be apparent to those of ordinary knowledge.

The present invention relates to a method of manufacturing a capacitor of a semiconductor device, in manufacturing a capacitor having a concave structure, it is possible to prevent direct contact between the lower electrode film and the adhesive film has the effect of increasing the reliability of the device and increase the yield.

Claims (9)

Stacking a first insulating layer, an etch stop layer, and a second insulating layer on a substrate on which a predetermined process is completed; Etching the first insulating layer, the etch stop layer, and the second insulating layer to form holes; Forming an adhesive layer along the sidewall and the bottom to a predetermined height inside the hole; Depositing a conductive film for the lower electrode of the capacitor along the inner step of the hole on the adhesive layer and performing chemical mechanical polishing until the etch stop layer is exposed; And Forming a high dielectric constant film and an upper electrode along the hole step in which the adhesive layer is formed; Semiconductor capacitor manufacturing method comprising a. The method of claim 1, Stacking an adhesive layer along the hole and embedding a photoresist film to a predetermined height inside the hole; And And etching the removed adhesive layer not covered with the photoresist and removing the photoresist. The method according to claim 1 or 2, The adhesive film is a TiN or Ti film capacitor manufacturing method of a semiconductor device, characterized in that. The method according to claim 1 or 2, The lower electrode film is a Ru or Pt film manufacturing method of the capacitor of the semiconductor device, characterized in that. The method according to claim 1 or 2, The high dielectric constant film is a Ta2O5, SrTiO3 or BaxSr1-xTiO3 film is a capacitor manufacturing method of a semiconductor device, characterized in that consisting of one. The method according to claim 1 or 2, The upper electrode film is a capacitor manufacturing method of a semiconductor device, characterized in that made of one selected from Ru, Pt or TiN film. The method of claim 2, The height of the photosensitive film is a capacitor manufacturing method of the semiconductor device, characterized in that the buried in the range of 50 ~ 200 상부 from the top. The method according to claim 1 or 2, The substrate having the predetermined process is a semiconductor capacitor manufacturing method, characterized in that the capacitor contact plug is formed structure. The method of claim 9, The capacitor contact plug is a method of manufacturing a semiconductor capacitor, characterized in that the polycrystalline silicon, titanium silicide and silicon nitride containing the impurity is laminated.