KR20030000597A - Method for manufacturing capacitor in semiconductor device - Google Patents

Abstract

PURPOSE: A method for manufacturing a capacitor of a semiconductor device is provided to increase capacitance by effectively increasing surface area of a storage node electrode. CONSTITUTION: A first insulating layer(38) is formed on a semiconductor substrate(20) having a transistor. After forming a first nitride layer, a first contact hole is formed by sequentially etching the first nitride layer and the first insulating layer(38). A storage node plug(42) is formed into the first contact hole. A first oxide layer(52), a second nitride layer and a second oxide layer(56) are sequentially formed on the entire surface of the resultant structure. A capacitor structure is defined by selectively etching the second oxide layer(56), the second nitride layer and the first oxide layer(52). The second nitride layer is isotropically etched by using the first nitride layer as a target, thereby forming a bar-shaped nitride pattern(54a). Then, a conductive layer(60) as a storage node is formed on the resultant structure.

Description

METHODS FOR MANUFACTURING CAPACITOR IN SEMICONDUCTOR DEVICE

The present invention relates to a method of manufacturing a capacitor of a semiconductor device, and more particularly, to a method of manufacturing a capacitor of a semiconductor device capable of increasing the area of a storage node electrode.

In general, as the high integration of semiconductor devices increases, a fixed capacitance of a capacitor is required. To solve this problem, a method of using a material having a high dielectric constant of a capacitor, reducing the thickness of a dielectric film, or increasing the surface area of a lower electrode has emerged. As a solution to this problem, a method of increasing the surface area of the storage node electrode will be described.

Hereinafter, a method of manufacturing a capacitor of a conventional semiconductor device will be described with reference to the accompanying drawings.

1A to 1F are each step manufacturing process diagrams for explaining a method of manufacturing a capacitor of a conventional semiconductor device.

As shown in FIG. 1A, a silicon substrate 1 having an element isolation film 2 is provided. Then, the transistor 3 is formed on the silicon substrate 1 by a known method, and the first interlayer insulating film 4 is formed thereon. Subsequently, a plug polysilicon film 5 for forming a bit line and a storage node is formed on the interlayer insulating film 4. Next, a second interlayer insulating film 6 is formed on the entire surface of the substrate on which the plug polysilicon film 5 is formed, and the bit line tungsten plug film 7 and the bit line 8 are formed on the second interlayer insulating film 6. Form. Then, the capping nitride film 9 for preventing abnormal oxidation, for example, an SiN film, is deposited on the entire surface of the resultant on which the bit line 8 is formed.

Next, as shown in FIG. 1B, a third interlayer insulating film 10 is deposited over the capping nitride film 9. Subsequently, a contact hole 11 for a storage node is formed on the third interlayer insulating layer 10. Then, the plug polysilicon layer 12 is buried in the contact hole to form a storage node. Then, the nitride film 13 as an etch barrier is deposited on the entire surface of the resultant product in which the plug polysilicon film 12 is formed.

Next, as shown in FIG. 1C, a sacrificial oxide film 19 is deposited on the nitride film 13. Subsequently, a sacrificial oxide film 14 and a nitride film 13 are etched by forming a photoresist pattern (not shown) defining a capacitor region and using the photoresist pattern as an etch barrier so that the third interlayer insulating film 12 is exposed. do. As a result, a basic lower electrode structure for manufacturing the capacitor is formed.

Next, as shown in FIG. 1D, an amorphous polysilicon film, which is a conductive film 15 for a storage node, is deposited on the entire surface of the resultant product. Then, the buried oxide film 16 is deposited on the entire surface of the conductive film 15 for the storage node to fill the inside of the lower electrode structure.

Subsequently, as shown in FIG. 1E, the buried oxide film 16 and the storage node conductive film 15 are etched back in order to expose the top surface of the sacrificial oxide film 14.

Next, as shown in FIG. 1F, the buried oxide layer 16 is removed to form a cup-shaped storage node electrode 15a, and then both inside and outside of the storage node electrode 15a are used. In order to wet-etch the sacrificial oxide film 14 using a cell block open mask, a capacitor structure of a cylindrical cylinder structure is formed.

However, as the semiconductor device becomes ultra-highly integrated, cell capacitance decreases, and the decrease in capacitance reduces the refresh characteristics and sense amplifier characteristics of the semiconductor device.

Accordingly, an object of the present invention for solving the above problems is to provide a method for manufacturing a capacitor of a semiconductor device capable of efficiently expanding the surface area of the storage node electrode in order to secure the capacity of the cell capacitance.

1A to 1F are manufacturing process diagrams for explaining a capacitor manufacturing method of a conventional semiconductor device.

2A to 2G are manufacturing process diagrams for explaining a method for manufacturing a capacitor of a semiconductor device of the present invention.

Explanation of symbols on the main parts of the drawings

20 silicon substrate 21 device isolation film

22: first interlayer insulating film 25, 41: contact hole

30a: plug film for bit line 30b: plug film for storage node

32: second interlayer insulating film 33: tungsten plug film for bit line

34: metal film for bit line 34a: bit line

36 capping nitride film 38 first insulating film

40: second nitride film 42: storage node plug film

52: first oxide film 54: second nitride film

54a: nitride film in bar form 56; Second oxide film

60: conductive film for the storage node 65: bar formation space

100: storage node electrode

Capacitor manufacturing method of a semiconductor device of the present invention for achieving the above object comprises the steps of forming a first insulating film on a silicon substrate; Forming a first nitride film on the first insulating film; Etching the first nitride film and the first insulating film to form a contact hole; Forming a plug layer in the contact hole; Stacking and forming a first oxide film, a second nitride film, and a second oxide film on the plug film; Patterning the second oxide film, the second nitride film, and the first oxide film to define a capacitor structure; Isotropically etching the second nitride film by targeting the first nitride film; Forming a conductive film on the entire structure after the formation of the isotropically etched second nitride film; Etching the conductive layer to expose only the upper surface of the second oxide layer; Sequentially removing the second oxide film, the second nitride film, and the first oxide film to form a lower electrode; And forming a capacitor by forming a dielectric film and an upper electrode on the lower electrode.

Hereinafter, with reference to the accompanying drawings, preferred embodiments of the present invention will be described in detail.

2A to 2G are manufacturing process diagrams for explaining a method of manufacturing a capacitor of a semiconductor device according to an embodiment of the present invention.

First, as shown in FIG. 2A, a silicon substrate 20 having an isolation layer 21 is provided. Subsequently, the transistor 22 is formed on the silicon substrate 20. Although the process of forming the transistor 22 is not shown in the drawing, a gate having a laminated structure of a gate insulating film, a gate conductive film, and a nitride film as usual, and for forming lightly doped drain (LDD) regions on both sides of the gate Forming a source / drain region formed in the silicon substrate on both sides of the spacer and the gate.

Then, the first interlayer insulating film 24 is formed on the entire structure where the transistor 22 is formed. Next, a contact hole 25 exposing the source / drain regions of the transistor is formed in the first interlayer insulating layer 24 to form a storage node and a bit line node. Subsequently, a conductive film, preferably a plug polysilicon film, is formed in the contact hole 25 to form a bit line plug film 30a and a storage node plug film 30b.

Next, as shown in FIG. 2B, a second interlayer insulating film 32 having a predetermined thickness is formed on the plug polysilicon film. Then, a portion of the second interlayer insulating film 32 is etched to expose a predetermined portion of the bit line plug film 30a, and then the tungsten plug film 33 for bit line contacting the plug film 30a is buried. .

Subsequently, the bit line tungsten plug layer 33 is deposited on the entire surface of the resultant on which the bit line tungsten plug layer 33 is formed, and the bit line tungsten plug layer 33 is contacted with a bit line. Form. Then, the capping nitride film 36 for preventing abnormal oxidation, for example, an SiN film, is deposited on the entire surface where the bit line 34a is formed. Then, the first insulating film 38 is deposited on the capping nitride film 36.

Next, as illustrated in FIG. 2C, a first nitride layer 40 serving as an etch barrier is deposited on the first insulating layer 38. Subsequently, a portion of the first insulating layer 38, the first nitride layer 40, and the second interlayer insulating layer 32 is etched to form a contact hole 41 for forming a storage node, and then the contact hole 41. The storage node plug film 42 filling the gap is formed.

Subsequently, as illustrated in FIG. 2D, the first oxide film 52, the second nitride film 54, and the second oxide film 56 are sequentially stacked on the entire structure of the storage node plug film 42. Then, a photoresist pattern (not shown) defining a capacitor structure is formed on the second oxide film 56, and the second oxide film 56 and the second nitride film 54 are formed by using the photoresist pattern (not shown) as an etching mask. And the first oxide film 52 are sequentially etched to define the capacitor structure.

Next, as illustrated in FIG. 2E, the second nitride film 54 is etched with the target of removing the first nitride film 40 to form a nitride film 54a having a bar shape. In this case, the wet etching is preferably performed using phosphoric acid.

Subsequently, as shown in FIG. 2F, a conductive node 60 for storage node, preferably an amorphous silicon film having excellent step coverage, is deposited on the entire structure surface on which the bar-shaped nitride film 54a is formed. In particular, the bar forming space 65 is not buried.

Next, as shown in FIG. 2G, a side wall process of exposing only the upper surface of the second oxide film 56 is performed. Thereafter, the second oxide film 56, the bar nitride film 54a, and the first oxide film 53 are sequentially etched to form the storage node electrode 100. The storage node electrode 100 may increase cell capacitance by securing a maximum cross-sectional area within a limited area.

Hereinafter, although not shown in the drawings, a dielectric film and an upper electrode are typically formed on the storage node electrode 100 to manufacture a capacitor of a semiconductor device.

On the other hand, the present invention described above is not limited to the above-described embodiment and the accompanying drawings, it is possible in the technical field of the present invention that various substitutions, modifications and changes are possible without departing from the technical spirit of the present invention. It will be clear to those of ordinary knowledge.

According to the method for manufacturing a capacitor of the semiconductor device of the present invention described above, the cell capacitance can be increased by securing the maximum cross-sectional area of the storage node electrode within a limited area. Therefore, the refresh characteristics of the semiconductor element and the characteristics of the sense amplifier can be improved.

Claims (2)

Forming a first insulating film on the silicon substrate; Forming a first nitride film on the first insulating film; Etching the first nitride film and the first insulating film to form a contact hole; Forming a plug layer in the first contact hole; Stacking and forming a first oxide film, a second nitride film, and a second oxide film on the plug film; Patterning the second oxide film, the second nitride film, and the first oxide film to define a capacitor structure; Isotropically etching the second nitride film by targeting the first nitride film; Forming a conductive film on the entire structure after the formation of the isotropically etched second nitride film; Etching the conductive layer to expose only the upper surface of the second oxide layer; Sequentially removing the second oxide film, the second nitride film, and the first oxide film to form a lower electrode; And And forming a capacitor by forming a dielectric film and an upper electrode on the lower electrode. The method of claim 1, Isotropic etching of the second nitride film is a capacitor manufacturing method of a semiconductor device, characterized in that using phosphoric acid.