KR20020089828A - Liquid Crystal Display Device and Fabricating Method Thereof and Method of Reworking Polymer using the same - Google Patents
Liquid Crystal Display Device and Fabricating Method Thereof and Method of Reworking Polymer using the same Download PDFInfo
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- KR20020089828A KR20020089828A KR1020010028756A KR20010028756A KR20020089828A KR 20020089828 A KR20020089828 A KR 20020089828A KR 1020010028756 A KR1020010028756 A KR 1020010028756A KR 20010028756 A KR20010028756 A KR 20010028756A KR 20020089828 A KR20020089828 A KR 20020089828A
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1337—Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/133345—Insulating layers
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1337—Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers
- G02F1/133711—Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers by organic films, e.g. polymeric films
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- C—CHEMISTRY; METALLURGY
- C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
- C09K—MATERIALS FOR MISCELLANEOUS APPLICATIONS, NOT PROVIDED FOR ELSEWHERE
- C09K2323/00—Functional layers of liquid crystal optical display excluding electroactive liquid crystal layer characterised by chemical composition
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/906—Cleaning of wafer as interim step
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/963—Removing process residues from vertical substrate surfaces
Abstract
Description
본 발명은 액정표시소자 및 그 제조방법과 이를 이용한 배향막 재생방법에 관한 것으로, 특히, 배향막의 재생공정을 실행할 수 있는 액정표시소자 및 그 제조방법과 이를 이용한 배향막 재생방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, a method for manufacturing the same, and a method for reproducing an alignment film using the same.
통상, 액정표시소자(Liquid Crystal Display; LCD)는 전계를 이용하여 액정의 광투과율을 조절함으로써 화상이 표시된다. 이를 위하여, 액정표시소자는 액정셀들이 매트릭스 형태로 배열되어진 액정패널과, 이 액정패널을 구동하기 위한 구동회로를 구비하게 된다. 액정패널에는 액정셀들 각각에 전계를 인가하기 위한 화소전극들과 기준전극, 즉 공통전극이 마련되게 된다. 통상, 화소전극은 하부기판 상에 액정셀별로 형성되는 반면 공통전극은 상부기판의 전면에 일체화되어 형성된다. 화소전극들 각각은 스위칭소자로 사용되는 박막트랜지스터(Thin Film Transistor : TFT)에 접속된다. 화소전극은 TFT를 통해 공급되는 데이터신호에 따라 공통전극과 함께 액정셀이 구동된다.In general, a liquid crystal display (LCD) displays an image by adjusting the light transmittance of the liquid crystal using an electric field. To this end, the liquid crystal display device includes a liquid crystal panel in which liquid crystal cells are arranged in a matrix, and a driving circuit for driving the liquid crystal panel. The liquid crystal panel includes pixel electrodes for applying an electric field to each of the liquid crystal cells and a reference electrode, that is, a common electrode. In general, the pixel electrode is formed for each liquid crystal cell on the lower substrate, while the common electrode is integrally formed on the front surface of the upper substrate. Each of the pixel electrodes is connected to a thin film transistor (TFT) used as a switching element. The liquid crystal cell is driven along with the common electrode in accordance with the data signal supplied through the TFT.
도 1을 참조하면, 종래의 액정표시소자는 상부기판(11) 상에 순차적으로 형성된 블랙매트릭스(32)와 칼라필터(30) 및 투명전극(28)을 구성으로 하는 상판과, 하부기판(1) 상에 형성된 박막트랜지스터와 화소전극(22)을 구성으로 하는 하판과, 상판과 하판 사이에 형성된 스페이서(26)와, 상판 및 하판과 스페이서(26)에 의해 마련된 내부공간에 주입된 액정(38)을 구비한다. 상판에서 블랙매트릭스(32)는 상부기판(11) 상에 매트릭스 형태로 형성되어 상부기판(11)의 표면을 칼라필터(30)들이 형성되어질 다수의 셀영역들로 나눔과 아울러 인접 셀간의 광간섭을 방지하는 역할을 하게 된다. 이 블랙매트릭스(32)가 형성된 상부기판(1) 상에 적, 녹, 청 삼원색의 칼라필터(30)들이 순차적으로 형성된다. 이 경우, 삼원색의 칼라필터(30) 각각은 블랙매트릭스(32)가 형성된 상부기판(1)의 전면에 백색광원을 흡수하여 특정파장(적색, 녹색, 또는 청색)의 광만을 투과시키는 물질을 도포한 후패터닝함으로써 형성된다. 블랙매트릭스(32) 및 칼라필터(30)가 형성된 상부기판(1) 상에 그라운드 전위가 공급되는 투명도전막인 투명전극(28)을 도포하여 상판을 완성하게 된다. 하판에서 액정셀의 구동을 스위칭하는 박막트랜지스터는 도 2에 도시된 바와 같이 게이트라인(2) 및 데이터라인(4)의 교차부에 형성되며, 데이터라인(2) 및 게이트라인(4) 중 적어도 어느 하나에 중첩되는 화소전극(22)들은 매트릭스형태로 배열되어 하부기판(1) 상에 형성된다. 상세히 하면, 하부기판(1) 상에 금속막을 도포한 후 패터닝함으로써 도 3a에 도시된 바와 같이 게이트라인(2)과 게이트전극(6)이 형성된다. 게이트라인(2) 및 게이트전극(6)을 덮도록 하부기판 상에 전면 증착하여 게이트절연막(12)이 형성된다. 게이트절연막(12) 상에 제1 및 제2 반도체물질(14,16)을 순차적으로 증착한 후 패터닝함으로써 도 3b에 도시된 바와 같이 활성층(14)과 오믹접촉층(16)을 형성하게된다. 이어서, 게이트절연막(12) 상에 금속막을 도포한 후 패터닝함으로써 도 3c에 도시된 바와 같이 데이터라인(4), 소스전극(8) 및 드레인전극(10)을 형성한 후, 소정크기의 채널을 형성하기 위해 오믹접촉층(16)을 식각하여 활성층(14)이 노출되도록 한다. 그리고, 게이트절연막 상에 유기물 보호막(18)을 스핀코팅에 의해 표면이 평탄하게 증착한 후 패터닝함으로써 도 3d에 도시된 바와 같이 드레인전극(10)이 노출되도록 접촉홀(20)이 형성된다. 다음, 보호층(18)상에 투명전도성물질을 도포하여 패터닝함으로써 도 3e에 도시된 바와 같이 드레인전극(10)과 전기적으로 접속되는 화소전극(22)이 형성된다. 화소전극(22)이 형성된 하부기판(1)의 전면에 배향막(24)을 도포한 후 러빙공정을 수행하여 하판이 완성된다.끝으로, 전술한 바와 같이 별도로 만들어진 상판과 하판을 정위치시켜 합착한 후 구형상의 스페이서(26)를 산포한 후 액정을 주입하여 봉지함으로써 액정표시소자를 완성하게 된다.Referring to FIG. 1, a liquid crystal display device according to the related art includes a top plate including a black matrix 32, a color filter 30, and a transparent electrode 28 sequentially formed on an upper substrate 11, and a lower substrate 1. The liquid crystal 38 injected into the inner space provided by the lower plate including the thin film transistor and the pixel electrode 22 formed on the upper layer, the spacer 26 formed between the upper plate and the lower plate, and the upper plate and the lower plate and the spacer 26. ). In the upper plate, the black matrix 32 is formed in a matrix form on the upper substrate 11 to divide the surface of the upper substrate 11 into a plurality of cell regions in which the color filters 30 are to be formed, as well as optical interference between adjacent cells. It will act to prevent. On the upper substrate 1 on which the black matrix 32 is formed, color filters 30 of red, green, and blue primary colors are sequentially formed. In this case, each of the three primary color filters 30 absorbs a white light source on the front surface of the upper substrate 1 on which the black matrix 32 is formed and applies a material that transmits only a specific wavelength (red, green, or blue) light. It is formed by post-patterning. On the upper substrate 1 on which the black matrix 32 and the color filter 30 are formed, a transparent electrode 28, which is a transparent conductive film to which a ground potential is supplied, is coated to complete the top plate. A thin film transistor for switching the driving of the liquid crystal cell in the lower plate is formed at the intersection of the gate line 2 and the data line 4 as shown in FIG. 2, and at least one of the data line 2 and the gate line 4. The pixel electrodes 22 overlapping any one are arranged in a matrix and formed on the lower substrate 1. In detail, the gate line 2 and the gate electrode 6 are formed by coating and patterning a metal film on the lower substrate 1 as shown in FIG. 3A. The gate insulating film 12 is formed by entirely depositing on the lower substrate so as to cover the gate line 2 and the gate electrode 6. By sequentially depositing and patterning the first and second semiconductor materials 14 and 16 on the gate insulating layer 12, the active layer 14 and the ohmic contact layer 16 are formed as shown in FIG. 3B. Subsequently, a metal film is coated on the gate insulating film 12 and then patterned to form the data line 4, the source electrode 8, and the drain electrode 10, as shown in FIG. 3C. To form the ohmic contact layer 16 is etched so that the active layer 14 is exposed. The contact hole 20 is formed so that the drain electrode 10 is exposed as shown in FIG. 3D by depositing and patterning the surface of the organic protective film 18 evenly by spin coating the gate insulating film. Next, a transparent conductive material is applied and patterned on the protective layer 18 to form a pixel electrode 22 electrically connected to the drain electrode 10 as shown in FIG. 3E. After the alignment layer 24 is applied to the entire surface of the lower substrate 1 on which the pixel electrode 22 is formed, a rubbing process is performed to complete the lower plate. Finally, the upper and lower plates separately formed as described above are aligned and bonded together. After that, the spherical spacers 26 are dispersed, and then liquid crystal is injected and sealed to complete the liquid crystal display device.
이러한 액정표시소자의 보호막(18)을 형성한 후 다음공정인 화소전극(22)을 형성하기 위한 대기시간이 길어지면 보호막(18)은 오랜 시간 방치된다. 이렇게 방치된 보호막(18) 표면에는 대기 중에 노출된 오염물질이 흡착된다. 이로 인해 배향막(24)이 형성된 하판을 테스트한 결과, 도 4에 도시된 바와 같이 불량도포된 배향막(36)이 발생하면 배향막(24)을 재생하는 공정이 수행된다. 배향막(24)을 재생하기 위해 건식식각을 이용하여 불량도포된 배향막(36)이 제거된다. 즉, 불량배향막(36)이 도포된 하판을 챔버내에 장착하고 챔버내에 O2, O2+Cl2, CF4, SF6가스 등을 주입하여 플라즈마 방전을 일으키게 된다. 그러면 주입가스와 불량도포된 배향막(24) 간에 반응이 일어나면서 배향막(24)이 전면 식각된다. 그러나, 불량도포된 배향막(24)과 보호층(18)과의 건식식각비가 없어 도 5에 도시된 바와 같이 불량도포된 배향막(24)과 동일한 유기막계열인 보호막(18)이 과식각되는 현상(A)이 나타난다. 이로 인해 배향막(24)의 재생공정을 할 수 없으므로 수율 및 생산성이 떨어지는 문제점이 있다.After forming the passivation layer 18 of the liquid crystal display device, if the waiting time for forming the pixel electrode 22 which is the next process becomes long, the passivation layer 18 is left for a long time. The contaminants exposed to the atmosphere are adsorbed on the surface of the protective film 18 thus left. As a result, as a result of testing the lower plate on which the alignment layer 24 is formed, a process of regenerating the alignment layer 24 is performed when a poorly coated alignment layer 36 is generated as shown in FIG. 4. The uncoated alignment film 36 is removed using dry etching to regenerate the alignment film 24. That is, the lower plate coated with the defective alignment layer 36 is mounted in the chamber, and the plasma discharge is caused by injecting O 2 , O 2 + Cl 2 , CF 4 , SF 6 gas, or the like into the chamber. Then, a reaction occurs between the injection gas and the poorly coated alignment layer 24, and the alignment layer 24 is etched entirely. However, there is no dry etching ratio between the poorly coated alignment layer 24 and the protective layer 18, and as shown in FIG. 5, the protective layer 18, which is the same organic film series as the poorly coated alignment layer 24, is overetched. (A) appears. For this reason, since the regeneration process of the alignment film 24 cannot be performed, there exists a problem that a yield and productivity fall.
따라서, 본 발명의 목적은 배향막의 재생공정을 실행할 수 있는 액정표시소자 및 그 제조방법과 이를 이용한 배향막 재생방법을 제공하는데 있다.Accordingly, it is an object of the present invention to provide a liquid crystal display device capable of carrying out a regeneration process of an alignment film, a method of manufacturing the same, and a method of reproducing an alignment film using the same.
도 1은 종래의 액정표시소자를 나타내는 단면도.1 is a cross-sectional view showing a conventional liquid crystal display device.
도 2는 도 1에 도시된 액정표시소자의 하부기판을 나타내는 평면도.FIG. 2 is a plan view illustrating a lower substrate of the liquid crystal display shown in FIG. 1.
도 3a 내지 도 3e는 도 2에서 선 "A-A'"를 따라 절취한 액정표시소자의 하부기판 제조방법을 나타내는 단면도.3A to 3E are cross-sectional views illustrating a method of manufacturing a lower substrate of a liquid crystal display device taken along a line "A-A '" in FIG.
도 4는 도 1에 도시된 배향막의 도포불량현상을 나타내는 단면도.4 is a cross-sectional view illustrating a coating failure of the alignment layer illustrated in FIG. 1.
도 5는 도 4에 도시된 보호막의 과식각현상을 나타내는 단면도.FIG. 5 is a cross-sectional view illustrating an over-etching phenomenon of the protective film shown in FIG. 4.
도 6은 본 발명의 실시예에 따른 액정표시소자의 단면도.6 is a cross-sectional view of a liquid crystal display device according to an embodiment of the present invention.
도 7a 내지 도 7e는 도 6에 도시된 액정표시소자의 제조방법을 단계적으로 나타내는 단면도.7A to 7E are cross-sectional views illustrating a method of manufacturing the liquid crystal display device shown in FIG.
도 8은 도 6에 도시된 액정표시소자의 배향막 도포불량현상을 나타내는 단면도.FIG. 8 is a cross-sectional view illustrating a coating failure of the alignment layer of the liquid crystal display shown in FIG. 6.
도 9는 도 8에 도시된 불량도포된 배향막을 제거한 후의 배향막이 재생된 액정표시소자를 나타내는 단면도.FIG. 9 is a cross-sectional view of a liquid crystal display device in which an alignment film after the defective coating layer shown in FIG. 8 is removed.
도 10은 도 9에 도시된 액정표시소자의 배향막 재생공정을 나타내는 단면도.FIG. 10 is a cross-sectional view showing an alignment film regeneration process of the liquid crystal display shown in FIG. 9; FIG.
< 도면의 주요 부분에 대한 부호의 설명 ><Description of Symbols for Main Parts of Drawings>
1,51 : 하부기판2,52 : 게이트라인1,51: lower substrate 2,52: gate line
4,54: 데이터라인6,56 : 게이트전극4,54 data line 6,56 gate electrode
8,58 : 소스전극10,60 : 드레인전극8,58 source electrode 10,60 drain electrode
11 : 상부기판12,62 : 게이트절연막11: upper substrate 12, 62: gate insulating film
14,64 : 활성층16,66 : 오믹접촉총14,64: active layer 16,66: ohmic contact gun
18,68,84 : 보호막20,70 : 접촉홀18,68,84: protective film 20,70: contact hole
22,72 : 화소전극24,74 : 배향막22,72 pixel electrode 24,74 alignment film
26 : 스페이서28 : 투명전극26 spacer 28 transparent electrode
30 : 칼라필터32 : 블랙매트릭스30: color filter 32: black matrix
38 : 액정38: liquid crystal
상기 목적을 달성하기 위하여 본 발명에 따른 액정표시소자는 기판 상에 형성되는 유기절연막과, 상기 유기절연막 상에 형성되는 배향막과, 상기 배향막과 다른 식각조건을 가지며 상기 배향막과 상기 유기절연막 상에 형성되는 질화실리콘층을 구비한다.In order to achieve the above object, a liquid crystal display device according to the present invention has an organic insulating film formed on a substrate, an alignment film formed on the organic insulating film, and an etching condition different from that of the alignment film, and is formed on the alignment film and the organic insulating film. And a silicon nitride layer.
상기 배향막은 재생공정시 건식식각으로 제거되는 것을 특징으로 한다.The alignment layer may be removed by dry etching during a regeneration process.
상기 건식식각은 SF6, O2, O2+Cl2, CF4등의 혼합가스를 이용하는 것을 특징으로 한다.The dry etching is characterized in using a mixed gas, such as SF 6 , O 2 , O 2 + Cl 2 , CF 4 .
상기 혼합가스의 비율은 SF6: O2= 1:50이상인 것을 특징으로 한다.The ratio of the mixed gas is characterized in that SF 6 : O 2 = 1:50 or more.
상기 혼합가스의 비율은 SF6: O2= 1:70 이상인 것을 특징으로 한다.The ratio of the mixed gas is characterized in that SF 6 : O 2 = 1:70 or more.
상기 식각시 사용되는 고주파 파워(RF power)는 약 500~1500W정도인 것을 특징으로 한다.The high frequency power (RF power) used during the etching is characterized in that about 500 ~ 1500W.
상기 유기보호막 하부에 형성되는 박막트랜지스터는 상기 기판 상에 형성되는 게이트전극 및 게이트라인과, 상기 기판 상에 형성되는 게이트절연막과, 상기 게이트절연막 상에 상기 게이트전극과 대응되게 형성되는 반도체층과, 소정 크기의 채널을 사이에 두고 상기 게이트절연막 상에 형성되는 소스 및 드레인전극을 구비한다.The thin film transistor formed under the organic passivation layer may include a gate electrode and a gate line formed on the substrate, a gate insulating film formed on the substrate, a semiconductor layer formed on the gate insulating film to correspond to the gate electrode; Source and drain electrodes are formed on the gate insulating layer with a channel having a predetermined size therebetween.
상기 드레인전극과 전기적으로 접촉되도록 화소전극을 추가로 구비하며, 상기 화소전극은 상기 데이터라인 및 게이트라인 중 적어도 어느 하나에 중첩되게 형성되는 것을 특징으로 한다.A pixel electrode is further provided to be in electrical contact with the drain electrode, and the pixel electrode is formed to overlap at least one of the data line and the gate line.
상기 목적을 달성하기 위하여, 본 발명에 따른 액정표시소자의 제조방법은 기판 상에 유기절연막을 형성하는 단계와, 상기 유기절연막 상에 배향막을 형성하는 단계와, 상기 배향막과 다른 식각조건을 가지며 상기 배향막과 상기 유기절연막 상에 질화실리콘층을 형성하는 단계를 포함한다.In order to achieve the above object, a method of manufacturing a liquid crystal display device according to the present invention comprises the steps of forming an organic insulating film on the substrate, forming an alignment film on the organic insulating film, and having an etching condition different from the alignment film Forming a silicon nitride layer on the alignment layer and the organic insulating layer.
상기 배향막은 재생공정시 건식식각으로 제거되는 것을 특징으로 한다.The alignment layer may be removed by dry etching during a regeneration process.
상기 건식식각은 SF6, O2, O2+Cl2, CF4등의 혼합가스를 이용하는 것을 특징으로 한다.The dry etching is characterized in using a mixed gas, such as SF 6 , O 2 , O 2 + Cl 2 , CF 4 .
상기 혼합가스의 비율은 SF6: O2= 1:50이상인 것을 특징으로 한다.The ratio of the mixed gas is characterized in that SF 6 : O 2 = 1:50 or more.
상기 혼합가스의 비율은 SF6: O2= 1:70 이상인 것을 특징으로 한다.The ratio of the mixed gas is characterized in that SF 6 : O 2 = 1:70 or more.
상기 식각시 사용되는 고주파 파워(RF power)는 약 500~1500W정도인 것을 특징으로 한다.The high frequency power (RF power) used during the etching is characterized in that about 500 ~ 1500W.
상기 유기절연막의 하부에 형성되는 박막트랜지스터의 제조방법은 상기 기판 상에 게이트전극 및 게이트라인을 형성하는 단계와, 상기 게이트전극 및 게이트라인을 덮도록 상기 기판 상에 게이트절연막을 형성하는 단계와, 상기 게이트절연막 상에 데이터라인, 소스전극 및 드레인전극을 형성하는 단계를 포함한다.A method of manufacturing a thin film transistor formed under the organic insulating film includes forming a gate electrode and a gate line on the substrate, forming a gate insulating film on the substrate to cover the gate electrode and the gate line; Forming a data line, a source electrode and a drain electrode on the gate insulating layer.
상기 드레인전극과 전기적으로 접촉되도록 화소전극을 형성하는 단계를 추가로 포함하며, 상기 화소전극은 상기 데이터라인 및 게이트라인 중 적어도 어느 하나에 중첩되게 형성되는 것을 특징으로 한다.The method may further include forming a pixel electrode in electrical contact with the drain electrode, wherein the pixel electrode is formed to overlap at least one of the data line and the gate line.
상기 목적을 달성하기 위한 본 발명에 따른 액정표시소자의 재생방법은 기판 상에 유기보호막 및 질화실리콘층이 순차적으로 형성되어 상기 질화실리콘층 상에 형성된 불량배향막을 감지하는 단계와, 상기 불량배향막과 상기 질화실리콘층과의 다른 식각조건으로 상기 불량배향막을 제거하는 단계와, 상기 질화실리콘층 상에 정상배향막을 재생하는 단계를 포함한다.According to an aspect of the present invention, there is provided a method of reproducing a liquid crystal display device, wherein the organic protective layer and the silicon nitride layer are sequentially formed on a substrate to detect a defective alignment layer formed on the silicon nitride layer. And removing the defective alignment layer under different etching conditions from the silicon nitride layer, and regenerating a normal alignment layer on the silicon nitride layer.
상기 불량배향막은 재생공정시 건식식각으로 제거되는 것을 특징으로 한다.The defective alignment layer is characterized in that it is removed by dry etching during the regeneration process.
상기 건식식각은 SF6, O2, O2+Cl2, CF4등의 혼합가스를 이용하는 것을 특징으로 한다.The dry etching is characterized in using a mixed gas, such as SF 6 , O 2 , O 2 + Cl 2 , CF 4 .
상기 혼합가스의 비율은 SF6: O2= 1:50이상인 것을 특징으로 한다.The ratio of the mixed gas is characterized in that SF 6 : O 2 = 1:50 or more.
상기 혼합가스의 비율은 SF6: O2= 1:70 이상인 것을 특징으로 한다.The ratio of the mixed gas is characterized in that SF 6 : O 2 = 1:70 or more.
상기 식각시 사용되는 고주파 파워(RF power)는 약 500~1500W정도인 것을 특징으로 한다.The high frequency power (RF power) used during the etching is characterized in that about 500 ~ 1500W.
상기 목적 외에 본 발명의 다른 목적 및 특징들은 첨부도면을 참조한 실시예에 대한 설명을 통하여 명백하게 드러나게 될 것이다.Other objects and features of the present invention in addition to the above objects will become apparent from the description of the embodiments with reference to the accompanying drawings.
이하, 도 6 내지 도 10을 참조하여 본 발명의 바람직한 실시예에 대하여 설명하기로 한다.Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 6 to 10.
도 6을 참조하면, 본 발명에 따른 액정표시소자의 하부기판(51)은 데이터라인(54)과 게이트라인(52)의 교차부에 위치하는 TFT와, TFT의 드레인전극(60)에 접속된 화소전극(72)과, 화소전극(72)을 덮도록 도포되는 배향막(74)을 구비한다.Referring to FIG. 6, the lower substrate 51 of the liquid crystal display according to the present invention is connected to a TFT positioned at an intersection of the data line 54 and the gate line 52 and the drain electrode 60 of the TFT. The pixel electrode 72 and the alignment film 74 coated to cover the pixel electrode 72 are provided.
TFT는 게이트라인(52)에서 돌출된 게이트전극(56), 데이터라인(54)에서 돌출된 소스전극(58)과 접촉홀(70)을 통해 화소전극(72)에 접속된 드레인전극(60)을 구비한다. 또한, TFT는 게이트전극(56)과 소스 및 드레인전극(58,60)의 절연을 위한 게이트절연막(62)과, 게이트전극(56)에 공급되는 게이트전압에 의해 소스전극(58)과 드레인전극(60)간에 도통채널을 형성하기 위한 반도체층(64,66)을 더 구비한다. 이러한 TFT는 게이트라인(52)으로부터의 게이트신호에 응답하여 데이터라인(54)으로부터의 데이터신호를 선택적으로 화소전극(72)에 공급한다.The TFT is connected to the pixel electrode 72 through the gate electrode 56 protruding from the gate line 52, the source electrode 58 protruding from the data line 54, and the contact hole 70. It is provided. Further, the TFT is formed by the gate insulating film 62 for insulating the gate electrode 56 and the source and drain electrodes 58 and 60, and the gate electrode 56 and the drain electrode by the gate voltage supplied to the gate electrode 56. The semiconductor layers 64 and 66 are further provided for forming the conduction channel between 60. Such TFT selectively supplies the data signal from the data line 54 to the pixel electrode 72 in response to the gate signal from the gate line 52.
화소전극(72)은 데이터라인(54)과 게이트라인(52)에 의해 분할된 셀영역에 위치하며 광투과율이 높은 투명전도성 물질로 이루어진다. 화소전극(72)은 하부기판(51) 전면에 도포되는 제1 및 제2 보호막(68,84) 상에 형성된다. 제1 보호막(68)은 유기절연물질로 형성되며 제2 보호막(84)은 무기절연물질인 질화실리콘(SiNx)으로 형성된다. 이 제1 및 제2 보호막(68,84)에 형성된 접촉홀(70)을 통해 드레인전극(60)과 전기적으로 접속된다. 이러한 화소전극(72)은 TFT를 경유하여 공급되는 데이터신호에 의해 상부기판에 형성되는 공통 투명전극(도시하지 않음)과 전위차를 발생시키게 된다. 이 전위차에 의해 하부기판(51)과 상부기판 사이에 위치하는 액정이 유전이방성에 의해 회전하게 된다. 이 액정은 광원으로부터 화소전극(72)을 경유하여 입사되는 광을 상부기판 쪽으로 투과시키게 된다.The pixel electrode 72 is formed in a cell region divided by the data line 54 and the gate line 52 and is made of a transparent conductive material having high light transmittance. The pixel electrode 72 is formed on the first and second passivation layers 68 and 84 applied to the entire lower substrate 51. The first passivation layer 68 is formed of an organic insulating material, and the second passivation layer 84 is formed of silicon nitride (SiNx), which is an inorganic insulating material. It is electrically connected to the drain electrode 60 through the contact holes 70 formed in the first and second passivation films 68 and 84. The pixel electrode 72 generates a potential difference from a common transparent electrode (not shown) formed on the upper substrate by a data signal supplied through the TFT. This potential difference causes the liquid crystal located between the lower substrate 51 and the upper substrate to rotate by dielectric anisotropy. The liquid crystal transmits light incident from the light source via the pixel electrode 72 toward the upper substrate.
배향막(74)은 액정분자의 초기분자배열을 결정하는 공정으로 제2 보호막(84)상에 형성된다. 이 배향막(74)은 폴리이미드를 롤러로 도포하여 형성된다. 배향막(74)은 제2 보호막(84)과 다른 식각조건을 가지고 있어 배향막(74)이 불량도포되었을 때 제1 보호막(68)의 손실없이 배향막(74)이 제거된다. 그런 다음, 배향막(74)의 재생공정이 수행된다.The alignment layer 74 is formed on the second passivation layer 84 in the process of determining the initial molecular arrangement of the liquid crystal molecules. This alignment film 74 is formed by applying polyimide with a roller. The alignment layer 74 has an etching condition different from that of the second passivation layer 84, and when the alignment layer 74 is poorly coated, the alignment layer 74 is removed without losing the first passivation layer 68. Then, the regeneration process of the alignment film 74 is performed.
도 7a 내지 도 7e는 도 6에 도시된 액정표시소자의 제조방법을 단계적으로 나타내는 단면도이다.7A to 7E are cross-sectional views sequentially illustrating a method of manufacturing the liquid crystal display device illustrated in FIG. 6.
도 7a를 참조하면, 기판(51) 상에 게이트라인(52) 및 게이트전극(56)이 형성된다.Referring to FIG. 7A, a gate line 52 and a gate electrode 56 are formed on the substrate 51.
게이트라인(52) 및 게이트전극(56)은 스퍼터링(sputtering) 등의 증착방법으로 알루미늄(Al) 또는 구리(Cu) 등을 증착한 후 패터닝함으로써 형성된다.The gate line 52 and the gate electrode 56 are formed by depositing aluminum (Al), copper (Cu), or the like by a deposition method such as sputtering and then patterning.
도 7b를 참조하면, 게이트절연막(62) 상에 활성층(64) 및 오믹접촉층(66)이 형성된다.Referring to FIG. 7B, an active layer 64 and an ohmic contact layer 66 are formed on the gate insulating layer 62.
게이트절연막(62)은 게이트라인(52) 및 게이트전극(56)을 덮도록 절연물질을 PECVD(Plasma Enhanced Chemical Vapor Deposition)방식으로 전면 증착하여 형성된다. 활성층(64) 및 오믹접촉층(66)은 게이트절연막(62) 상에 제1 및 제2 반도체층을 적층하고 패터닝함으로써 형성된다.The gate insulating layer 62 is formed by depositing an insulating material on the entire surface of the gate line 52 and the gate electrode 56 by using a plasma enhanced chemical vapor deposition (PECVD) method. The active layer 64 and the ohmic contact layer 66 are formed by stacking and patterning the first and second semiconductor layers on the gate insulating film 62.
게이트절연막(62)은 질화실리콘(SiNx) 또는 산화실리콘(SiOx) 등의 절연물질로 형성된다. 활성층(64)은 제1 반도체층인, 불순물이 도핑되지 않은 비정질실리콘으로 형성된다. 또한, 오믹접촉층(66)은 제2 반도체층인, N형 또는 P형의 불순물이 고농도로 도핑된 비정질실리콘으로 형성된다.The gate insulating layer 62 is made of an insulating material such as silicon nitride (SiNx) or silicon oxide (SiOx). The active layer 64 is formed of amorphous silicon that is not doped with impurities, which is the first semiconductor layer. In addition, the ohmic contact layer 66 is formed of amorphous silicon doped with an N-type or P-type impurity at a high concentration, which is a second semiconductor layer.
도 7c를 참조하면, 게이트절연막(62) 상에 데이터라인(54), 소스전극(58) 및 드레인전극(60)이 형성된다.Referring to FIG. 7C, a data line 54, a source electrode 58, and a drain electrode 60 are formed on the gate insulating layer 62.
데이터라인(54), 소스전극(58) 및 드레인전극(60)은 CVD방법 또는 스퍼터링(sputtering)방법으로 금속층을 전면 증착한 후 패터닝함으로써 형성된다. 소스전극 및 드레인전극(60)을 패터닝한 후 게이트전극(56)과 대응하는 부분의 오믹접촉층(46)도 패터닝하여 활성층(44)이 노출된다. 활성층(44)에서 소스 및 드레인전극(58,60)사이의 게이트전극(56)과 대응하는 부분은 채널이 된다.The data line 54, the source electrode 58, and the drain electrode 60 are formed by depositing and patterning a metal layer on the entire surface by a CVD method or a sputtering method. After the source electrode and the drain electrode 60 are patterned, the ohmic contact layer 46 corresponding to the gate electrode 56 is also patterned to expose the active layer 44. The portion of the active layer 44 corresponding to the gate electrode 56 between the source and drain electrodes 58 and 60 becomes a channel.
데이터라인(54), 소스전극(58) 및 드레인전극(60)은 크롬(Cr) 또는 몰리브덴(Mo)등으로 형성된다.The data line 54, the source electrode 58, and the drain electrode 60 are formed of chromium (Cr) or molybdenum (Mo).
도 7d를 참조하면, 게이트절연층(62)상에 제1 및 제2 보호층(68,84)이 형성된다.Referring to FIG. 7D, first and second passivation layers 68 and 84 are formed on the gate insulating layer 62.
제1 및 제2 보호층(68,84)은 데이터라인(54), 소스전극(58) 및 드레인전극(60)을 덮도록 게이트절연층(9)상에 제1 및 제2 절연물질을 순차적으로 증착한 후 패터닝함으로써 형성된다. 제1 및 제2 보호층(68,84)을 관통하게 접촉홀(70)이 형성되어 드레인전극(60)의 표면이 일부 노출된다.The first and second protective layers 68 and 84 sequentially deposit the first and second insulating materials on the gate insulating layer 9 to cover the data line 54, the source electrode 58, and the drain electrode 60. It is formed by patterning after evaporation. A contact hole 70 is formed through the first and second passivation layers 68 and 84 to partially expose the surface of the drain electrode 60.
제1 보호층(68)은 아크릴계(acryl)유기화합물, 테프론(Teflon), BCB(benzocyclobutene), 사이토프(cytop) 또는 PFCB(perfluorocyclobutane) 등의 유전상수가 작은 유기절연물로 형성된다.The first passivation layer 68 is formed of an organic insulator having a low dielectric constant such as an acryl organic compound, Teflon, benzocyclobutene (BCB), cytope, or perfluorocyclobutane (PFCB).
제2 보호층(84)은 추후에 형성되는 배향막(74)과 다른 식각비를 갖는 무기절연물인 질화실리콘(SiNx)이 형성된다. 이들 중 바람직하게는 질화실리콘(SiNx)이수소(H-)기를 다량 함유하는 것이 좋다. 이를 상세히 하면, 질화실리콘(SiNx)은 대기 중에 장시간 노출되어도 표면 상에 배향막(74)과 접착력을 부족하게 하는 심각한 오염이 적고, 질화실리콘(SiNx)에 함유된 수소기(H-)는 제1 보호층(68)과 접착력을 강화하여 소자의 특성을 좋게 한다.The second protective layer 84 is formed of silicon nitride (SiNx), which is an inorganic insulator having an etching ratio different from that of the alignment layer 74 formed later. Among these, preferably, silicon nitride (SiNx) contains a large amount of hydrogen (H-) groups. In detail, silicon nitride (SiNx) is less seriously polluted, causing insufficient adhesion to the alignment layer 74 on the surface even when exposed to the air for a long time, and the hydrogen group (H−) contained in silicon nitride (SiNx) is the first The protective layer 68 and the adhesive strength is enhanced to improve the characteristics of the device.
도 7e를 참조하면, 제2 보호층(84)상에 화소전극(72)이 형성된다.Referring to FIG. 7E, a pixel electrode 72 is formed on the second passivation layer 84.
화소전극(72)은 제2 보호층(84)상에 투명전도성물질을 증착한 후 패터닝함으로써 형성된다.The pixel electrode 72 is formed by depositing a transparent conductive material on the second protective layer 84 and patterning the same.
화소전극(72)은 접촉홀(70)을 통해 드레인전극(60)과 전기적으로 접촉된다.The pixel electrode 72 is in electrical contact with the drain electrode 60 through the contact hole 70.
화소전극(72)은 인듐-틴-옥사이드(Indium-Tin-Oxide : ITO), 인듐-징크-옥사이드(Indium-Zinc-Oxide : IZO) 또는 인듐-틴-징크-옥사이드(Indium-Tin-Zinc-Oxide : ITZO)중 어느 하나로 형성된다.The pixel electrode 72 may be formed of indium tin oxide (ITO), indium zinc oxide (IZO), or indium tin zinc oxide (INO). Oxide: ITZO).
이렇게 형성된 하부기판(51)의 전면에 배향막(74)을 도포한 후 러빙공정을 수행하여 하판을 완성하게 된다.The alignment layer 74 is applied to the entire surface of the lower substrate 51 thus formed, and then a rubbing process is performed to complete the lower plate.
배향막(74)이 형성된 하판을 테스트한 결과 도 8에 도시된 바와 같이 불량 도포된 배향막(86)이 발견되면 배향막(74)을 재생하는 공정이 수행된다. 불량배향막(86)은 건식식각을 이용하여 제거된다. 불량배향막(86)이 도포된 하판을 챔버내에 장착하고 챔버내에 SF6, O2, O2+Cl2, CF4가스 등을 주입하는데, SF6: O2= 1:50이상으로 주입되며, 가장 이상적인 경우는 SF6: O2= 1:70 이상이다. 그리고, 고주파 파워(RF Power)는 약 500~1500W정도일 때 플라즈마 방전을 일으키게 된다. 그러면주입가스와 불량배향막(86) 간에 반응이 일어나면서 도 9에 도시된 바와 같이 제1 보호막(68)의 손실없이 불량배향막(86)이 전면 식각되어 제거된다. 불량배향막(86)이 제거된 후에는 다시 배향막(74)을 형성공정으로 기판이 반송되어 도 10에 도시된 바와 같이 배향막(74)의 재생공정이 가능하게 된다.As a result of testing the lower plate on which the alignment layer 74 is formed, as shown in FIG. 8, when a poorly coated alignment layer 86 is found, a process of regenerating the alignment layer 74 is performed. The defective alignment film 86 is removed using dry etching. The lower plate on which the bad alignment film 86 is applied is mounted in the chamber, and SF 6 , O 2 , O 2 + Cl 2 , CF 4 gas, etc. are injected into the chamber, and SF 6 : O 2 = 1:50 or more, The most ideal case is SF 6 : O 2 = 1:70 or more. And, the high frequency power (RF Power) causes a plasma discharge when about 500 to 1500W. Then, as the reaction occurs between the injection gas and the poor alignment layer 86, the defective alignment layer 86 is etched and removed entirely without loss of the first passivation layer 68 as shown in FIG. After the defective alignment film 86 is removed, the substrate is conveyed again in the forming process of the alignment film 74, so that the regeneration process of the alignment film 74 is possible as shown in FIG.
상술한 바와 같이, 본 발명에 따른 액정표시소자 및 그 제조방법과 이를 이용한 배향막 재생방법은 배향막과 다른 선택식각비를 갖는 제2 보호층을 형성함으로써 불량도포된 배향막을 제1 보호층의 손실없이 제거할 수 있어 배향막의 재생공정을 실행할 수 있다. 이로 인해 생산성 및 수율이 향상될 수 있다.As described above, the liquid crystal display device according to the present invention, a method of manufacturing the same, and a method of reproducing an alignment film using the same according to the present invention form a second protective layer having a selective etching ratio different from that of the alignment film so that the poorly coated alignment film is not lost. It can remove, and the regeneration process of an oriented film can be performed. This can improve productivity and yield.
또한, 본 발명에 따른 액정표시소자 및 그 제조방법과 이를 이용한 배향막 재생방법은 수소기(H-)를 함유한 가스로 제2 보호층을 형성함으로써 이 수소기(H-)에 의해 제1 보호층과의 접착력이 강화될 수 있다.In addition, the liquid crystal display device according to the present invention, a method of manufacturing the same, and a method for reproducing an alignment film using the same according to the present invention form a second protective layer with a gas containing hydrogen group (H-), thereby protecting the first by the hydrogen group (H-). Adhesion with the layer can be enhanced.
이상 설명한 내용을 통해 당업자라면 본 발명의 기술사상을 일탈하지 아니하는 범위에서 다양한 변경 및 수정이 가능함을 알 수 있을 것이다. 따라서, 본 발명의 기술적 범위는 명세서의 상세한 설명에 기재된 내용으로 한정되는 것이 아니라 특허 청구의 범위에 의해 정하여 져야만 할 것이다.Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.
Claims (22)
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US10/005,867 US6683668B2 (en) | 2001-05-24 | 2001-12-07 | Liquid crystal display device and fabricating method thereof, and reworking method of alignment film using the same |
US10/698,551 US6844906B2 (en) | 2001-05-24 | 2003-11-03 | Liquid crystal display device and fabricating method thereof, and reworking method of alignment film using the same |
US10/698,466 US7022537B2 (en) | 2001-05-24 | 2003-11-03 | Liquid crystal display device and fabricating method thereof, and reworking method of alignment film using the same |
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KR20030018084A (en) * | 2001-08-27 | 2003-03-06 | (주)아이씨디 | a method for removing alignment layer coated on a substrate and recycling the same using a plasma |
KR101116819B1 (en) * | 2004-11-16 | 2012-02-28 | 엘지디스플레이 주식회사 | Method For Fabricating Liquid Crystal Display Panel |
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KR20030018084A (en) * | 2001-08-27 | 2003-03-06 | (주)아이씨디 | a method for removing alignment layer coated on a substrate and recycling the same using a plasma |
KR101116819B1 (en) * | 2004-11-16 | 2012-02-28 | 엘지디스플레이 주식회사 | Method For Fabricating Liquid Crystal Display Panel |
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US6844906B2 (en) | 2005-01-18 |
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