KR20040036987A - Thin film transistor array panel for liquid crystal display and manufacturing method of the same - Google Patents

Abstract

PURPOSE: An array substrate for an LCD device is provided to form a storage capacitor that has sufficient capacitance in a small size, by using a concavo-convex surface, thereby improving an opening ratio. CONSTITUTION: A gate insulating film(106) is deposited on a front side of an insulating substrate(101) comprising a gate electrode(104) and the first storage electrode(105). An active layer(107) and an ohmic contact layer(108) are sequentially deposited on the gate insulating film(106). On the ohmic contact layer(108), data wires, a source electrode(109) extended from the data wires, a drain electrode(110) facing the source electrode(109) based on the gate electrode(104), and the second storage electrode(111) overlapping with the first storage electrode(105) are deposited. The source electrode(109), the drain electrode(110), and the second storage electrode(111) are covered with a protective film(112). The protective film(112) comprises a storage contact hole(113) and a drain contact hole(114) exposing the drain electrode(110) and the second storage electrode(111), respectively.

Description

Thin film transistor array panel for liquid crystal display and manufacturing method of the same

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to an array substrate for a liquid crystal display device suitable for improving the aperture ratio and a manufacturing method thereof.

As the information society develops, the demand for display devices is increasing in various forms.In recent years, liquid crystal display (LCD), plasma display panel (PDP), electro luminescent display (ELD), and vacuum fluorescent display (VFD) have been developed. Various flat panel display devices have been studied, and some are already used as display devices in various devices.

Among them, LCD is the most widely used as a substitute for CRT (Cathode Ray Tube) for mobile image display device because of its excellent image quality, light weight, thinness and low power consumption, and mobile type such as notebook computer monitor. In addition, it is being developed in various ways such as a television for receiving and displaying a broadcast signal, a monitor of a computer.

As described above, although various technical advances have been made in order for the liquid crystal display device to serve as a screen display device in various fields, the task of improving the image quality as the screen display device has many advantages and disadvantages.

Therefore, in order to use a liquid crystal display as a general screen display device in various parts, development of high quality images such as high definition, high brightness, and large area is required while maintaining the characteristics of light weight, thinness, and low power consumption. It can be said.

Such a liquid crystal display may be largely divided into a liquid crystal panel displaying an image and a driving unit for applying a driving signal to the liquid crystal panel, wherein the liquid crystal panel has a predetermined space and is bonded to the first and second glass substrates. And a liquid crystal layer injected between the first and second glass substrates.

Here, the first glass substrate (TFT array substrate) includes a plurality of gate wirings arranged in one direction at a predetermined interval, a plurality of data wirings arranged at regular intervals in a direction perpendicular to the respective gate wirings, and each of A plurality of pixel electrodes formed in a matrix form in each pixel region defined by crossing gate lines and data lines, and a plurality of thin films that are switched by signals of the gate lines to transfer signals of the data lines to the pixel electrodes Transistors are formed.

The second glass substrate (color filter substrate) includes a black matrix layer for blocking light in portions other than the pixel region, an R, G, B color filter layer for expressing color colors, and a common electrode for implementing an image. Is formed.

The first and second glass substrates are bonded to each other by a seal material having a predetermined space by a spacer and having a liquid crystal injection hole, so that the liquid crystal is injected between the two substrates.

In this case, in the liquid crystal injection method, the liquid crystal is injected between the two substrates by osmotic pressure when the liquid crystal injection hole is immersed in the liquid crystal container by maintaining the vacuum state between the two substrates bonded by the reality. When the liquid crystal is injected as described above, the liquid crystal injection hole is sealed with a sealing material.

1 is an exploded perspective view illustrating a general color liquid crystal display device.

As shown in FIG. 1, the lower substrate 1 and the upper substrate 2 bonded to each other with a predetermined space, and the liquid crystal layer 3 injected between the lower substrate 1 and the upper substrate 2 are composed of. It is.

More specifically, the lower substrate 1 has a plurality of gate lines 4 arranged in one direction at regular intervals to define the pixel region P, and in a direction perpendicular to the gate lines 4. A plurality of data lines 5 are arranged at regular intervals, and pixel electrodes 6 are formed in each pixel region P where the gate lines 4 and the data lines 5 intersect, and each of the gate lines The thin film transistor T is formed at the portion where (4) and the data wiring 5 intersect.

The upper substrate 2 includes a black matrix layer 7 for blocking light in portions other than the pixel region P, an R, G, and B color filter layer 8 for expressing color colors, and an image. The common electrode 9 is formed to implement the.

The thin film transistor T may include a gate electrode protruding from the gate line 4, a gate insulating film (not shown) formed on a front surface, an active layer formed on the gate insulating film above the gate electrode, and the data. A source electrode protruding from the wiring 5 and a drain electrode are provided so as to face the source electrode.

The pixel electrode 6 uses a transparent conductive metal having a relatively high light transmittance, such as indium-tin-oxide (ITO).

In the liquid crystal display device configured as described above, the liquid crystal layer 3 positioned on the pixel electrode 6 is aligned by a signal applied from the thin film transistor T, and the liquid crystal layer 3 is aligned with the alignment degree of the liquid crystal layer 3. Accordingly, the image can be expressed by adjusting the amount of light passing through the liquid crystal layer 3.

As described above, the liquid crystal panel drives the liquid crystal by an electric field applied up and down, and has excellent characteristics such as transmittance and aperture ratio, and the common electrode 9 of the upper substrate 2 serves as a ground to discharge static electricity. It is possible to prevent the destruction of the liquid crystal cell.

FIG. 2 is a plan view illustrating a general liquid crystal display array substrate, and FIG. 3 is a cross-sectional view of a conventional liquid crystal display array substrate according to line IV-IV of FIG. 2.

2 and 3, in an array substrate for a liquid crystal display device, a gate line 12 having a predetermined distance in one direction on a transparent insulating substrate 11 and a gate electrode extending from the gate line 12 ( 13 and a storage first electrode 14 are formed.

A gate insulating layer 15 is formed on the gate wiring 12 and the gate electrode 13, and an active layer 16 and an ohmic contact layer 17 are sequentially formed on the gate insulating layer 15. .

The source line 18 is disposed on the ohmic contact layer 17 in a direction perpendicular to the gate line 12, and the source electrode 19 and the gate electrode 13 extending from the data line 18 are formed around the ohmic contact layer 17. The drain electrode 20 facing the electrode 19 and the storage second electrode 21 overlapping with the gate wiring 12 are formed.

The data line 18, the source electrode 19, the drain electrode 20, and the storage second electrode 21 are covered with a passivation layer 22, and the passivation layer 22 is the drain electrode 20 and the storage second. Each of the electrodes 21 has a storage contact hole 23 and a drain contact hole 24.

The pixel electrode 25 is formed on the passivation layer 22 of the pixel region defined by the gate line 12 and the data line 18 intersecting. The pixel electrode 25 includes a storage contact hole 23 and The drain contact hole 24 is connected to the drain electrode 20 and the storage second electrode 21, respectively.

In the array substrate configured as described above, when a voltage is applied to the gate electrode 13 through the gate wiring 12, electrons are concentrated in the active layer 16 and a conductive channel is formed, so that the source electrode 19 and the drain electrode are formed. The current flows between the lines 20 so that the image signal transmitted from the data line 18 reaches the pixel electrode 25 through the source electrode 19 and the drain electrode 20.

4A to 4E are cross-sectional views illustrating a method of manufacturing a conventional array substrate for a liquid crystal display device.

As shown in FIG. 4A, one of conductive metals such as aluminum (Al), aluminum-based alloy (AlNd), chromium (Cr), and molybdenum (Mo) is deposited and patterned on the insulating substrate 11 to form a gate wiring ( 12) of FIG. 2 is formed.

When the gate wiring 12 is formed using an aluminum metal, the gate wiring 12 is formed of a double layer such as aluminum-neodymium / molybdenum (AlNd / Mo) or aluminum-neonium / chromium (AlNd / Cr).

The reason is that since the aluminum-based metal used as the first layer of the gate wiring 12 has a small resistance, the RC delay of the signal flowing through the gate wiring can be reduced.

However, the aluminum-based metal is etched by the etching solution because of the low corrosion resistance to chemicals, resulting in disconnection defects.

Therefore, in order to prevent this is formed in a double layer using a metal such as molybdenum (Mo) strong corrosion resistance to chemicals.

In this case, a part of the gate wiring 12 is used as the gate electrode 13 and the storage first electrode 14.

As shown in FIG. 4B, an inorganic insulating material group including silicon nitride film (SiNx) and silicon oxide film (SiO ₂ ) on the entire surface of the insulating substrate 11 including the gate wiring 12, or in some cases, benzocyclo. A gate insulating layer 15 is formed by depositing or applying one selected from the group of organic insulating materials including BB (Benzocyclobutene), acryl resin, and the like.

Subsequently, pure amorphous silicon (a-Si: H) and amorphous silicon (n + a-Si: H) containing impurities are sequentially deposited on the entire surface of the insulating substrate 11 on which the gate insulating layer 15 is formed. Patterning is performed through photo and etching processes to form an active layer 16 and an ohmic contact layer 17.

As shown in FIG. 4C, a conductive metal is deposited and patterned on the entire surface of the insulating substrate 11 on which the ohmic contact layer 17 is formed, and then, on the stacked active layer 16 and the ohmic contact layer 17. 2, a source electrode 19 protruding from the data line 18 and the data line 18 above the gate electrode 13, a drain electrode 20 spaced apart from the predetermined distance, and a storage first electrode 14. The storage second electrode 21 is formed in the form of an island on the top.

Subsequently, a portion of the ohmic contact layer 17 is etched using the source electrode 19 and the drain electrode 20 as a mask to expose the lower active layer 16.

The reason for removing the ohmic contact layer 17 existing between the source electrode 19 and the drain electrode 20 is to reduce leakage current.

As shown in FIG. 4D, a protective film 22 is formed by depositing or applying an insulating material on the entire surface of the insulating substrate 11 on which the source electrode 19 and the drain electrode 20 are formed.

Subsequently, the protective layer 22 is selectively removed so that the surfaces of the storage second electrode 21 and the drain electrode 20 are partially exposed to form the storage contact hole 23 and the drain contact hole 24.

As shown in FIG. 4E, indium-tin-oxide (ITO) and indium-zink are formed on the entire surface of the insulating substrate 11 on which the storage contact hole 23 and the drain contact hole 24 are formed. A pixel electrode 25 is formed by depositing and patterning one selected from a group of transparent conductive metals including indium-zinc-oxide (IZO).

In this case, the pixel electrode 25 is in contact with the drain electrode 20 through the drain contact hole 24 and is in contact with the storage second electrode 21 through the storage contact hole 23.

As described above, a storage capacitor including a storage first electrode 14, a gate insulating layer 15 as a dielectric layer, and a storage second electrode 21 is formed.

However, the above-described conventional liquid crystal display array substrate and its manufacturing method have the following problems.

That is, a storage capacitor is formed to maintain the applied pixel voltage for one frame, which is formed on and after the gate wiring or the common electrode line is formed.

Therefore, since the width of the gate wiring is small, a reduction in the aperture ratio occurs by forming the formation portion of the storage capacitor in the pixel side in order to obtain sufficient capacitance.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and an array substrate for a liquid crystal display device to improve the aperture ratio by forming a storage capacitor having a sufficient capacitance even with a small area by using the surface of the uneven structure and Its purpose is to provide its manufacturing method.

1 is an exploded perspective view showing a general color liquid crystal display device

2 is a plan view showing an array substrate for a general liquid crystal display device

3 is a cross-sectional view illustrating a conventional array substrate for a liquid crystal display device according to line IV-IV of FIG. 2.

4A through 4E are cross-sectional views illustrating a method of manufacturing a conventional array substrate for a liquid crystal display device.

5 is a cross-sectional view showing an array substrate for a liquid crystal display device according to the present invention.

6A to 6G are cross-sectional views illustrating a method of manufacturing an array substrate for a liquid crystal display device according to the present invention.

Explanation of symbols for the main parts of the drawings

101: insulated substrate 102: photo acrylic

103: unevenness 104: gate electrode

105: storage first electrode 106: gate insulating film

107: active layer 108: ohmic contact layer

109 source electrode 110 drain electrode

111: storage second electrode 112: protective film

113: storage contact hole 114: drain contact hole

115: pixel electrode

In order to achieve the above object, an array substrate for a liquid crystal display device according to the present invention includes a gate wiring and a data wiring crossing each other to define a pixel region, a thin film transistor formed at an intersection of the gate wiring and the data wiring, A storage first electrode formed integrally with the gate wiring and having a plurality of irregularities on a surface thereof, a gate insulating film formed on the entire surface including the gate wiring, a drain electrode and the storage of the thin film transistor formed on the gate insulating film And a second electrode, a passivation layer formed on the front surface including the storage first electrode and the second electrode, and a pixel electrode contacting the drain electrode and the storage second electrode of the thin film transistor.

The semiconductor device may further include an insulating layer formed under the storage first electrode with a plurality of irregularities.

In addition, the insulating film is made of a material such as a photo acrylic, a silicon oxide film, BCB, P / A.

According to an aspect of the present invention, there is provided a method of fabricating an array substrate for a liquid crystal display device, wherein the plurality of gate lines and data lines are arranged to be intersected to define a pixel area, and are formed at intersections of the gate lines and data lines. In the method of manufacturing an array substrate for a liquid crystal display device comprising a thin film transistor and a pixel electrode connected to the drain electrode of the thin film transistor, the storage first electrode having a plurality of irregularities on the surface integrally with the gate wiring; And forming a gate insulating film on the entire surface including the storage first electrode, and simultaneously forming a storage second electrode on the gate insulating film simultaneously with the drain electrode of the thin film transistor.

In addition, a method of manufacturing an array substrate for a liquid crystal display device according to the present invention includes a plurality of gate wirings and data wirings intersecting to define a pixel region, thin film transistors formed at intersections of the gate wirings and data wirings, and A method of manufacturing an array substrate for a liquid crystal display device comprising a pixel electrode connected to a drain electrode of a thin film transistor, the method comprising: defining a region in which a storage capacitor is to be formed on a substrate, and forming a region on the substrate in which the storage capacitor is to be formed. Forming an insulating film having a plurality of irregularities, forming a storage first electrode integrally with the gate wiring on the insulating film having the irregularities, forming a gate insulating film on the entire surface including the storage first electrode, and the gate Storage second electrode simultaneously with data wiring on the insulating film Forming a protective layer on the entire surface of the substrate and forming a contact hole to expose a surface of the drain electrode and the storage second electrode of the thin film transistor, wherein the drain electrode and the storage agent are formed through the contact hole; And forming a pixel electrode connected to the two electrodes.

In the forming of the insulating film having the plurality of irregularities, a plurality of irregularities are formed on the surface of the insulating layer by applying an insulating film on the insulating substrate and then performing a photo and etching process.

The insulating film is formed of a material such as a photo acrylic, a silicon oxide film, BCB, or P / A.

In addition, the photoacryl is applied to a thickness of 3 ~ 4㎛ and then exposed to the entire surface using a mask having a plurality of openings to form irregularities.

The protective film may be formed of an inorganic insulating material such as silicon nitride or silicon oxide, or an organic insulating material having a low dielectric constant such as acrylic organic compound, Teflon, BCB, cytoplasm or PFCB.

The gate insulating layer may be formed by depositing or applying one selected from an inorganic insulating material group including a silicon nitride film and a silicon oxide film or an organic insulating material group including BCB and an acrylic resin.

Hereinafter, an array substrate for a liquid crystal display device and a method of manufacturing the same according to the present invention will be described in detail with reference to the accompanying drawings.

5 is a cross-sectional view illustrating an array substrate for a liquid crystal display device according to the present invention.

As shown in FIG. 5, in the array substrate for a liquid crystal display device, a plurality of irregularities 103 formed in a hemispherical shape on a transparent region 101 (region where a storage capacitor is to be formed) on the transparent insulation substrate 101 and the insulation The storage first electrode 105 along the gate wirings (not shown in the drawing) at regular intervals in one direction on the substrate 101, the gate electrodes 104 extending from the gate wirings, and the plurality of irregularities 103. ) Is formed.

A gate insulating layer 106 is formed on the entire surface of the insulating substrate 101 including the gate electrode 104 and the storage first electrode 105, and the active layer 107 and the ohmic contact are formed on the gate insulating layer 106. Layer 108 is formed sequentially.

A source electrode (not shown) on the ohmic contact layer 108 in a direction perpendicular to the gate wiring, a source electrode 109 and a gate electrode 104 extending from the data wiring (not shown). A drain electrode 110 facing the 109 and a storage second electrode 111 overlapping the first storage electrode 105 are formed.

The source electrode 109, the drain electrode 110, and the storage second electrode 111 are covered with a passivation layer 112, and the passivation layer 112 covers the drain electrode 110 and the storage second electrode 111, respectively. And a storage contact hole 113 and a drain contact hole 114 to be exposed.

The pixel electrode 115 is formed on the passivation layer 112 of the pixel region defined by the gate wiring and the data wiring crossing. The pixel electrode 115 includes a storage contact hole 113 and a drain contact hole 114. It is connected to the drain electrode 110 and the storage second electrode 111 through each.

Accordingly, the storage capacitor of the array substrate for a liquid crystal display device according to the present invention includes a storage first electrode 105, a gate insulating film 106, and a storage second electrode along a plurality of irregularities 103 formed on the insulating substrate 101. Since 111) is formed by being stacked, the capacitance can be increased even in the same area, so that the size thereof can be reduced compared with the conventional one, and the overall aperture ratio can be improved.

On the other hand, the plurality of irregularities 103 is made of a material such as photoacryl, silicon oxide film, BCB, P / A.

In the array substrate for a liquid crystal display device configured as described above, when a voltage is applied to the gate electrode 104 through the gate wiring, electrons are concentrated in the active layer 107 and a conductive channel is formed to form a source electrode 109 and a drain. The current flows between the electrodes 110 so that the image signal transmitted from the data line reaches the pixel electrode 115 through the source electrode 109 and the drain electrode 110.

6A to 6G are cross-sectional views illustrating a method of manufacturing an array substrate for a liquid crystal display device according to the present invention.

As shown in FIG. 6A, photo acryl 102 is applied to the insulating substrate 101 in a thickness of 3 to 4 μm.

As shown in FIG. 6B, a mask (not shown) such as a reticle having a plurality of openings is formed on the insulating substrate 101 to which the photo acryl 102 is applied, and UV or UV light is applied to the entire surface. Irradiation exposes the photoacryl 102 to form a plurality of irregularities 103 having a hemispherical shape in a predetermined region on the insulating substrate 101.

As shown in FIG. 6C, a conductive metal such as aluminum (Al), aluminum-based alloy (AlNd), chromium (Cr), molybdenum (Mo), or the like is formed on the insulating substrate 101 on which the plurality of unevenness 103 is formed. Either one of them is deposited and patterned to form a gate wiring (not shown in the figure).

When the gate wiring 104 is formed using an aluminum metal, the gate wiring 104 is formed of a double layer such as aluminum-neodymium / molybdenum (AlNd / Mo) or aluminum-neonium / chromium (AlNd / Cr).

The reason is that since the aluminum-based metal used as the first layer of the gate wiring has a small resistance, the RC delay of the signal flowing through the gate wiring can be reduced.

However, the aluminum-based metal is etched by the etching solution because of the low corrosion resistance to chemicals, resulting in disconnection defects.

Therefore, in order to prevent this is formed in a double layer using a metal such as molybdenum (Mo) strong corrosion resistance to chemicals.

In this case, a part of the gate wiring is used as the gate electrode 104 and the storage first electrode 105.

On the other hand, the storage first electrode 105 is formed along the plurality of irregularities 103 formed on the insulating substrate 101, the surface thereof has irregularities.

As shown in FIG. 6D, an inorganic insulating material including a silicon nitride film (SiNx) and a silicon oxide film (SiO ₂ ) on an entire surface of the insulating substrate 101 including the gate electrode 104 and the storage first electrode 105. The gate insulating layer 106 may be formed by depositing or applying one selected from a group or a group of organic insulating materials including benzocyclobutene, acryl resin, and the like.

Subsequently, pure amorphous silicon (a-Si: H) and amorphous silicon (n + a-Si: H) containing impurities are sequentially deposited on the entire surface of the insulating substrate 101 on which the gate insulating layer 106 is formed. Patterning forms an active layer 107 and an ohmic contact layer 108.

As shown in FIG. 6E, a conductive metal is deposited and patterned on the entire surface of the insulating substrate 101 on which the ohmic contact layer 108 is formed, and then stacked on the stacked active layer 107 and the ohmic contact layer 108. On the data line (not shown) and the source electrode 109 protruding from the data line above the gate electrode 104, the drain electrode 110 and the storage first electrode 105 spaced apart from each other. The storage second electrode 111 is formed in an island shape.

Subsequently, a portion of the ohmic contact layer 108 is etched using the source electrode 109 and the drain electrode 110 as a mask to expose the lower active layer 107.

The reason for removing the ohmic contact layer 108 existing between the source electrode 109 and the drain electrode 110 is to reduce leakage current.

As illustrated in FIG. 6F, a protective film 112 is formed by depositing or applying an insulating material on the entire surface of the insulating substrate 101 on which the source electrode 109 and the drain electrode 110 are formed.

The protective layer 112 may be formed of an inorganic insulating material such as silicon nitride or silicon oxide, or an organic compound of acrylic type, a dielectric constant such as Teflon, BCB (benzocyclobutene), cytotope, or perfluorocyclobutane (PFCB). It is formed of an organic insulator.

Subsequently, the protective layer 112 is selectively removed so that the surfaces of the storage second electrode 111 and the drain electrode 110 are partially exposed to form the storage contact hole 113 and the drain contact hole 114.

As shown in FIG. 6G, indium-tin-oxide (ITO) and indium-zinc are formed on the entire surface of the insulating substrate 101 on which the storage contact hole 113 and the drain contact hole 114 are formed. One selected from a group of transparent conductive metals including indium-zinc-oxide (IZO) is deposited, and patterned through photo and etching processes to form the pixel electrode 115.

In this case, the pixel electrode 115 is in contact with the drain electrode 110 through the drain contact hole 114 and is in contact with the storage second electrode 111 through the storage contact hole 113.

As described above, the storage first electrode 105, the gate insulating layer 106 serving as the dielectric layer, and the storage second electrode 111 become a storage capacitor.

On the other hand, the storage capacitor formed along the plurality of irregularities 103 formed on the surface of the insulating substrate 101 as described above can increase the capacitance even in the same area as in the prior art, so that the size can be reduced and the area occupied by the storage capacitor as a whole. Since it is possible to reduce the aperture ratio, the aperture ratio can be improved.

In another embodiment of the present invention, an insulating film such as BCB, silicon oxide film, P / A, or the like may be used without using photo acryl 102.

That is, after the insulating film is formed on the insulating substrate 101 to a thickness of about 1.3 μm, the insulating film is removed from the surface by a predetermined thickness through a photo and etching process to form a plurality of irregularities on the surface. The same process may be performed to form the storage capacitor.

On the other hand, the present invention described above is not limited to the above-described embodiment and the accompanying drawings, it is possible that various substitutions, modifications and changes within the scope without departing from the technical spirit of the present invention. It will be apparent to those of ordinary skill in Esau.

As described above, the array substrate for a liquid crystal display device and the method of manufacturing the same according to the present invention have the following effects.

That is, by forming the storage capacitor in an uneven structure, the area occupied by the storage capacitor can be reduced to improve the aperture ratio.

Claims (12)

Gate wiring and data wiring intersecting to define the pixel region; A thin film transistor formed at an intersection of the gate wiring and the data wiring; A storage first electrode formed integrally with the gate wiring and having a plurality of irregularities on a surface thereof; A gate insulating film formed on the entire surface including the gate wiring; A drain electrode and a storage second electrode of the thin film transistor formed on the gate insulating layer; A protective film formed on an entire surface including the storage first electrode and the second electrode; And a pixel electrode contacting the drain electrode and the storage second electrode of the thin film transistor. The array substrate of claim 1, further comprising an insulating layer formed under the storage first electrode with a plurality of irregularities. 3. The array substrate of claim 2, wherein the insulating layer is made of one selected from materials such as photoacryl, silicon oxide, BCB, and P / A. The method of claim 1, wherein the protective film is made of one of an inorganic insulating material such as silicon nitride or silicon oxide or an organic insulating material having a low dielectric constant such as acrylic organic compound, Teflon, BCB, cytoplasm or PFCB. Array substrate for liquid crystal display device. The liquid crystal display of claim 1, wherein the gate insulating layer is selected from an inorganic insulating material group including a silicon nitride film and a silicon oxide film or an organic insulating material group including BCB and an acrylic resin. Array substrate for. A plurality of gate lines and data lines intersecting to define a pixel region, a thin film transistor formed at an intersection of the gate line and data line, and a pixel electrode connected to a drain electrode of the thin film transistor. In the method of manufacturing an array substrate for an apparatus, Forming a storage first electrode having a plurality of unevennesses on a surface of the gate wiring in one piece; Forming a gate insulating film on an entire surface including the storage first electrode; And forming a storage second electrode simultaneously with the drain electrode of the thin film transistor on the gate insulating film. A plurality of gate lines and data lines intersecting to define a pixel region, a thin film transistor formed at an intersection of the gate line and data line, and a pixel electrode connected to a drain electrode of the thin film transistor. In the method of manufacturing an array substrate for an apparatus, Defining a region in which a storage capacitor is to be formed in the substrate; Forming an insulating film having a plurality of irregularities on a substrate in a region where the storage capacitor is to be formed; Forming a storage first electrode integrally with a gate wiring on the insulating film having irregularities; Forming a gate insulating film on an entire surface including the storage first electrode; Forming a storage second electrode simultaneously with the data line on the gate insulating film; Forming a protective film on the entire surface of the substrate and forming a contact hole to expose a portion of a surface of the drain electrode and the storage second electrode of the thin film transistor; And forming a pixel electrode connected to the drain electrode and the storage second electrode through the contact hole. 8. The liquid crystal display of claim 7, wherein the forming of the insulating film having the plurality of irregularities is performed by coating the insulating film on the insulating substrate and then forming the plurality of irregularities on the surface of the insulating layer through a photo and etching process. Method of manufacturing an array substrate for an apparatus. 10. The method of claim 8, wherein the insulating film is formed of a material such as a photo acrylic, a silicon oxide film, BCB, or P / A. 10. The array of claim 7 or 9, wherein the photoacryl is coated with a thickness of 3 to 4 µm and then exposed to the entire surface using a mask having a plurality of openings to form irregularities. Method of manufacturing a substrate. The method of claim 7, wherein the protective film is formed by depositing or applying one of an inorganic insulating material such as silicon nitride or silicon oxide or an organic insulating material having a low dielectric constant such as acrylic organic compound, Teflon, BCB, cytosol or PFCB. A method of manufacturing an array substrate for a liquid crystal display device, characterized in that. The method of claim 7, wherein the gate insulating layer is formed by depositing or applying one selected from an inorganic insulating material group including a silicon nitride film and a silicon oxide film or an organic insulating material group including BCB, an acrylic resin, and the like. A method of manufacturing an array substrate for a liquid crystal display device.