KR101116819B1 - Method For Fabricating Liquid Crystal Display Panel - Google Patents

Abstract

The present invention relates to a method for manufacturing a liquid crystal display panel which can improve the aperture ratio and the brightness.

A method of manufacturing a liquid crystal display panel according to the present invention includes forming a thin film on a substrate; Forming a photoresist pattern on the thin film; Ashing the photoresist pattern; And etching the thin film by using the photoresist pattern reduced in volume and size by the ashing as a mask to form a thin film pattern.

Description

Method for manufacturing a liquid crystal display panel {Method For Fabricating Liquid Crystal Display Panel}             

1 is a plan view illustrating a thin film transistor array substrate of a conventional horizontal field application liquid crystal display panel.

FIG. 2 is a cross-sectional view illustrating a thin film transistor array substrate taken along line II ′ in FIG. 1.

3A to 3C are diagrams for describing a method of forming a thin film pattern using a conventional photo process.

4 is a view showing the aperture ratio and luminance at the time of image realization of a conventional liquid crystal display panel.

5A to 5D are views illustrating a method of manufacturing a thin film pattern according to the present invention.

6A to 6E are views for explaining a method of manufacturing a liquid crystal display panel according to the present invention.

7 is a view showing the aperture ratio and luminance at the time of image realization of a liquid crystal display panel having a reduced line width.

         <Explanation of symbols for the main parts of the drawings>

2: gate line 4: data line

6: thin film transistor 8, 108: gate electrode

10,110 source electrode 12, 112 drain electrode

14, 114: pixel electrodes 18, 118: common electrodes 52, 152: protective film 46,146: gate insulating film

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display panel, and more particularly, to a method for manufacturing a liquid crystal display panel capable of improving aperture ratio and brightness.

The liquid crystal display device displays an image by adjusting the light transmittance of the liquid crystal using an electric field. Such liquid crystal display devices are classified into vertical electric field types and horizontal electric field types according to the direction of the electric field for driving the liquid crystal.

In the vertical field applying liquid crystal display, the common electrode formed on the upper substrate and the pixel electrode formed on the lower substrate are disposed to face each other, and drive the liquid crystal of TN (Twisted Nemastic) mode by a vertical electric field formed therebetween. . The vertical field type liquid crystal display device has an advantage of large aperture ratio, but has a disadvantage of having a narrow viewing angle of about 90 degrees.

In the horizontal field application type liquid crystal display, a liquid crystal in an in-plane switch (hereinafter referred to as IPS) mode is driven by a horizontal electric field between a pixel electrode and a common electrode arranged side by side on a lower substrate. Such a horizontal field application liquid crystal display device has an advantage that a viewing angle is about 160 degrees. Hereinafter, the horizontal field application liquid crystal display will be described in detail.

The horizontal field application type liquid crystal display device includes a thin film transistor array substrate (lower substrate) and a color filter array substrate (upper substrate) bonded to each other, a spacer for keeping a cell gap constant between the two substrates, and a spacer provided by the spacer. A liquid crystal filled in the liquid crystal space is provided.

The thin film transistor array substrate is composed of a plurality of signal lines and thin film transistors for forming a horizontal electric field in pixels, and an alignment film coated thereon for liquid crystal alignment. The color filter array substrate is composed of a color filter for color implementation, a black matrix for preventing light leakage, and an alignment film coated thereon for liquid crystal alignment.

FIG. 1 is a plan view illustrating a thin film transistor array substrate of a conventional horizontal field application liquid crystal display panel, and FIG. 2 is a cross-sectional view illustrating a thin film transistor array substrate taken along line II ′ in FIG. 1.

The thin film transistor array substrate shown in FIGS. 1 and 2 includes a gate line 2 and a data line 4 formed to intersect on the lower substrate 45, a thin film transistor 6 formed at each intersection thereof, and an intersection thereof. A pixel electrode 14 and a common electrode 18 formed to form a horizontal electric field in the pixel region 5 having a structure, and a common line 16 to which the common electrodes 18 are commonly connected are provided.

The gate line 2 supplies a gate signal to the gate electrode 8 of the thin film transistor 6. The data line 4 supplies the pixel signal to the pixel electrode 14 through the drain electrode 12 of the thin film transistor 6. The gate line 2 and the data line 4 are formed in an intersecting structure to define the pixel region 5.

The gate line 2 is connected to a gate driver (not shown) through a gate pad part (not shown).

The data line 4 is connected to a data driver (not shown) through a data pad unit (not shown).

The common line 16 is formed in parallel with the gate line 2 with the pixel region 5 therebetween, and supplies a reference voltage for driving the liquid crystal to the common electrode 18.

The thin film transistor 6 keeps the pixel signal of the data line 4 charged and held in the pixel electrode 14 in response to the gate signal of the gate line 2. To this end, the thin film transistor 6 includes a gate electrode 8 connected to the gate line 2, a source electrode 10 connected to the data line 4, and a drain electrode connected to the pixel electrode 14. 12). In addition, the thin film transistor 6 includes a semiconductor layer including an active layer 48 overlapping with the gate electrode 8 and the gate insulating layer 46 therebetween to form a channel between the source electrode 10 and the drain electrode 12. The pattern 49 is further provided. The semiconductor pattern 49 further includes an ohmic contact layer 50 on the active layer 48 for ohmic contact with the data line 4, the source electrode 10, and the drain electrode 12.

The pixel electrode 14 is connected to the drain electrode 12 of the thin film transistor 6 through the contact hole 17 and is formed in the pixel region 5. In particular, the pixel electrode 14 may include a horizontal portion 14A connected to the drain electrode 12 and parallel to the adjacent gate line 2, and a second horizontal portion 14B formed to overlap the common line 16. And a finger portion 14C formed parallel to the common electrode 18 between the first and second horizontal portions 14A and 14B.

The common electrode 18 is connected to the common line 16 to be formed of the same metal as the gate line 2 and the gate electrode 8 in the pixel region 5. In particular, the common electrode 18 is formed in the pixel region 5 to be parallel to the finger portion 14C of the pixel electrode 14.

Accordingly, a horizontal electric field is formed between the pixel electrode 14 supplied with the pixel signal through the thin film transistor 6 and the common electrode 18 supplied with the reference voltage through the common line 16. In particular, a horizontal electric field is formed between the finger portion 14C of the pixel electrode 14 and the common electrode 18. The horizontal electric field causes liquid crystal molecules arranged in a horizontal direction between the thin film transistor array substrate and the color filter array substrate to rotate by dielectric anisotropy. According to the degree of rotation of the liquid crystal molecules, the light transmittance passing through the pixel region 5 is changed, thereby realizing an image.

Such thin films, such as a common electrode and a pixel electrode, of a liquid crystal display panel are formed by a photolithography process and an etching process.

Hereinafter, a photolithography process and an etching process for forming any one of the common electrode and the pixel electrode will be described with reference to FIGS. 3A to 3C.

First, a thin film 55a is formed on the substrate 45 to form a common electrode, a pixel electrode, and the like. Thereafter, a photoresist pattern 65a is formed on the substrate 45 on which the thin film 55a is formed, as shown in FIG. 3A by a photolithography process using a mask. Meanwhile, depending on the type of liquid crystal display panel or the type of display element, different functions or different types of thin film patterns may be formed between the substrate 45 and the thin film 55a. In FIG. 3A, a gate insulating film may be formed and a plurality of thin films 55a including a protective film may be formed.

Thereafter, an etching process using the photoresist pattern as a mask is performed to form a thin film pattern 55b, for example, a common electrode or a pixel electrode, as shown in FIG. 3B. Thereafter, the strip process is performed to remove the photoresist pattern 65a as shown in FIG. 3C.

On the other hand, in such a photolithography process, the line width of the photoresist pattern may not be formed to be less than 3 ~ 4㎛ depending on the process margin or process limitations.

Accordingly, even when the common electrode 18 and the pixel electrode 14 having the minimum line width are formed, when the image is implemented as shown in FIG. 4, the outlines of the common electrode 18 and the pixel electrode 14 are drawn on the image. There is a problem that the aperture ratio and the luminance are lowered.

Accordingly, an object of the present invention is to provide a method of manufacturing a liquid crystal display panel which can improve the aperture ratio and the brightness.

In order to achieve the above object, a method of manufacturing a liquid crystal display panel according to an embodiment of the present invention comprises the steps of forming a thin film on the substrate; Forming a photoresist pattern on the thin film; Ashing the photoresist pattern; And etching the thin film by using the photoresist pattern reduced in volume and size by the ashing as a mask to form a thin film pattern.

The gas used in the ashing includes 0 _{2 of} about 90% to 99.99% and SF ₆ of about 0.01% to 10%, or 0 _{2 of} about 90% to 99.99% and CF ₄ of about 0.01% to 10%. Characterized in that.

A method of manufacturing a liquid crystal display panel according to the present invention includes forming a common electrode and a pixel electrode forming a horizontal electric field on a substrate, wherein at least one of the common electrode and the pixel electrode is formed. Forming an electrode material on the substrate; Forming a photoresist pattern on the electrode material; Ashing the photoresist pattern; Etching the electrode material using a photoresist pattern reduced in volume and size by the ashing as a mask; And removing the ashed photoresist pattern.                     

Forming a gate pattern on the substrate, the gate pattern including a gate line formed of the same material as the common electrode and a gate electrode connected to the gate line; Forming a gate insulating film to cover the gate pattern and the common electrode; Forming a semiconductor pattern on the gate electrode with the gate insulating layer interposed therebetween to form a channel of the thin film transistor; The method may further include forming a source / drain pattern including a data line crossing the gate line and a source electrode and a drain electrode of the thin film transistor connected to the data line.

At least one of the common electrode and the pixel electrode has a line width of about 1 μm to about 2 μm.

Other objects and features of the present invention in addition to the above objects will become apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 5A to 7.

5A to 5D illustrate a method of manufacturing a thin film pattern in a method of manufacturing a liquid crystal display panel according to an exemplary embodiment of the present invention.

First, thin film patterns such as a common electrode and a pixel electrode are formed by the following method.

A thin film 155a is formed on the substrate 145 to form a common electrode, a pixel electrode, and the like. Thereafter, a photoresist pattern 165a is formed on the substrate 145 on which the thin film 155a is formed, as shown in FIG. 5A by a photolithography process using a mask. Meanwhile, depending on the type of liquid crystal display panel or the type of display element, different functions or different types of thin film patterns may be formed between the substrate 145 and the thin film 155a. In FIG. 5A, a gate insulating layer may be formed and a plurality of thin films 155a including a protective layer may be formed.

Thereafter, the ashing process using a predetermined gas is performed to remove a portion of the photoresist pattern 165a, thereby forming a photoresist pattern 165b having a reduced volume and size as shown in FIG. 5B. Here, the gas used in ashing is a gas in which 90% to 99.99% of 0 ₂ and 0.01% to 10% of SF ₆ are mixed, or 90% to 99.99% of 0 ₂ and 0.01% to 10% The gas mixed with CF ₄ is used.

Subsequently, an etching process using the ashed photoresist pattern 165b as a mask is performed to form a thin film pattern 155b, for example, a common electrode or a pixel electrode, as illustrated in FIG. 5C. Thereafter, the strip process is performed to remove the photoresist pattern 165b as shown in FIG. 5D.

As described above, in the method of manufacturing the liquid crystal display panel according to the present invention, the photoresist pattern for forming the thin film pattern is formed and then the ashing process is performed to form a photoresist pattern having a reduced size and volume than in the related art. By forming a thin film pattern using the ashed photoresist pattern, it is possible to form a thin film pattern such as a fine common electrode and a pixel electrode having a smaller line width than the conventional one. As a result, in the horizontal electric field type liquid crystal display panel, as the line widths of the common electrode and the pixel electrode become smaller, the aperture ratio and the luminance can be improved by that much.

Hereinafter, a method of manufacturing a liquid crystal display panel using the photolithography process to which the ashing process is added will be described with reference to FIGS. 6A to 6E.

First, the gate metal layer is deposited on the substrate 145 through a deposition method such as sputtering, and then the gate metal layer is patterned by a photolithography process, an ashing process, and an etching process, thereby as shown in FIG. 6A. A gate pattern including a gate line is formed and a common electrode 118 is formed. Here, the photolithography process, the ashing process, and the etching process may be used as it is described with reference to FIGS. 5A to 5D, so that the common electrode 118 may be formed with a small line width of about 1 μm to 2 μm. Aluminum neodium (AlNd), aluminum (Al), or the like is used as the gate metal layer. As the ashing gas used in the ashing process, a gas in which 90% to 99.99% of 0 ₂ and 0.01% to 10% of SF ₆ is mixed is used or 90% to 99.99% of 0 ₂ and 0.01% to 10% A gas in which CF ₄ is mixed is used.

The gate insulating layer 146 is formed by depositing an entire surface of the inorganic insulating material on the lower substrate 145 on which the gate pattern and the like are formed by a deposition method such as PECVD. Here, as the material of the gate insulating film 146, silicon nitride (SiNx), silicon oxide (SiOx), or the like, which is an inorganic insulating material, is used. The first and second semiconductor layers are deposited on the lower substrate 145 on which the gate insulating layer 146 is formed, and then patterned by a photolithography process and an etching process to thereby form the active layer 148 and the ohmic contact as shown in FIG. 6B. A semiconductor pattern 149 is formed that includes the layer 150.

After the date metal is deposited on the gate insulating layer 146 on which the semiconductor pattern 149 is formed, a source metal including a data line, a source electrode 110 and a drain electrode 112 is patterned by a photolithography process and an etching process. A drain pattern is formed. Next, the active layer 148 is exposed as shown in FIG. 6C by dry etching the ohmic contact layer 150 of the thin film transistor 106 with the source and drain electrodes 110 and 112 as a mask. Here, chromium (Cr), molybdenum (Mo), titanium (Ti), or the like is used as the data metal material.

A protective film 152 is formed by depositing an inorganic insulating material on the lower substrate 145 on which the source / drain patterns are formed. Here, as the material of the protective film 152, silicon nitride (SiNx), silicon oxide (SiOx), or the like, which is an inorganic insulating material, is used. Thereafter, the protective film 152 is patterned by a photolithography process and an etching process to form a contact hole 117 as shown in FIG. 6D. The contact hole 117 exposes the drain electrode 112 of the thin film transistor 106.

The transparent electrode material is deposited on the lower substrate 145 on which the passivation layer 152 is formed by a deposition method such as sputtering, and then etched by a photolithography process, an ashing process, and an etching process. 114) is formed. Here, the photolithography process, the ashing process, and the etching process may be performed using the method described with reference to FIGS. 5A to 5D as it is, so that the pixel electrode 114 may be formed with a small line width of about 1 μm to 2 μm. Transparent electrode materials include indium tin oxide (ITO), tin oxide (TO), indium zinc oxide (IZO), or indium tin zinc oxide (ITZO). Is used.

As described above, the method for manufacturing a liquid crystal display panel according to the present invention forms a photoresist pattern using a photo process, and then separately adds an ashing process to form a photoresist pattern having a small size that cannot be formed by a conventional photo process. You can do it. The pixel electrode 114 and the common electrode 118 can be formed using the small size of the photoresist pattern, thereby forming the common electrode 118 and the pixel electrode having a smaller line width as compared with the conventional art. As a result, as shown in FIG. 7, the aperture ratio is widened by a smaller line width, thereby improving luminance.

As described above, in the method of manufacturing the liquid crystal display panel according to the present invention, after forming the photoresist pattern using the photo process, the ashing process may be added separately to form the photoresist pattern having a fine size. As a result, the common electrode and the pixel electrode having a smaller line width can be formed as compared with the related art, thereby improving the aperture ratio and luminance.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (7)

Forming a thin film on the substrate; Forming a photoresist pattern on the thin film; Ashing the photoresist pattern to reduce the volume and width of the photoresist pattern; And forming a thin film pattern having a line width of 1 μm or more and less than 2 μm by etching the thin film using the photoresist pattern whose volume and width reduced by the ashing as a mask. Way. The method of claim 1, The gas used in the ashing is a mixture of 90% to 99.99% 0 ₂ and 0.01% to 10% SF ₆ mixed gas or 90% to 99.99% 0 ₂ and 0.01% to 10% CF ₄ mixed gas. A liquid crystal display panel manufacturing method characterized by the above-mentioned. delete A method of manufacturing a liquid crystal display panel comprising forming a common electrode and a pixel electrode forming a horizontal electric field on a substrate, Forming at least one selected from the common electrode and the pixel electrode Forming an electrode material on the substrate; Forming a photoresist pattern on the electrode material; Ashing the photoresist pattern to reduce the volume and width of the photoresist pattern; Etching the electrode material using a photoresist pattern whose volume and width are reduced by ashing as a mask; Removing the ashed photoresist pattern; And at least one selected from the common electrode and the pixel electrode formed by etching the electrode material has a line width of 1 µm or more and less than 2 µm. The method of claim 4, wherein The gas used in the ashing is a mixture of 90% to 99.99% 0 ₂ and 0.01% to 10% SF ₆ mixed gas or 90% to 99.99% 0 ₂ and 0.01% to 10% CF ₄ mixed gas. A liquid crystal display panel manufacturing method characterized by the above-mentioned. The method of claim 4, wherein Forming a gate pattern on the substrate, the gate pattern including a gate line formed of the same material as the common electrode and a gate electrode connected to the gate line; Forming a gate insulating film to cover the gate pattern and the common electrode; Forming a semiconductor pattern on the gate electrode with the gate insulating layer interposed therebetween to form a channel of the thin film transistor; And forming a source / drain pattern including a data line crossing the gate line and a source electrode and a drain electrode of the thin film transistor connected to the data line. delete

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