KR20020058524A - Bottom electrode of capacitor - Google Patents

Abstract

PURPOSE: A lower electrode of a capacitor is provided to prevent an oxidation of an ohmic contact layer by using a titanium aluminide as a diffusion barrier metal. CONSTITUTION: A TiSi2 ohmic contact layer(23) is formed on a polysilicon layer(22). A titanium aluminide diffusion barrier metal(24) is formed on the TiSi2 ohmic contact layer(23). A lower electrode(25) stacked sequentially an Ir film(25a) and an IrOx film(25b) is formed on the titanium aluminide diffusion barrier metal. A dielectric film(26) and an upper electrode(27) are sequentially formed on the lower electrode of Ir/IrOx films. At this time, a TiAl3, a TiAl or a Ti3Al is used as the titanium aluminide diffusion barrier metal(24).

Description

Bottom electrode of capacitor

The present invention relates to a lower electrode of a capacitor, and more particularly, to a capacitor lower electrode using titanium aluminide as a barrier metal.

Typically, the lower electrode of the capacitor used RTN (Rapid Thermal Nitrization) surface-treated polysilicon.

On the other hand, as devices are increasingly integrated, the capacitance per cell for stable device operation remains unchanged, while the capacitor cell size gradually decreases, and the capacitor having polysilicon as the lower electrode having an effective oxide thickness of about 30Å has reached its limit. .

In order to solve this problem, a method of lowering the effective oxide thickness by introducing a lower metal electrode has been attempted. The introduction of the lower metal electrode requires a barrier metal layer forming process for preventing thermal reaction between the polysilicon as the plug material and the lower metal electrode.

Meanwhile, since the lower metal electrode is heat treated at a temperature of 700 ° C. or higher, it is necessary to develop a barrier metal having excellent oxidation resistance and structural stability at a high temperature at which the barrier metal layer also does not decompose at a higher temperature.

1 is a cross-sectional view of a semiconductor device having a conventional high dielectric film MIM capacitor.

Referring to FIG. 1, an insulating layer 11 is selectively etched on the conductive layer 10 to form a contact hole (not shown), and is recessed only in a part of the contact hole (not shown). The polysilicon plug 12 is formed, and the TiSi ₂ ohmic contact layer 13 and the TiN barrier metal layer 14 are formed on the recessed polysilicon plug 12 by thermal reaction of Ti and polysilicon. have.

The lower metal electrode 15, the high-k dielectric layer 16, and the upper metal electrode 17 are stacked on the TiN barrier metal layer 14.

On the other hand, in the prior art MIM capacitor manufacturing process, the TiN barrier metal layer 14 is decomposed at 650 ° C. or higher, and the underlying TiSi ₂ ohmic contact layer 13 and the polysilicon plug 12 are oxidized at a high temperature of 700 ° C. or higher. Problems arise in applications in high-k dielectric capacitors that require high temperature heat treatment.

The present invention is to solve the problems of the prior art as described above, by using titanium aluminide as a barrier metal, by using a conductive oxide as a lower metal electrode, by thermal decomposition of the lower metal electrode and barrier metal layer at high temperature An object of the present invention is to provide a capacitor lower electrode capable of preventing oxidation of the underlying layer to form a stable lower metal electrode and to improve electrical characteristics of the capacitor.

1 is a cross-sectional view showing a lower electrode of a capacitor formed according to the prior art;

2A to 2D are cross-sectional views illustrating a process of manufacturing a lower electrode of a capacitor according to an embodiment of the present invention.

Explanation of symbols on the main parts of the drawings

20: conductive layer

21: insulating film

22: polysilicon film

23: TiSi ₂ ohmic contact layer

24: titanium aluminide diffusion barrier layer

25a: Ir layer

25b: IrO _x layer

25: Ir / IrO _x layer

26: dielectric film

27: upper electrode

In order to achieve the above object, the present invention is a lower electrode of the capacitor, a polysilicon film; A TiSi ₂ ohmic contact layer formed on the polysilicon film; A titanium aluminide diffusion barrier layer formed on the TiSi ₂ ohmic contact layer; And Ir / IrO _x (where x is 1.5 to 2.5) layer formed on the titanium aluminide diffusion barrier layer.

Hereinafter, in order to explain in detail enough to enable those skilled in the art to easily carry out the technical idea of the present invention, refer to FIGS. 2A to 2D attached to the most preferred embodiment of the present invention. Will be explained.

Figure 2d is a view showing the lower electrode of the capacitor of the present invention.

Referring to FIG. 2D, a polysilicon layer 22 is recessed in a contact hole (not shown) formed by coating an insulating layer 21 on the conductive layer 20. A TiSi ₂ ohmic contact layer 23 is formed on the polysilicon layer 22 inside the contact hole (not shown), and the titanium aluminide diffusion barrier layer 24 is formed on the TiSi ₂ ohmic contact layer 23. ) Is formed. An Ir / IrO _x (where x is 1.5 to 2.5) layer, a dielectric film, and an upper electrode are formed on the titanium aluminide diffusion barrier layer 24.

2A to 2D are cross-sectional views illustrating a semiconductor device manufacturing process of the present invention.

First, as shown in FIG. 2A, the insulating film 21 on the conductive layer 20 is selectively etched to form a capacitor contact hole (not shown). In this case, the conductive layer 20 cuts a conventional transistor source / drain junction in the case of a memory device. Since the present invention can be sufficiently applied to not only a memory device but also to other semiconductor devices, the conductive layer 20 may be formed in addition to the junction. It may be any other conductive layer such as a polysilicon layer. In addition, an oxide film-based thin film is generally applied to the insulating film 21. In the memory device, a multilayer oxide film is usually applied in consideration of interlayer insulation and planarization.

Subsequently, a polysilicon film for plug is deposited and then etched back to form a polysilicon film 22 inside the contact hole (not shown), but the contact hole (not shown) is recessed in the upper region of the contact hole (not shown). The polysilicon film 22 is formed only in a part of the inner region. Subsequently, the Ti thin film is deposited, and the TiSi ₂ ohmic contact layer 23 is formed by thermal reaction with the lower polysilicon.

Next, as shown in FIG. 2B, a titanium aluminide diffusion barrier layer 24 is formed on the TiSi ₂ ohmic contact layer 23 in the contact hole (not shown).

In the case of TiN, which is a conventional barrier metal, the TiSi ₂ ohmic contact layer 23 and the polysilicon film 22 at the bottom thereof cannot be prevented from being thermally decomposed in a subsequent thermal process performed at a high temperature of 650 ° C. or higher to prevent the diffusion of oxygen into the underlying layer. This oxidation prevents oxygen diffusion into the underlying layer with high temperature resistance that does not thermally decompose even at a high temperature of 1000 ° C or higher, and it is not reactive with TiSi ₂ , so there is no fear of side products, and titanium aluminide having excellent electrical conductivity is introduced into the barrier metal. By doing so, it is possible to form a stable lower electrode.

Here, the titanium aluminide is applied to an alloy of Ti and Al of TiAl, Ti ₃ Al or TiAl ₃ .

Next, Ir and IrO _x (x is 1.5 to 2.5) are deposited on the resultant to form the Ir / IrO _x lower metal electrode 25 as shown in FIG. 2C.

The process of forming the Ir / IrO _x lower electrode 25 will be described in detail.

IrO _x is a conductive oxide that prevents the diffusion of oxygen by contact with high-k dielectric films such as ferroelectrics, and has excellent high temperature resistance and conductivity, but it causes oxidation of the metal when contacted with metals such as titanium aluminide. In order to make contact on the _N-type , the Ir layer 25a is first deposited, and then the IrO _x layer 25b is deposited to form the Ir / IrO _x lower metal electrode 25.

In another embodiment of the present invention, the lower metal electrode may be applied to Ru / RuO _x (x is 1.5 to 2.5) having characteristics similar to Ir / IrO _x .

Next, as shown in FIG. 2D, a capacitor in which the dielectric layer 26 and the upper electrode 27 are stacked is formed on the Ir / IrO _x lower metal electrode 25. The capacitor contact is formed of a stacked Ir / IrO _x bottom electrode 25, a titanium aluminide diffusion barrier layer 24, a TiSi ₂ ohmic contact layer 23, and a polysilicon film 22. The dielectric layer 26 may include BST ((Ba, Sr) TiO ₃ ), Ta ₂ O ₅ , PLZT ((Pb, La) (Zr, Ti) O ₃ ), SBTN (SrBi ₂ (Ta, Nb) ₂ Oxides such as O ₉ ) or BLT ((Bi, La) ₄ Ti ₃ O ₁₂ ).

In addition, the upper electrode 27 may apply at least one of Pt, Ir, IrO ₂ , Ru, or RuO _x .

In performing the above process, the formation of the capacitor can be applied by the following various procedures through dry etching using plasma.

First, a method of forming the upper electrode 27, the dielectric layer 26 and the lower electrode 25 by one etching,

Secondly, etching the upper metal electrode 27 first, and then etching the high-k dielectric layer 26 and the lower metal electrode 25 in two etchings.

Third, the upper metal electrode 27 and the high-k dielectric layer 26 are etched first, and then the lower metal electrode 25 is etched twice.

On the other hand, the capacitor can be manufactured in various shapes such as cylindrical, cylindrical, in addition to the flat type shown in the figure.

As described above, the capacitor lower electrode of the present invention uses Ir / IrO _x or Ru / RuO _x as the lower electrode and prevents the diffusion of oxygen at a high temperature by forming titanium aluminide as a barrier metal to form a stable lower electrode. It was found through the examples that the electrode capacity and the electrical properties can be improved.

Although the technical spirit of the present invention has been described in detail according to a preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.

The present invention can improve the stability of the lower electrode in the capacitor lower electrode.

Claims (3)

In the lower electrode of the capacitor, Polysilicon film; A TiSi ₂ ohmic contact layer formed on the polysilicon film; A titanium aluminide diffusion barrier layer formed on the TiSi ₂ ohmic contact layer; And Ir / IrO _x (where x is 1.5 to 2.5) layer formed on the titanium aluminide diffusion barrier layer Capacitor lower electrode comprising a. In the lower electrode of the capacitor, Polysilicon film; A TiSi ₂ ohmic contact layer formed on the polysilicon film; A titanium aluminide diffusion barrier layer formed on the TiSi ₂ ohmic contact layer; And Ru / RuO _x (where x is 1.5 to 2.5) layer formed on the titanium aluminide diffusion barrier layer Capacitor lower electrode comprising a. The method according to claim 1 or 2, The titanium aluminide, Capacitor lower electrode, characterized in that any one of TiAl ₃ , TiAl or Ti ₃ Al.