KR20020058203A - 반도체패키지 및 이를 위한 외부 입출력단자 범핑 방법 - Google Patents
반도체패키지 및 이를 위한 외부 입출력단자 범핑 방법 Download PDFInfo
- Publication number
- KR20020058203A KR20020058203A KR1020000086240A KR20000086240A KR20020058203A KR 20020058203 A KR20020058203 A KR 20020058203A KR 1020000086240 A KR1020000086240 A KR 1020000086240A KR 20000086240 A KR20000086240 A KR 20000086240A KR 20020058203 A KR20020058203 A KR 20020058203A
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- South Korea
- Prior art keywords
- external input
- circuit board
- output terminal
- semiconductor package
- land
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Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4007—Surface contacts, e.g. bumps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10734—Ball grid array [BGA]; Bump grid array
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
Description
Claims (7)
- 중앙에 관통공이 형성되어 있고, 상면에는 다수의 랜드 및 본드핑거를 갖는 배선패턴이 형성된 회로기판과, 상기 회로기판의 관통공 내측에 위치되며, 상면에 다수의 입출력패드가 형성된 반도체칩과, 상기 반도체칩과 회로기판의 본드핑거를 전기적으로 연결시키는 도전성와이어와, 상기 회로기판의 관통공에 충진되어 상기 반도체칩, 도전성와이어를 외부환경으로부터 보호하는 봉지부와, 상기 회로기판의 각 랜드에 융착된 외부 입출력단자로 이루어진 반도체패키지에 있어서,상기 외부 입출력단자는 상기 랜드에 융착된 대략 원통형의 도전성 몸체와, 상기 몸체의 단부에 대략 반구형(半球形)으로 연장되어 형성된 도전성 꼬리부로 이루어진 것을 특징으로 하는 반도체패키지.
- 제1항에 있어서, 상기 꼬리부는 대략 원뿔 모양으로 형성된 것을 특징으로 하는 반도체패키지.
- 제1항에 있어서, 상기 외부 입출력단자는 원뿔, 삼각뿔 또는 사각뿔 모양중 선택된 어느 하나로 형성된 것을 특징으로 하는 반도체패키지.
- 제1항에 있어서, 상기 외부 입출력단자는 단부가 절단된 원뿔, 삼각뿔, 사각뿔중 어느 하나로 형성된 것을 특징으로 하는 반도체패키지.
- 반도체패키지의 회로기판중 랜드에 외부 입출력단자를 범핑하는 방법에 있어서,상기 회로기판의 각 랜드에 끈적한 플럭스를 돗팅하는 단계와;상기 각 플럭스 상부에 대략 원통형의 도전성 몸체와, 상기 몸체로부터 연장된 원뿔 모양의 도전성 꼬리부로 이루어진 외부 입출력단자를 임시로 부착하는 단계와;상기 반도체패키지를 고온의 퍼니스에 투입하여, 상기 몸체가 랜드에 융착되어 고정되고, 상기 원뿔 모양의 꼬리부는 대략 반구형으로 융용되도록 하는 단계를 포함하여 이루어진 반도체패키지의 외부 입출력단자 범핑 방법.
- 제5항에 있어서, 상기 임시로 외부 입출력단자를 부착하는 단계는 통공이 형성된 튜브에 몸체와 꼬리부로 이루어진 외부 입출력단자가 순차적으로 수납된 픽커에 의해 수행됨을 특징으로 하는 반도체패키지의 외부 입출력단자 범핑 방법.
- 반도체패키지의 회로기판중 랜드에 외부 입출력단자를 범핑하는 방법에 있어서,상기 회로기판의 각 랜드와 대응되는 위치에 통공이 형성됨과 동시에 내측에 일정 공간이 형성된 몸체를 구비하고, 상기 몸체 내측에 일정 부피의 도전성 물질이 수납됨과 동시에, 상기 몸체의 내측에는 상기 도전성 물질이 융용되도록 히터가장착된 범핑수단을 준비하는 단계와;상기 범핑수단의 몸체중 상기 통공과 회로기판의 랜드 위치가 대응되도록 한 상태에서, 상기 통공을 통하여 상기 랜드에 원통형 몸체와 원뿔형 꼬리부로 이루어진 외부 입출력단자가 고착되도록 하는 단계를 포함하여 이루어진 반도체패키지의 외부 입출력단자 범핑 방법.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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KR1020000086240A KR100658879B1 (ko) | 2000-12-29 | 2000-12-29 | 반도체패키지 및 이를 위한 외부 입출력단자 범핑 방법 |
Applications Claiming Priority (1)
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KR1020000086240A KR100658879B1 (ko) | 2000-12-29 | 2000-12-29 | 반도체패키지 및 이를 위한 외부 입출력단자 범핑 방법 |
Publications (2)
Publication Number | Publication Date |
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KR20020058203A true KR20020058203A (ko) | 2002-07-12 |
KR100658879B1 KR100658879B1 (ko) | 2006-12-15 |
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100699237B1 (ko) * | 2005-06-23 | 2007-03-27 | 삼성전기주식회사 | 임베디드 인쇄회로기판 제조방법 |
CN108336038A (zh) * | 2018-03-13 | 2018-07-27 | 昆山丘钛微电子科技有限公司 | 封装结构、封装方法和摄像头模组 |
CN117038683A (zh) * | 2023-07-07 | 2023-11-10 | 信扬科技(佛山)有限公司 | 光机电模组、半导体封装组件及其制造方法 |
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- 2000-12-29 KR KR1020000086240A patent/KR100658879B1/ko active IP Right Grant
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100699237B1 (ko) * | 2005-06-23 | 2007-03-27 | 삼성전기주식회사 | 임베디드 인쇄회로기판 제조방법 |
CN108336038A (zh) * | 2018-03-13 | 2018-07-27 | 昆山丘钛微电子科技有限公司 | 封装结构、封装方法和摄像头模组 |
CN108336038B (zh) * | 2018-03-13 | 2024-03-22 | 昆山丘钛微电子科技有限公司 | 封装结构、封装方法和摄像头模组 |
CN117038683A (zh) * | 2023-07-07 | 2023-11-10 | 信扬科技(佛山)有限公司 | 光机电模组、半导体封装组件及其制造方法 |
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KR100658879B1 (ko) | 2006-12-15 |
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