KR20020002969A - Field emission display - Google Patents

Abstract

PURPOSE: A field emission display is provided to minimize power consumption and improve resolution by forming an emitter near a crossing portion between a cathode electrode and a gate electrode. CONSTITUTION: A gate electrode(46) and a cathode electrode(48) cross each other. An emitter(50) is formed on the cathode electrode(48) near a crossing portion(70) between the gate electrode(46) and the cathode electrode(48). The emitter(50) is formed by a rectangular shape along a longitudinal direction of the cathode electrode(48). A negative cathode voltage is applied to the cathode electrode(48). A positive anode voltage is applied to an anode electrode. A positive anode voltage is applied to the gate electrode(46). Electrons emitted from the emitter(50) are accelerated to the anode electrode. A red, a blue, and a green fluorescent material are excited by the accelerated electrons. A visible ray is emitted from the excited fluorescent material.

Description

Field emission display device {Field Emission Display}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a field emission display device, and more particularly, to a field emission display device capable of minimizing power consumption and realizing high resolution image quality.

Recently, various flat panel displays have been developed to reduce weight and volume, which are disadvantages of cathode ray tubes (CRTs). Such flat panel displays include liquid crystal displays (hereinafter referred to as "LCD"), field emission displays (hereinafter referred to as "FED"), and plasma display panels (hereinafter referred to as "PDP"). And electroluminescence (hereinafter referred to as "EL"). In order to improve the display quality, research and development have been actively conducted to increase the brightness, contrast and color purity of flat panel displays.

The FED concentrates a high field on a sharp cathode (emitter), emits electrons by a quantum mechanical tunnel effect, and displays an image by exciting the phosphor using the emitted electrons.

1 and 2 illustrate a conventional field emission display device.

1 and 2, an FED having an upper glass substrate 2 on which an anode electrode 4 and a phosphor 6 are stacked, and a field emission array 32 formed on the lower glass substrate 8. Is shown. The field emission array 32 includes the cathode electrode 10 and the resistive layer 12 formed on the lower glass substrate 8, and the gate insulating layer 14 and the emitter 22 formed on the resistive layer 12. ) And a gate electrode 16 formed on the gate insulating layer 14. The cathode electrode 10 supplies a current to the emitter 22, and the resistive layer 12 limits the overcurrent applied from the cathode electrode 10 toward the emitter 22, thereby making it uniform to the emitter 22. It serves to supply current. The gate insulating layer 14 insulates between the cathode electrode 10 and the gate electrode 16. The gate electrode 16 is used as an extraction electrode for drawing electrons. A spacer 40 is installed between the upper glass substrate 2 and the lower glass substrate 8. The spacer 40 supports the upper glass substrate 2 and the lower glass substrate 8 so as to maintain a high vacuum state between the upper glass substrate 2 and the lower glass substrate 8.

In order to display an image, a negative (-) cathode voltage is applied to the cathode electrode 10 and a positive (+) anode voltage is applied to the anode electrode 4. A positive anode voltage is applied to the gate electrode 16. Then, the electron beam 30 emitted from the emitter 22 is accelerated toward the anode electrode 4. The electron beam 30 collides with the red, green, and blue phosphors 6 to excite the phosphors 6. At this time, visible light of any one of red, green, and blue colors is generated according to the phosphor 6.

3 is a view illustrating in detail a conventional gate electrode and a cathode electrode.

Referring to FIG. 3, the gate electrode 16 and the cathode electrode 10 are formed to cross each other. A plurality of holes 42 are formed in the gate electrode 16 at the intersection 44 of the gate electrode 16 and the cathode electrode 10. An emitter 22 is formed in each of the plurality of holes 42, and electrons emitted from the emitter 22 are accelerated to the anode electrode 4 through the hole 42. In order to achieve high luminance in such an FED, many electrons must be emitted to the anode electrode 4. That is, many holes 42 must be formed in the gate electrode 16. To this end, the cross section 44 should be formed in a wide area of more than a predetermined.

In the FED formed as described above, a panel capacitance is generated between the cathode electrode 10 and the gate electrode 16 when a constant voltage is applied to the cathode electrode 10 and the gate electrode 16 to emit electrons. Since the value of the panel capacitance is s / d (s: area, d: distance), the larger the area of the intersection 44 is, the larger the value appears. When electrons are emitted by the panel capacitance, a large amount of power is consumed between the cathode electrode 10 and the gate electrode 16 and the electron emission efficiency is lowered. In addition, the emitter 22 formed on the cathode electrode 10 is formed by a vacuum deposition method. Emitters 22 formed by the vacuum deposition method are less uniform in the panel. That is, there is a problem that the luminance is lowered because the electron emission efficiency of the emitters 22 is different.

Accordingly, an object of the present invention is to provide a field emission display device capable of minimizing power consumption and realizing high resolution image quality.

1 is a perspective view showing a conventional field emission display device.

FIG. 2 is a cross-sectional view illustrating the field emission display device illustrated in FIG. 1. FIG.

3 is a plan view of the cathode electrode and the gate electrode shown in FIG.

4 is a plan view showing a cathode electrode and a gate electrode of the present invention.

5A and 5E are plan views illustrating emitters formed on the cathode electrode of FIG. 4.

FIG. 6 is a cross-sectional view illustrating the cathode electrode and the gate electrode shown in FIG. 4. FIG.

<Description of Symbols for Main Parts of Drawings>

2: upper glass substrate 4: anode electrode

6: phosphor 8,60: lower glass substrate

10,48 cathode electrode 12,62 resistive layer

14,64: gate insulating layer 16,46: gate electrode

22, 50, 52a, 52b, 52c, 52d: emitter 30: electron beam

32,58: field emission array 42: hole

44,70: intersection

In order to achieve the above object, the field emission display device according to the present invention includes an electrode, a gate electrode formed in a direction crossing the cathode electrode, an emission electrode formed on the cathode electrode, and formed adjacent to the intersection of the cathode electrode and the gate electrode. It is provided with a foundation.

Other objects and features of the present invention in addition to the above objects will become apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 4 to 6.

4 is a view showing in detail the gate electrode and the cathode electrode according to an embodiment of the present invention.

Referring to FIG. 4, the gate electrode 46 and the cathode electrode 48 are formed in a direction crossing each other. Emitter 50 is formed on cathode electrode 48 adjacent to intersection 70 where gate electrode 46 and cathode electrode 48 intersect. In contrast to the prior art, the emitter 50 is formed in the present invention adjacent to the intersection 70 without being formed in the intersection 70. The emitter 50 is formed in a rectangle along the longitudinal direction of the cathode electrode 48.

In order to display an image, a negative (-) cathode voltage is applied to the cathode electrode 48 and a positive (+) anode voltage is applied to an anode electrode not shown. A positive anode voltage is applied to the gate electrode 46. Then, the electrons emitted from the emitter 50 are accelerated toward the anode electrode. These electrons collide with red, green and blue phosphors, which are not shown, to excite the phosphors. At this time, visible light of any one of red, green, and blue colors is generated depending on the phosphor. Electrons emitted from emitter 50 are widely distributed along the interface. That is, many electrons are emitted from the emitter 50 to realize high brightness. In addition, since the emitter 50 is not formed at the intersection 70, the area of the intersection 70 can be minimized. That is, the panel capacitance generated between the cathode electrode 48 and the gate electrode 46 can be minimized when electrons are emitted. In the present invention, the cathode electrode 48 is formed of any one of indium-tin-oxide (ITO) and a metal. Even if the cathode electrode 48 is formed of either ITO or metal, the same effects as in the embodiment of the present invention can be obtained. In addition, in the present invention, the emitter 50 may be positioned to be close to the gate electrode 46 to lower the driving voltage.

In the present invention, the shape of the emitter 50 may be variously modified as shown in FIGS. 5A to 5E.

Referring to FIG. 5A, the emitter 52a is formed in a polygonal shape on a plane. That is, the emitter 52a is formed in the shape of a pentagon such that the side adjacent to the intersection 70 protrudes. In addition, as illustrated in FIG. 5B, the emitter 52b may be formed in a hexagonal shape on a plane such that the sides adjacent to the intersection portion 70 and the opposite sides thereof protrude. Furthermore, as shown in FIG. 5C, the emitter 52c may be formed in a sawtooth shape on the plane of the side adjacent to the intersection 70. In addition, as illustrated in FIG. 5D, the emitter 52d may have a sawtooth shape on the side adjacent to the intersection 70 and the opposite side thereof. In addition, as shown in FIG. 5E, a plurality of emitters 52e may be formed in a pentagonal shape on a plane such that the side adjacent to the intersection 70 protrudes.

When the emitters 52a, 52b, 52c, 52d, 52e are formed in any one of the emitters 52a, 52b, 52c, 52d, 52e shown in Figs. 5A to 5E, the emitters 52a, 52b, Many electrons are emitted from the protrusions of 52c, 52d, and 52e. Such emitters 52a, 52b, 52c, 52d, 52e are formed by a printing method or the like.

6 is a cross-sectional view illustrating a cathode electrode and an anode electrode formed on a lower substrate of the field emission display device according to an exemplary embodiment of the present invention.

Referring to FIG. 6, the field emission array 58 formed on the lower glass substrate 60 is illustrated. The field emission array 58 includes a cathode electrode 48 and a resistance layer 62 formed on the lower glass substrate 60, a gate insulating layer 64 and an emitter 50 formed on the resistance layer 62. ) And a gate electrode 46 formed on the gate insulating layer 64. The cathode electrode 48 supplies current to the emitter 50, and the resistive layer 62 restricts the overcurrent applied from the cathode electrode 48 toward the emitter 50, thus making the emitter 50 uniform. It serves to supply current. The gate insulating layer 64 insulates between the cathode electrode 48 and the gate electrode 46. Emitter 50 is formed at a lower position than gate electrode 46. As such, when the emitter 50 is formed at a position lower than the gate electrode 46, electrons can be drawn toward the anode electrode (not shown). Therefore, the degree of charge integration can be increased.

As described above, according to the field emission display device according to the present invention, the emitter is formed on the cathode electrode and is formed adjacent to the intersection of the gate electrode and the cathode electrode. Therefore, the width | variety of the width direction of a cathode electrode and a gate electrode can be formed thin. In other words, the panel capacitance can be reduced by reducing the area of the intersection of the cathode electrode and the gate electrode. Therefore, it is possible to minimize the power consumption and to maximize the discharge efficiency. In addition, since the emitter can be formed through a printing method or the like, the uniformity of the emitter can be improved. Furthermore, since the emitter is formed at a lower position than the gate electrode, the degree of charge integration can be increased. In addition, by forming the emitter and the gate electrode in close proximity, it is possible to minimize the consumption of driving power.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (7)

Cathode electrode, A gate electrode formed in a direction crossing the cathode electrode; And at least one emitter formed on the cathode electrode and adjacent to the intersection of the cathode electrode and the gate electrode. The method of claim 1, And the emitters are formed on both sides of the gate electrode. The method of claim 2, The emitter is a field emission display device, characterized in that formed in the plane of a quadrilateral. The method of claim 2, The emitter may include at least one of at least one first protrusion protruding to a side adjacent to the intersection and at least one of at least one second protrusion protruding to a side opposite to the side at which the first protrusion is formed. Field emission display device. The method of claim 2, The emitter is a field emission display device characterized in that at least one side of the side adjacent to the intersection and the side opposite to the adjacent side is patterned in a sawtooth shape. The method of claim 1, And the emitter is formed at a height lower than that of the gate electrode. The method of claim 1, And the cathode is formed of one of indium tin oxide and a metal.