KR20020029565A - Field emission display - Google Patents

Abstract

PURPOSE: A field emission display is provided to improve brightness of the FED by preventing discharge nonuniformity and arcing due to the charges accumulated into the spacer. CONSTITUTION: A field emission display includes an upper plate(50) having a cathode electrode(52) thereon, and a lower plate(70) having an anode electrode(66) thereon. A reflection plate(68) is formed beneath the anode electrode(66), and a phosphor layer(64) and a second insulation layer(62) are formed on the anode electrode(66). An emitter(56), a first insulation layer(58), and a gate electrode(60) are formed successively on the second insulation layer(62). The reflection plate(68) reflects electrons, which are discharged from the emitter and enter the reflection plate, to the upper plate. The anode electrode(66) accelerates the electrons discharged from the emitter to the phosphor layer(64). The phosphor layer(64) emits one visible ray of red, green, and blue by impacting with the electrons. A resistor layer(54) is formed on the rear face of the upper plate. The cathode electrode(52) supplies currents to the emitter(56) and the resistor layer(54) limits over-currents applying from the cathodes electrode to the emitter so as to supply uniform currents to the emitter. The first insulation layer(58) insulates the emitter(56) from the gate electrode(60). The emitter(56), the first insulation layer(58), the gate electrode(60), and the second insulation layer(62) laminated on the rear face of the resistor layer(54) act as spacers so as to maintain a high vacuum state between the upper glass plate and the lower glass plate.

Description

Field emission display device {Field Emission Display}

BACKGROUND OF THE INVENTION Field of the Invention The present invention relates to a field emission display device, and more particularly, to a field emission display device capable of improving luminance.

Recently, various flat panel displays have been developed to reduce weight and volume, which are disadvantages of cathode ray tubes (CRTs). Such flat panel displays include liquid crystal displays (hereinafter referred to as "LCD"), field emission displays (hereinafter referred to as "FED"), and plasma display panels (hereinafter referred to as "PDP"). And electroluminescence (hereinafter referred to as "EL"). In order to improve the display quality, research and development have been actively conducted to increase the brightness, contrast and color purity of flat panel displays.

The FED concentrates a high field on a sharp cathode (emitter), emits electrons by a quantum mechanical tunnel effect, and displays an image by exciting the phosphor using the emitted electrons.

1 and 2, an FED having an upper substrate 2 on which an anode electrode 4 and a phosphor 6 are stacked, and a field emission array 32 formed on the lower substrate 8 is illustrated. It is. The field emission array 32 includes the cathode electrode 10 and the resistive layer 12 formed on the lower substrate 8, and the gate insulating layer 14 and the emitter 22 formed on the resistive layer 12. And a gate electrode 16 formed on the gate insulating layer 14. The cathode electrode 10 supplies a current to the emitter 22, and the resistive layer 12 limits the overcurrent applied from the cathode electrode 10 toward the emitter 22, thereby making it uniform to the emitter 22. It serves to supply current. The gate insulating layer 14 insulates between the cathode electrode 10 and the gate electrode 16. The gate electrode 16 is used as an extraction electrode for drawing electrons. The spacer 40 is installed between the upper substrate 2 and the lower substrate 8. The spacer 40 supports the upper substrate 2 and the lower substrate 8 so as to maintain a high vacuum state between the upper substrate 2 and the lower substrate 8.

In order to display an image, a negative (-) cathode voltage is applied to the cathode electrode 10 and a positive (+) anode voltage is applied to the anode electrode 4. The gate voltage of positive polarity (+) is applied to the gate electrode 16. Then, the electron beam 30 emitted from the emitter 22 is accelerated toward the anode electrode 4. The electron beam 30 collides with the red, green, and blue phosphors 6 to excite the phosphors 6. At this time, visible light of any one of red, green, and blue colors is generated according to the phosphor 6. The spacer 40 is formed in parallel with the gate electrode 16 as shown in FIG. 3. For this reason, when the electron beam 30 generated in any one subpixel or pixel is accelerated toward the phosphor 6, charge 42 is accumulated in the spacer 40 as shown in FIG. 4 by the electron beam 30 diffusion. The accumulated charge 42 distorts the electric field in the panel to change the trajectory of the electron beam 30 around the spacer. In other words, the charges 42 accumulated in the spacer 40 lower the uniformity of the pixel cells or cause unevenness of the discharge, thereby degrading the image quality of the FED. In addition, when the charge 42 is accumulated at a predetermined amount or more on the surface of the spacer 40, the surface of the spacer 40 may be electrically conductive, thereby causing arcing. This arcing phenomenon not only degrades the image quality of the FED, but also destroys the emitter 22, the phosphor 6, and a driving circuit (not shown).

5 is a diagram illustrating a conventional gate electrode and a cathode electrode in detail.

Referring to FIG. 5, the gate electrode 16 and the cathode electrode 10 are formed to cross each other. A plurality of holes 46 are formed in the gate electrode 16 at the intersection 44 of the gate electrode 16 and the cathode electrode 10. An emitter 22 is formed in each of the plurality of holes 46, and electrons emitted from the emitter 22 are accelerated to the anode electrode 4 through the hole 46. In order to achieve high luminance in such an FED, many electrons must be emitted to the anode electrode 4. That is, many holes 46 must be formed in the gate electrode 16. To this end, the cross section 44 should be formed in a wide area of more than a predetermined.

In the FED formed as described above, a panel capacitance is generated between the cathode electrode 10 and the gate electrode 16 when a constant voltage is applied to the cathode electrode 10 and the gate electrode 16 to emit electrons. Since the value of the panel capacitance is s / d (s: area, d: distance), the larger the area of the intersection 44 is, the larger the value appears. When electrons are emitted by the panel capacitance, a large amount of power is consumed between the cathode electrode 10 and the gate electrode 16 and the electron emission efficiency is lowered. In addition, the emitter 22 formed on the cathode electrode 10 is formed by a vacuum deposition method. Emitters 22 formed by the vacuum deposition method are less uniform in the panel. That is, there is a problem that the luminance is lowered because the electron emission efficiency of the emitters 22 is different.

Accordingly, it is an object of the present invention to provide a field emission display device capable of improving luminance.

1 is a perspective view showing a conventional field emission display device.

2 is a cross-sectional view showing a conventional field emission display device.

3 is a plan view illustrating a spacer formed in the field emission display device illustrated in FIG. 1.

4 is a cross-sectional view showing charges accumulated in a spacer of the field emission display shown in FIG. 1;

FIG. 5 is a view showing an intersection of a gate electrode and a cathode electrode shown in FIG. 1;

6 is a perspective view showing a field emission display device according to a first embodiment of the present invention;

FIG. 7 is a cross-sectional view taken along line “A-A '” of FIG. 6;

8 is a cross-sectional view illustrating an electron emission process of the field emission display device illustrated in FIG. 6.

9 is a perspective view showing a field emission display device according to a second embodiment of the present invention.

10 is a perspective view showing a field emission display device according to a third embodiment of the present invention.

FIG. 11 is a cross-sectional view illustrating an electron emission process of the field emission display device illustrated in FIG. 10.

12 is a cross-sectional view showing a field emission display device according to a fourth embodiment of the present invention.

<Description of Symbols for Main Parts of Drawings>

2,50: upper substrate 4,66,74,75,76: anode electrode

6,64: phosphor 8,70: lower substrate

10,52 cathode electrode 12,54 resistive layer

14 gate insulating layer 16, 60, 78, 80 gate electrode

22,56: emitter 30: electron beam

32: field emission array 40: spacer

42 charge 44 intersection

46: hole 58, 62, 72, 82: insulating layer

68: reflector

In order to achieve the above object, the field emission display device of the present invention includes an upper substrate, a cathode electrode formed on the rear surface of the upper substrate, a lower substrate formed to face the upper substrate, an anode formed on the lower substrate, A gate electrode is formed on the anode in a direction crossing the cathode, and an emitter is formed on the gate electrode in parallel with the gate electrode.

Other objects and features of the present invention in addition to the above objects will become apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 6 to 12.

6 and 7 are perspective views illustrating a field emission display device according to an exemplary embodiment of the present invention.

6 and 7, the field emission display device according to the exemplary embodiment of the present invention includes an upper substrate 50 on which the cathode electrode 52 is formed, and a lower substrate 70 on which the anode electrode 66 is formed. . A reflecting plate 68 is provided on the back of the anode electrode 66, and a phosphor 64 and a second insulating layer 62 are formed on the anode electrode 66. The emitter 56, the first insulating layer 58, and the gate electrode 60 are sequentially stacked on the second insulating layer 62. The second insulating layer 62, the gate electrode 60, the first insulating layer 58, and the emitter 56 may be simply manufactured using a printing method or the like. The reflector plate 68 reflects electrons emitted from the emitter 56 and incident on the upper substrate 50 toward the upper substrate 50. For this purpose, the reflector plate 68 is formed of a material capable of reflecting electrons (for example, aluminum). The anode electrode 66 accelerates electrons emitted from the emitter 56 toward the phosphor 64. The phosphor 64 is emitted from the emitter 56 and collides with the electrons accelerated by the anode electrode 66 to generate visible light of any one of red, green and blue colors. The gate electrode 60 is used as an extraction electrode for drawing electrons. A resistive layer 54 is formed on the rear surface of the upper substrate 50 on which the cathode electrode 52 is formed. The cathode electrode 52 supplies current to the emitter 56, and the resistive layer 54 limits the overcurrent applied from the cathode electrode 52 toward the emitter 56, thus making the emitter 56 uniform. It serves to supply current. Meanwhile, since the cathode electrode 52 is formed on the upper electrode 50 corresponding to the display surface of the screen, the cathode electrode 52 is formed of a transparent electrode (for example, indium tin oxide (ITO)) to increase the aperture ratio. The first insulating layer 58 insulates the emitter 56 from the gate electrode 60. The second insulating layer 62 is formed at a height higher than that of the second insulating layer 58 to insulate the anode electrode 66 from the gate electrode 60. In the present invention, the emitter 56, the first insulating layer 58, the gate electrode 60, and the second insulating layer 62 stacked on the rear surface of the resistive layer 54 serve as spacers. That is, the emitter 56, the first insulating layer 58, the gate electrode 60, and the second insulating layer 62 stacked on the back surface of the resistive layer 54 may have the upper substrate 50 and the lower substrate 70. The upper substrate 50 and the lower substrate 70 are supported so as to maintain a high vacuum state therebetween. Therefore, in the present invention, the spacer is not provided separately. That is, the field emission display device of the present invention can prevent the occurrence of discharge unevenness and arcing caused by the spacer. Further, in the present invention, the pixel cells are not formed at the intersection of the gate electrode 60 and the cathode electrode 52, but are formed adjacent to the intersection of the gate electrode 60 and the cathode electrode 52. Therefore, as in the conventional field emission display device, it is not necessary to widen the area of the intersection of the gate electrode 60 and the cathode electrode 52. That is, the panel capacitance generated between the gate electrode 60 and the cathode electrode 52 can be minimized to improve luminance. Meanwhile, the resistive layer 54 in the present invention may be formed on the emitter 56 as shown in FIG. 9.

In order to display an image, a negative (-) cathode voltage is applied to the cathode electrode 52 and a positive (+) anode voltage is applied to the anode electrode 66. The gate voltage of positive polarity (+) is applied to the gate electrode 60. Then, electrons are emitted from the emitter 56 as shown in FIG. 8. Electrons emitted from the emitter 56 are accelerated toward the anode electrode 66 to excite the phosphor 64. At this time, visible light of any one of red, green, and blue colors is generated according to the phosphor 64. Electrons that excite the phosphor 64 are incident on the reflector plate 68 through the phosphor 64 and the anode electrode 66. The reflector 68 reflects electrons incident to the upper substrate 50 toward the upper substrate 50. Electrons reflected from the reflector plate 68 once again excite the phosphor 64. That is, the electrons emitted from the emitter 56 will excite the phosphor 64 twice. Therefore, in the present invention, it is possible to implement a luminance higher than two times higher than that of the related art. In the present invention, the amount of electrons emitted from the emitter 56 can be arbitrarily set by adjusting the thickness of the first insulating layer 58. Meanwhile, in the present invention, as shown in FIG. 8, electrons emitted from one emitter 58 are supplied to two adjacent pixel cells. Accordingly, unwanted pixel cells can be made to emit light. In order to solve this problem, anode electrodes 74, 75, and 76 are formed in a direction crossing the cathode electrode 52 as shown in FIG. 10.

Referring to FIG. 10, anode electrodes 74, 75, and 76 are formed to be parallel to the second insulating layer 62. The anode electrodes 74, 75, and 76 are driven differently from each other so as to emit light of only a desired pixel cell 90. To this end, a third insulating layer 72 is formed between the anode electrodes 74, 75, 76. The third insulating layer 72 serves to electrically insulate the anode electrodes 74, 75, 76. Other configurations and features than the anode electrodes 74, 75 and 76 are the same as the field emission display shown in FIG.

In order to display an image in a specific pixel cell, a negative (-) cathode voltage is applied to the cathode electrode 52 and a positive (+) anode voltage is applied to the anode electrode 75. The gate voltage of positive polarity (+) is applied to the gate electrode 60. Then, electrons are emitted from the emitter 56 as shown in FIG. 11. Electrons emitted from the emitter 56 are accelerated toward the anode electrode 75 to excite the phosphor 64. At this time, visible light of any one of red, green, and blue colors is generated according to the phosphor 64. Electrons that excite the phosphor 64 are incident on the reflector plate 68 through the phosphor 64 and the anode electrode 75. The reflector 68 reflects electrons incident to the upper substrate 50 toward the upper substrate 50. Electrons reflected from the reflector plate 68 once again excite the phosphor 64. Meanwhile, in the field emission display device of the present invention, the fourth insulating layer 82 may be formed between the gate electrodes 78 and 80 as shown in FIG. 12 to emit only desired pixel cells.

Referring to FIG. 12, a fourth insulating layer 82 is formed between the gate electrodes 78 and 80 in a direction parallel to the gate electrodes 78 and 80. Since the gate electrodes 78 and 80 are driven differently from each other, only the desired pixel cells 90 may emit light. The fourth insulating layer 82 formed between the gate electrodes 78 and 80 electrically insulates the gate electrodes 78 and 80. Other configurations and features than the gate electrodes 78 and 80 are the same as those of the field emission display shown in FIG.

As described above, according to the field emission display device according to the present invention, a spacer for supporting the upper substrate and the lower substrate is not separately formed. As a result, discharge unevenness and arcing caused by charges accumulated in the spacer can be prevented, thereby improving brightness of the field emission display device. In addition, since the pixel cells of the present invention are not formed at the intersection of the gate electrode and the cathode, the area of the intersection can be minimized. Therefore, the panel capacitance generated at the intersection of the gate electrode and the cathode electrode can be minimized, thereby improving the brightness of the field emission display device. Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (12)

Upper substrate, A cathode electrode formed on the rear surface of the upper substrate; A lower substrate formed to face the upper substrate; An anode formed on the lower substrate; A gate electrode formed on the anode in a direction crossing the cathode electrode; And an emitter formed on the gate electrode to be parallel to the gate electrode. The method of claim 1, A reflector formed between the anode electrode and the lower substrate to reflect electrons emitted from the emitter toward the upper substrate; A first insulating layer formed between the emitter and the gate electrode to insulate the emitter from the gate electrode; And a second insulating layer formed between the anode electrode and the gate electrode at a height higher than the first insulating layer to electrically insulate the anode electrode and the gate electrode. The method of claim 2, A phosphor is coated between the second insulating layer. The method of claim 2, And the reflecting plate is made of aluminum. The method of claim 2, The thickness of the first insulating layer is adjusted to control the amount of electrons emitted from the emitter. The method of claim 2, And the anode electrode is formed as one electrode facing the lower substrate. The method of claim 2, And the anode electrode is patterned in line with the gate electrode. The method of claim 7, wherein The field emission display device of claim 1, wherein an insulator is filled between the anode electrodes. The method of claim 2, And an insulator filled between the gate electrodes formed on the second insulating layer. The method of claim 1, And the cathode electrode is formed of a transparent electrode. The method of claim 1, And a resistance layer formed on a rear surface of the cathode electrode so as to face the upper substrate so as to uniformly supply a voltage supplied to the cathode electrode to the emitter. The method of claim 1, And a resistance layer formed on the emitter in parallel with the emitter so as to uniformly supply the voltage supplied to the cathode to the emitter.