KR20020002137A - Method of making pattern for semiconductor device - Google Patents

Abstract

PURPOSE: A method of forming a pattern for a semiconductor device is provided to form a stable pattern even when forming a pattern having a small CD(Critical Dimension) by introducing an Electron-beam irradiation process into a lithography process to minimize LER(Line Edge Roughness) created during the patterning. CONSTITUTION: A photo-resist of a predetermined thickness is coated(1) on an insulating layer for forming a pattern. The resultant structure is subjected to a soft baking process(2) to remove a solvent in the photo-resist. The resultant structure is exposed to light(3) for forming a pattern for line and space. The resultant structure is subjected to a post exposure baking process(4) and a subsequent development(5) to form a pattern for line and space. The entire surface of the patterned wafer is subjected to an Electron-beam irradiation(6).

Description

Pattern formation method of a semiconductor device {METHOD OF MAKING PATTERN FOR SEMICONDUCTOR DEVICE}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of forming a pattern of a semiconductor device, and in particular, by introducing an electron beam irradiation process in a lithography process to minimize the line edge roughness (hereinafter referred to as 'LER') generated during patterning, thereby reducing A pattern forming method of a semiconductor device capable of forming a stable pattern even when forming a pattern having a number (CD).

In the case of a pattern formed by a fine pattern forming method using a current lithography process, the LER (a) is formed as shown in FIG. 1 due to the structure of a resist to be applied and the influence of a mask error generated during mask drawing. do.

The occurrence of the LER (a) affects subsequent processes such as etch, and thus, adversely affects the electrical characteristics of the semiconductor device, in particular, the threshold voltage as shown in FIG. 2. Therefore, a lot of research and process development is in progress to minimize the occurrence of such LER in the pattern formation.

Generally known LER occurs mainly in the chemically amplified resist type applied to KrF, ArF, 157nm, EUV or E-beam, which is caused by acid unevenness during exposure. It is mainly caused by the diffusion and chemical reaction of the resist with the matrix resin, and also by the non-uniform developing mechanism with the developer used.

In addition, the LER is generated by the selection of a light source and a mask material on the mask fabricated to form a gradually smaller pattern, and the LER is transferred to the pattern during patterning using these masks. Therefore, it is important to select a photoacid generator to induce uniform diffusion of acid when using chemically amplified resist, and to apply and process acid to minimize the effects on exposure and post exposure baking. Conditions are needed.

However, despite much research and process conditions improvement, the generation of LER is still indispensable in the process of applying chemically amplified resist, and how much LER can be minimized by using a later process It is a matter of interest. The occurrence of LER during such a fine pattern causes a big problem in the characteristics of the semiconductor device, so that stabilization of the process cannot be expected.

Accordingly, the present invention has been made to solve the above problems, and an object of the present invention is to stabilize the pattern formation having a small critical dimension (CD) by minimizing the LER generated during patterning by introducing an electron beam irradiation process in a lithography process. A pattern forming method of a semiconductor device capable of forming a pattern is provided.

In order to achieve the above object, the pattern forming method of the semiconductor device of the present invention,

Coating a photoresist with a predetermined thickness on the insulating film for pattern formation;

Performing soft baking after the step to remove the solvent in the photoresist;

Exposing to form patterns of lines and spaces after the step;

A post exposure baking process is performed after the step and the development is performed to form patterns of lines and spaces;

And performing an electron beam full surface irradiation on the wafer patterned by the above process.

In the method for forming a pattern of a semiconductor device according to an embodiment of the present invention, the photoresist is polyvinyl phenolic, polyhydric styrene, poly norbornene, poly adamantane, polyimide, polyacrylate Or a photoresist of a polymethacrylate-based, polyfluorinated homopolymer or copolymer.

In the method of forming a pattern of a semiconductor device according to an embodiment of the present invention, the photoresist is ethyl 3-ethoxypropionate, methyl 3-methoxypropionate, cyclohexa Single solvents such as cyclohexanon, propyleneglycol methyl ether acetate, methyl ethyl ketone, benzene, toluene, dioxane, dimethel formamide, or a photoresist using a mixed solvent thereof It is characterized by.

In the method of forming a pattern of a semiconductor device according to an embodiment of the present invention, the thickness of the photoresist is characterized in that 0.15㎛ to 3.0㎛.

In the method for forming a pattern of a semiconductor device according to an embodiment of the present invention, the light source of the pattern used for irradiation of the entire electron beam is i-line, KrF, ArF, 157 nm EUV, E-beam E-beam), X-ray (ray) is characterized by using one.

In the method of forming a pattern of a semiconductor device according to an embodiment of the present invention, the electron beam front surface irradiation process is applied to a positive resist.

In the method for forming a pattern of a semiconductor device according to an embodiment of the present invention, the electron beam front irradiation step is applied to a negative resist.

In the method of forming a pattern of a semiconductor device according to an embodiment of the present invention, the electron beam front irradiation step is applied to a contact hole.

In the method for forming a pattern of a semiconductor device according to an embodiment of the present invention, the electron beam front irradiation step is applied to a single line and a space pattern.

In the method for forming a pattern of a semiconductor device according to an embodiment of the present invention, the electron beam front irradiation step is applied to dense lines and space patterns.

In the method for forming a pattern of a semiconductor device according to an embodiment of the present invention, the process pressure during the electron beam front irradiation step is characterized in that carried out in the range of 10 to 50mm Tor.

In the method for forming a pattern of a semiconductor device according to an embodiment of the present invention, the acceleration voltage during the electron beam front irradiation process is characterized in that performed in the range of 1 to 50 KeV.

In the method for forming a pattern of a semiconductor device according to an embodiment of the present invention, the electron region during the electron beam front irradiation step is characterized in that performed within the range of 0.10 to 12㎛.

In the method for forming a pattern of a semiconductor device according to an embodiment of the present invention, the process gas in the electron beam front irradiation step is characterized in that the gas is carried out in the atmosphere of one or several gases of nitrogen, oxygen, argon, helium.

In the method for forming a pattern of a semiconductor device according to an embodiment of the present invention, the size of the wafer to be applied to the electron beam front irradiation step is characterized in that performed within the range of 60mm to 300mm wafer.

In the method for forming a pattern of a semiconductor device according to an embodiment of the present invention, the process temperature during the electron beam front irradiation step is characterized in that carried out in the range of 10 to 400 ℃.

In the method for forming a pattern of a semiconductor device according to an embodiment of the present invention, the irradiation control conditions in the electron beam front irradiation step is characterized in that it is carried out in multiple irradiation and voltage.

In the method for forming a pattern of a semiconductor device according to an embodiment of the present invention, the electron beam front irradiation step is oxide, polyoxide, nitride, BPS, aluminum, tungsten, cobalt, organic diffuse reflection prevention material, inorganic diffuse reflection prevention material, metal And one or multiple pattern forming insulating films of titanium.

In the method for forming a pattern of a semiconductor device according to an embodiment of the present invention, the electron beam front irradiation step is applied to a patterned wafer subjected to polishing (CMP) for planarization of the surface after deposition of the insulator.

In the method for forming a pattern of a semiconductor device according to an embodiment of the present invention, the electron beam front irradiation step is applied to a patterning wafer that is not subjected to polishing (CMP) to planarize a surface after deposition of an insulator.

In the method for forming a pattern of a semiconductor device according to an embodiment of the present invention, in the electron beam front irradiation process, the arrangement of the wafer is characterized in that arranged in a proxy (proximity) method.

In the method for forming a pattern of a semiconductor device according to an embodiment of the present invention, the arrangement of wafers in the electron beam front irradiation process is characterized in that arranged in a contact (contact) method.

1 is an enlarged photograph showing a severe occurrence of LER when applying the conventional pattern formation method

2 is a graph showing the effect on the threshold voltage characteristics of a semiconductor device in the case of severe and small LER

3 is a process flowchart when applying the electron beam front irradiation process method of the present invention

4 is an enlarged photograph of a pattern showing a decrease in LER when applying the electron beam front irradiation process method of the present invention;

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

In addition, in all the drawings for demonstrating an embodiment, the thing with the same function uses the same code | symbol, and the repeated description is abbreviate | omitted.

Figure 3 briefly shows the process sequence when applying the electron beam front irradiation process method of the present invention.

A pattern forming method of a semiconductor device according to a first embodiment of the present invention will be described with reference to the drawings.

First, the chemically amplified polyhydroxy styrene-type resist for KrF is coated on the pattern forming insulating film (1) with a thickness of 0.56 μm and then soft baked at 90 ° C. for 90 seconds to remove the solvent in the resist. (2). After exposing to pattern 130nm line and space using KrF exposure machine (3) post exposure baking process (4) at 110 ℃ 90 seconds (4) and then 2.38wt% TMAH It develops using image development, and forms the pattern of 130 nm L / S (5).

Subsequently, electron beam front exposure is performed on the patterned wafer as presented in the present invention in four steps for 15 seconds under a voltage condition of 50 KeV (6). In the pattern subjected to the electron beam front irradiation process, the LER decreased by 5 nm as shown in FIG. 4 compared to before the electron beam front irradiation.

A method of forming a pattern of a semiconductor device according to a second embodiment of the present invention will be described with reference to the drawings.

First, a chemically amplified polyhydroxy styrene-type resist for KrF is coated on the pattern forming insulating film (1) with a thickness of 0.76 μm, and then soft baked at 90 ° C. for 90 seconds to remove the solvent in the resist. (2). After exposing to form a pattern of 130nm line and space using KrF exposure machine (3) post exposure baking process (4) at 130 ℃ 90 seconds (4) and 2.38wt% TMAH It develops using image development, and forms the pattern of 130 nm L / S (5).

Subsequently, electron beam flood exposure is performed on the patterned wafer as presented in the present invention in four steps for 20 seconds at a voltage of 35 KeV (6). In the pattern subjected to the electron beam front irradiation process, the LER decreased by 7 nm compared with the electron beam front irradiation.

A method of forming a pattern of a semiconductor device according to a third embodiment of the present invention will be described with reference to the above drawings.

First, the chemically amplified KrF norbornene-based resist is coated (1) with a thickness of 0.35 μm on a patterned insulating film and then soft baked at 110 ° C. for 90 seconds to remove the solvent in the resist ( 2). After exposing to form a pattern of 120㎛ line and space using KrF exposure machine (3) post exposure baking process (90) at 130 ℃ for 90 seconds (4) after 2.38wt% of The pattern of 120 nm L / S is formed by developing using TMAH development (5).

Subsequently, the electron beam flood exposure is performed on the patterned wafer as presented in the present invention in four steps for 25 seconds at a voltage of 45 KeV (6). In the pattern subjected to the electron beam front irradiation process, the LER was reduced by 6 nm compared with the electron beam front irradiation.

A method of forming a pattern of a semiconductor device according to a fourth embodiment of the present invention will be described with reference to the drawings.

First, a chemically amplified polyacrylate-based resist for ArF is coated on a patterned insulating film with a thickness of 0.25 μm (1) and then soft baked at 110 ° C. for 90 seconds to remove the solvent in the resist. (2). After exposure using an ArF exposure machine for pattern formation of 100 μm lines and spaces (3), a post exposure baking process was performed at 140 ° C. for 90 seconds (4), followed by 2.38 wt% of By developing using TMAH development, a pattern of 100 nm L / S is formed (5).

Subsequently, the electron beam flood exposure is performed on the patterned wafer as presented in the present invention in four steps for 15 seconds under a voltage condition of 40 KeV (6). In the pattern subjected to the electron beam front irradiation process, the LER decreased by 4 nm compared with the electron beam front irradiation.

A method of forming a pattern of a semiconductor device according to a fifth embodiment of the present invention will be described with reference to the drawings.

First, the chemically amplified polyacrylate-based resist for EUV is coated on the pattern forming insulating film with a thickness of 0.35 μm (1) and then soft baked at 110 ° C. for 90 seconds to remove the solvent in the resist. (2). After exposure to form a pattern of 50㎛ line and space using an EUV exposure machine (3) post exposure baking (post exposure baking) process at 140 ℃ 90 seconds (4) and then 2.38wt% of The pattern of 50 nm L / S is formed by developing using TMAH development (5).

Subsequently, the electron beam float exposure is performed on the patterned wafer as shown in the present invention in four steps for 15 seconds under a voltage condition of 50 KeV (6). In the pattern subjected to the electron beam front irradiation process, the LER was reduced by 3 nm compared to before the electron beam front irradiation.

As described above, according to the method for forming a pattern of a semiconductor device according to the present invention, the LER generated during patterning can be minimized by irradiating an electron beam to the patterned wafer for a predetermined time after a general patterning process. Accordingly, a stable pattern can be formed even when a pattern having a small critical dimension (CD) is formed, and thus it can be applied to stabilization of semiconductor manufacturing processes of 1G, 4G, 16G, and 64G DRAMs.

Further, the pattern forming method of the semiconductor device of the present invention is more effective for chemical amplification type resists because the chemical amplification resist shrinks more easily by electron beam irradiation. This phenomenon is caused by the irradiation of a certain amount of electron beam, a new type of radical bond is generated by cutting of the main chain or terminal in the resist, at this time, the chain volume in the resist (chain volume) is reduced, the pattern shrinkage occurs, and LER The occurrence of can be minimized. By removing a certain amount of photoacid generator remaining in the patterned resist by electron beam irradiation, it is possible to minimize the LER generated by non-uniform movement and reaction of the photoacid generator. At this time, the degree of shrinkage of the formed resist is also very important for uniform electron beam irradiation conditions and uniform surface irradiation (CD) uniformity in order to obtain a suitable final critical dimension (CD) value. Do.

When the process of the present invention is applied to the post-patterning process, the patterned resist is cured by electron beam irradiation, thereby improving the etching selectivity compared to the insulating film for pattern formation of the resist in a later etching process.

In addition, by using the method of the present invention, it is possible to minimize LER when forming a fine pattern, obtain a uniform critical dimension (CD) value, and improve the etching selectivity in a later process.

In addition, preferred embodiments of the present invention are disclosed for the purpose of illustration, those skilled in the art will be able to various modifications, changes, additions, etc. within the spirit and scope of the present invention, these modifications and changes should be seen as belonging to the following claims. something to do.

Claims (22)

Coating a photoresist with a predetermined thickness on the insulating film for pattern formation; Performing soft baking after the step to remove the solvent in the photoresist; Exposing to form patterns of lines and spaces after the step; A post exposure baking process is performed after the step and the development is performed to form patterns of lines and spaces; A method of forming a pattern in a semiconductor device, comprising the step of performing electron beam full-surface irradiation on the wafer patterned by the above process. The method of claim 1, wherein the photoresist, Among photoresists of polyvinyl phenol, polyhydric styrene, poly norbornene, poly adamant, polyimide, polyacrylate, polymethacrylate, polyfluorine homopolymer or copolymer One is used, The pattern formation method of the semiconductor device characterized by the above-mentioned. The method of claim 1, wherein the photoresist, Ethyl 3-ethoxypropionate, methyl 3-methoxypropionate, cyclohexanon, propyleneglycol methyl ether acetate, methylethylketone And a photoresist using a single solvent such as benzene, toluene, dioxane, dimethel formamide, or a mixed solvent thereof, wherein the pattern forming method of a semiconductor device. The method of claim 1, wherein the thickness of the photoresist, 0.15 micrometer-3.0 micrometers, The pattern formation method of the semiconductor device characterized by the above-mentioned. The light source of claim 1, wherein the light source of the pattern used when irradiating the entire electron beam is provided. An i-line, KrF, ArF, 157 nm EUV, E-beam, or X-ray are used. The pattern formation method of the semiconductor device characterized by the above-mentioned. The method of claim 1, wherein the electron beam front irradiation step, A pattern forming method for a semiconductor device, characterized in that applied to a positive resist. The method of claim 1, wherein the electron beam front irradiation step, A pattern forming method for a semiconductor device, which is applied to a negative resist. The method of claim 1, wherein the electron beam front irradiation step, The pattern formation method of the semiconductor device characterized by the above-mentioned. The method of claim 1, wherein the electron beam front irradiation step, A pattern forming method for a semiconductor device, characterized in that applied to a single line and a space pattern. The method of claim 1, wherein the electron beam front irradiation step, A pattern forming method for a semiconductor device, characterized in that applied to dense lines and space patterns. The method of claim 1, wherein the process pressure during the electron beam front irradiation step, The pattern formation method of the semiconductor device characterized by performing in the range of 10-50 mm Thor. The method of claim 1, wherein the acceleration voltage in the electron beam front irradiation step, A pattern forming method for a semiconductor device, which is carried out within the range of 1 to 50 KeV. The method of claim 1, wherein the electron region in the electron beam front irradiation step, The pattern formation method of the semiconductor device characterized by performing in the range of 0.10-12 micrometers. The method of claim 1, wherein the process gas in the electron beam front irradiation step, A method of forming a pattern in a semiconductor device, characterized by carrying out in an atmosphere of one or several gases of nitrogen, oxygen, argon, and helium. The method of claim 1, The size of the wafer applied to the electron beam front irradiation step, A pattern forming method of a semiconductor device, characterized in that carried out within a 60mm to 300mm wafer range. The method of claim 1, wherein the process temperature during the electron beam front irradiation step, It carries out in 10-400 degreeC, The pattern formation method of the semiconductor device characterized by the above-mentioned. According to claim 1, Irradiation control conditions in the electron beam front irradiation step, The pattern formation method of the semiconductor device characterized by carrying out by multiple irradiation and voltage. The method of claim 1, wherein the electron beam front irradiation step, A pattern of a semiconductor device, which is applied to an insulating film for forming one or multiple patterns of oxide, polyoxide, nitride, BPS, aluminum, tungsten, cobalt, organic diffuse reflection prevention material, inorganic diffuse reflection prevention material, metal, and titanium. Forming method. The method of claim 1, wherein the electron beam front irradiation step, A pattern forming method for a semiconductor device, characterized in that it is applied to a patterned wafer subjected to polishing (CMP) to planarize a surface after deposition of an insulator. The method of claim 1, wherein the electron beam front irradiation step, A pattern forming method for a semiconductor device, characterized in that it is applied to a patterned wafer that has not been polished (CMP) to planarize a surface after deposition of an insulator. The method of claim 1, wherein the arrangement of the wafer in the electron beam front irradiation step, A pattern forming method of a semiconductor device, characterized in that arranged in a proxy (proximity) method. The method of claim 1, wherein the arrangement of the wafer in the electron beam front irradiation step, A pattern forming method for a semiconductor device, characterized in that arranged in a contact (contact) manner.