KR20020001382A - Method of forming a capacitor in a semiconductor device - Google Patents

Method of forming a capacitor in a semiconductor device Download PDF

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KR20020001382A
KR20020001382A KR1020000036058A KR20000036058A KR20020001382A KR 20020001382 A KR20020001382 A KR 20020001382A KR 1020000036058 A KR1020000036058 A KR 1020000036058A KR 20000036058 A KR20000036058 A KR 20000036058A KR 20020001382 A KR20020001382 A KR 20020001382A
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reactor
film
ticl
capacitor
source
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KR1020000036058A
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KR100582415B1 (en
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엄장웅
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박종섭
주식회사 하이닉스반도체
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02178—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing aluminium, e.g. Al2O3
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02186—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing titanium, e.g. TiO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02194—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing more than one metal element
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/0228—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Semiconductor Memories (AREA)
  • Chemical Vapour Deposition (AREA)

Abstract

PURPOSE: A method for manufacturing a capacitor of a semiconductor device is provided to prevent an electrical characteristic from being degraded by oxidation even after a subsequent high temperature process, by forming the first TiN/Ti(1-x)AlxN/the second TiN layer as a diffusion barrier layer. CONSTITUTION: A semiconductor substrate(1) on which a lower electrode(2) and a dielectric layer(3) for forming a capacitor are formed, is prepared. The first TiN layer(4) is formed on the dielectric layer by an atomic layer deposition(ALD) method. A Ti(1-x)AlxN layer(5) is formed on the first TiN layer by an ALD method. The second TiN layer(6) is formed on the Ti(1-x)AlxN layer by an ALD method. An upper electrode(7) is formed on the second TiN layer.

Description

반도체 소자의 커패시터 제조 방법{Method of forming a capacitor in a semiconductor device}Method of manufacturing a capacitor of a semiconductor device {Method of forming a capacitor in a semiconductor device}

본 발명은 반도체 소자의 커패시터 제조 방법에 관한 것으로, 특히 유전체막과 상부 전극 사이에 확산 방지막을 형성하므로써, 고온 열공정 시 유전체막과 상부 전극이 반응하는 것을 방지하여 커패시터의 전기적 특성을 향상시킬 수 있는 반도체 소자의 커패시터 제조 방법에 관한 것이다.The present invention relates to a method of manufacturing a capacitor of a semiconductor device, and in particular, by forming a diffusion barrier between the dielectric film and the upper electrode, it is possible to prevent the dielectric film and the upper electrode from reacting during the high temperature thermal process to improve the electrical characteristics of the capacitor. The present invention relates to a capacitor manufacturing method of a semiconductor device.

반도체 소자에서 커패시터의 정전용량을 결정하는 중요한 요소는 여러 가지가 있다.There are many important factors that determine the capacitance of a capacitor in a semiconductor device.

C = ε× A / dC = ε × A / d

수학식 1을 참조하면, 수학 기호 ε는 유전율, A는 표면적, d는 유전체 두께를 나타낸다. 커패시터의 정전 용량은 유전율, 표면적 및 유전체의 두께에 따라 결정된다. 커패시터의 정전 용량을 높이기 위해서는 표면적을 넓히거나, 유전체의 두께를 두껍게 형성해야 하는데, 소자가 미세구조로 형성됨에 따라 표면적을 넓히는데는 한계가 있다. 또한 유전체의 두께를 두껍게 형성하는 것도 단차가 발생하게되어 후속 공정에서 어려움이 발생하게 된다. 결국 커패시터의 정전 용량을 높이기 위해서는 유전율이 높은 유전체를 사용하는 방법밖에 없다.Referring to Equation 1, the mathematical symbol ε represents a dielectric constant, A represents a surface area, and d represents a dielectric thickness. The capacitance of the capacitor is determined by the permittivity, surface area and thickness of the dielectric. In order to increase the capacitance of the capacitor, it is necessary to increase the surface area or to increase the thickness of the dielectric. However, as the device is formed into a microstructure, there is a limit to increasing the surface area. In addition, the thickness of the dielectric to form a thick step is also a problem in the subsequent process. After all, the only way to increase the capacitance of the capacitor is to use a dielectric having a high dielectric constant.

그러나, Ta2O5막과 같은 고유전체 물질을 이용해 유전체막을 형성하더라도, 후속 고온 열공정시 상부 전극과의 반응으로 인하여 산화막이 형성되어 열안정성이 저하되고, 커패시터의 전기적 특성을 저하시키는 원인이 된다. 열적 안정성을 확보하기 위하여 물리적 기상 증착법으로 유전체막 및 상부 전극 사이에 확산 방지막막을 형성해 유전체막과 상부 전극의 반응을 방지한다. 그러나, 확산 방지막으로 사용하고 있는 TiN막은 고단차에 대해 계단 도포성이 나쁘며 산소에 대한 방지막 특성이 좋지 않아 누설 전류 특성이 나빠져 소자의 특성을 개선시키지 못한다.However, even when a dielectric film is formed using a high dielectric material such as a Ta 2 O 5 film, an oxide film is formed due to a reaction with an upper electrode during a subsequent high temperature thermal process, which causes a decrease in thermal stability and a deterioration of electrical characteristics of the capacitor. . In order to secure thermal stability, a diffusion barrier film is formed between the dielectric film and the upper electrode by physical vapor deposition to prevent the reaction between the dielectric film and the upper electrode. However, the TiN film used as the diffusion barrier film has poor step coatability against high steps, and has a poor barrier property against oxygen, resulting in poor leakage current characteristics and thus improving device characteristics.

따라서, 본 발명은 유전체막과 상부 전극이 반응하는 것을 방지하기 위한 확산 방지막을 ALD법으로 형성한 제 1 TiN/Ti(1-x)AlxN/제 2 TiN막을 사용하므로써 계단 도포성 및 산소에 대한 방지 특성을 향상시키므로써 커패시터의 전기적 특성을 향상시킬 수 있는 반도체 소자의 커패시터 제조 방법을 제공하는데 그 목적이 있다.Therefore, the present invention uses the first TiN / Ti (1-x) Al x N / second TiN film in which a diffusion barrier film for preventing the dielectric film and the upper electrode from reacting is formed by the ALD method. It is an object of the present invention to provide a method for manufacturing a capacitor of a semiconductor device capable of improving the electrical characteristics of the capacitor by improving the protection characteristics against.

도 1은 본 발명에 따른 반도체 소자의 커패시터 제조 방법을 설명하기 위하여 도시한 단면도.1 is a cross-sectional view for explaining a capacitor manufacturing method of a semiconductor device according to the present invention.

도 2는 본 발명에 따른 확산 방지막 형성 방법을 설명하기 위하여 도시한 레시피도.Figure 2 is a recipe diagram for explaining the diffusion barrier film formation method according to the present invention.

<도면의 주요 부분에 대한 부호 설명><Description of the symbols for the main parts of the drawings>

1 : 반도체 기판 2 : 하부 전극1 semiconductor substrate 2 lower electrode

3 : 유전체막 4 : 제 1 TiN 막3: dielectric film 4: first TiN film

5 : Ti(1-x)AlxN 6 : 제 2 TiN 막5: Ti (1-x) Al x N 6: Second TiN film

7 : 상부 전극 A1 : TiCl4소오스 공급 단계7: upper electrode A1: TiCl 4 source supply step

A2 : TiCl4또는 AlCl3소오스 공급 단계A2: TiCl 4 or AlCl 3 source feed step

B1, B2 : 제 1 정화 단계 C1, C2 : NH3반응 가스 공급 단계B1, B2: first purification step C1, C2: NH 3 reaction gas supply step

D1, D2 : 제 2 정화 단계D1, D2: second purification step

본 발명에 따른 반도체 소자의 에피 채널 형성 방법은 커패시터를 형성하기 위한 하부 전극 및 유전체막이 형성된 반도체 기판이 제공되는 단계, 유전체막 상에 ALD 법으로 제 1 TiN막을 형성하는 단계, 제 1 TiN막 상에 ALD 법으로 Ti(1-x)AlxN막을 형성하는 단계, Ti(1-x)AlxN막 상에 ALD 법으로 제 2 TiN막을 형성하는 단계 및 제 2 TiN막 상에 상부 전극을 형성하는 단계를 포함하여 이루어진다.An epitaxial channel forming method of a semiconductor device according to the present invention is provided with a semiconductor substrate having a lower electrode and a dielectric film formed thereon for forming a capacitor, forming a first TiN film on the dielectric film by the ALD method, and on the first TiN film. a step of forming ALD method as Ti (1-x) Al x N film, the step and the second upper electrode on the TiN film forming the second TiN film by ALD method in the Ti (1-x) Al x N film It comprises the step of forming.

상기의 단계에서, 제 1 TiN막을 형성하는 단계는 TiCl4소오스를 공급하는 제 1 단계, 미반응 TiCl4소오스를 제거하는 제 2 단계, NH3반응 가스를 공급하는 제 3 단계 및 미반응 NH3반응 가스를 제거하는 제 4 단계로 구성되며, 제 1 내지 제 4 단계를 확산 방지막 형성 공정의 1 싸이클로 하여 수차례 반복 실시를 통해 목표 두께의 제 1 TiN막을 형성한다. 제 1 단계에서는 상기 반도체 기판이 장착된 반응기로 TiCl4소오스를 공급하여 상기 반도체 기판의 표면에 흡착시키며, TiCl4소오스는 10 내지 500sccm 범위의 유량으로 0.05 내지 10초 동안 상기 반응기로 공급된다. 제 2 단계에서는 10 내지 3000sccm의 N2가스를 이용하여 미반응 TiCl4소오스 및 반응 부산물을 상기 반응기에서 제거해준다. 제 3 단계에서는 NH3반응 가스를 1 내지 1000sccm 범위의 유량으로 반응기 내에 공급하여 상기 제 1 TiN막을 형성하고, 제 4 단계에서 다시 10 내지 3000sccm의 N2가스를 상기 반응기로 공급하여 반응하지 않은 NH3반응가스 및 반응 부산물을 상기 반응기 내부로부터 제거한다.In the step of the first step of TiN film is formed is the third stage and unreacted for supplying a second step 2, NH 3 reaction gas to remove the first step, the unreacted TiCl 4 source for supplying TiCl 4 source and NH 3 Comprising a fourth step of removing the reaction gas, a first TiN film of a target thickness is formed through several iterations using the first to fourth steps as one cycle of the diffusion barrier film forming process. In the first step, the TiCl 4 source is supplied to the reactor equipped with the semiconductor substrate and adsorbed onto the surface of the semiconductor substrate, and the TiCl 4 source is supplied to the reactor for 0.05 to 10 seconds at a flow rate ranging from 10 to 500 sccm. In the second step, unreacted TiCl 4 sources and reaction by-products are removed from the reactor using N 2 gas of 10 to 3000 sccm. In the third step, NH 3 reaction gas is supplied into the reactor at a flow rate in the range of 1 to 1000 sccm to form the first TiN film, and in the fourth step, 10 to 3000 sccm of N 2 gas is supplied to the reactor again, and the NH is not reacted. 3 Reaction gas and reaction by-products are removed from inside the reactor.

반응기는 250 내지 850℃ 범위의 증착온도 및 0.5 내지 100Torr 범위의 증착압력을 유지한다.The reactor maintains a deposition temperature in the range of 250 to 850 ° C. and a deposition pressure in the range of 0.5 to 100 Torr.

Ti(1-x)AlxN막을 형성하는 단계는 TiCl4또는 AlCl3소오스를 공급하는 제 1 단계, 미반응 TiCl4또는 AlCl3소오스를 제거하는 제 2 단계, NH3반응 가스를 공급하는 제 3 단계 및 미반응 NH3반응 가스를 제거하는 제 4 단계로 구성되며, 상기 제 1 내지 제 4 단계를 확산 방지막 형성 공정의 1 싸이클로 하여 수차례 반복 실시를 통해 목표 두께의 Ti(1-x)AlxN막을 형성한다. 제 1 단계에서는 상기 반도체 기판이 장착된 반응기로 TiCl4또는 AlCl3소오스를 공급하되, 1 싸이클마다 번갈아가며 TiCl4및 AlCl3소오스 중 어느 하나를 공급하여 상기 반도체 기판의 표면에 흡착시키며, TiCl4또는 AlCl3소오스는 10 내지 500sccm 범위의 유량으로 0.05 내지 10초 동안 상기 반응기로 공급된다. 제 2 단계에서는 10 내지 3000sccm의 N2가스를 이용하여 미반응 TiCl4또는 AlCl3소오스 및 반응 부산물을 상기 반응기에서 제거한다. 제 3 단계에서는 NH3반응 가스를 1 내지 1000sccm 범위의 유량으로 반응기 내에 공급하여 상기 Ti(1-x)AlxN막을 형성하고, 제 4 단계에서 다시 10 내지 3000sccm의 N2가스를 상기 반응기로 공급하여 반응하지 않은 NH3반응가스 및 반응 부산물을 상기 반응기 내부로부터 제거한다.To form Ti (1-x) Al x N film is first supplied to the first stage 2, NH 3 reaction gas to remove the first step, the unreacted TiCl 4, or AlCl 3 source for supplying TiCl 4 or AlCl 3 source It is composed of three steps and a fourth step of removing unreacted NH 3 reaction gas, wherein the first to fourth steps are used as one cycle of the diffusion barrier film forming process, and the Ti (1-x) of the target thickness is repeated several times . An Al x N film is formed. The first step, but supplying TiCl 4 or AlCl 3 source in the the semiconductor substrate mounted reactor, 1 alternately every cycle TiCl 4 and AlCl 3 sikimyeo by supplying any one of the source and adsorbed on the surface of the semiconductor substrate, TiCl 4 Or AlCl 3 source is fed to the reactor for 0.05 to 10 seconds at a flow rate in the range of 10 to 500 sccm. In the second step, unreacted TiCl 4 or AlCl 3 sources and reaction by-products are removed from the reactor using 10 to 3000 sccm of N 2 gas. In the third step, NH 3 reaction gas is supplied into the reactor at a flow rate in the range of 1 to 1000 sccm to form the Ti (1-x) Al x N film, and in the fourth step, 10 to 3000 sccm N 2 gas is returned to the reactor. Feed to remove unreacted NH 3 reactant gas and reaction by-products from inside the reactor.

반응기는 250 내지 850℃ 범위의 증착온도 및 0.5 내지 100Torr 범위의 증착압력을 유지한다.The reactor maintains a deposition temperature in the range of 250 to 850 ° C. and a deposition pressure in the range of 0.5 to 100 Torr.

제 2 TiN막을 형성하는 단계는 제 1 TiN막을 형성하는 공정 조건과 동일하게 실시하여 형성한다.The forming of the second TiN film is carried out under the same conditions as the process conditions for forming the first TiN film.

이하, 첨부된 도면을 참조하여 본 발명의 실시예를 더욱 상세히 설명하기로 한다.Hereinafter, with reference to the accompanying drawings will be described an embodiment of the present invention in more detail.

도 1은 본 발명에 따른 반도체 소자의 커패시터 제조 방법을 설명하기 위하여 도시한 단면도이다.1 is a cross-sectional view illustrating a method of manufacturing a capacitor of a semiconductor device according to the present invention.

도 1을 참조하면, 반도체 소자를 형성하기 위한 여러 요소가 형성된 반도체 기판(1) 상에 하부 전극(2)을 형성한 후 Ta2O5등과 같은 높은 유전율 값을 가지는 물질을 이용하여 유전체막(3)을 형성한다. 이후, 유전체막(3) 상부에 확산 방지막으로 제 1 TiN/Ti(1-x)AlxN/제 2 TiN(4 내지 6)을 형성한다. 제 1 TiN/Ti(1-x)AlxN/제 2 TiN(4 내지 6)을 형성하는 방법은 도 2를 참조하여 설명하기로 한다.Referring to FIG. 1, after forming a lower electrode 2 on a semiconductor substrate 1 having various elements for forming a semiconductor device, a dielectric layer may be formed using a material having a high dielectric constant such as Ta 2 O 5 . 3) form. Thereafter, first TiN / Ti (1-x) Al x N / second TiN (4 to 6) is formed as a diffusion barrier over the dielectric film 3. A method of forming the first TiN / Ti (1-x) Al x N / second TiNs (4 to 6) will be described with reference to FIG. 2.

도 2는 본 발명에 따른 확산 방지막 형성 방법을 설명하기 위하여 도시한 레시피도이다. 도 2를 참조하면, 확산 방지막은 제 1 TiN막(4), Ti(1-x)AlxN막(5) 및 제 2 TiN막(6)을 각각 10 내지 300Å범위의 두께로 순차적으로 형성하여 이루어진다. 각각의 제 1 TiN막(4), Ti(1-x)AlxN막(5) 및 제 2 TiN막(6)은 TiCl4또는 AlCl3를 소오스로 사용하고 NH3가스를 반응가스로 하며, 모든 소오스, 반응가스 및 정화 가스는펄스형태로 공급하여 ALD법으로 형성한다. 이때, 증착 온도는 250 내지 850℃이며, 증착 압력은 0.5 내지 100Torr이다.Figure 2 is a recipe diagram for explaining the diffusion barrier film forming method according to the present invention. Referring to FIG. 2, the diffusion barrier layer sequentially forms the first TiN film 4, the Ti (1-x) Al x N film 5, and the second TiN film 6 in a thickness ranging from 10 to 300 μs, respectively. It is done by Each of the first TiN film 4, the Ti (1-x) Al x N film 5, and the second TiN film 6 use TiCl 4 or AlCl 3 as the source and NH 3 gas as the reaction gas. All sources, reaction gases and purification gases are supplied in the form of pulses and formed by the ALD method. At this time, the deposition temperature is 250 to 850 ℃, the deposition pressure is 0.5 to 100 Torr.

먼저, TiN막(5)을 형성하는 단계는 TiCl4소오스 공급 단계(A1), 제 1 정화 단계(B1), NH3반응 가스 공급 단계(C1) 및 제 2 정화 단계(D1)로 구성된다. TiCl4소오스 공급 단계(A1)에서는 TiCl4소오스를 10 내지 500sccm 범위의 유량으로 0.05 내지 10초 동안 반응기로 공급하여 반도체 기판 표면에 흡착시킨다. 제 1 정화 단계(B1)에서는 10 내지 3000sccm의 N2가스를 반응기로 공급하여 반응기 내에 반응하지 않은 TiCl4소오스나 기타 부산물을 반응기 내부로부터 제거한다. NH3반응 가스 공급 단계(C1)에서는 NH3반응 가스를 1 내지 1000sccm 범위의 유량으로 반응기 내에 공급하여 제 1 TiN막(5)을 형성한다. 제 2 정화 단계(D1)에서는 다시 10 내지 3000sccm의 N2가스를 반응기로 공급하여 반응기 내에 반응하지 않은 NH3반응가스나 기타 부산물을 반응기 내부로부터 제거한다. 상기 4개의 단계(A 내지 D)가 1 싸이클(Cycle)을 이루며, 제 1 TiN막(5)을 목표 두께로 형성하기 위해서는 1 싸이클을 수차례 반복 실시한다.First, the TiN film 5 is formed of a TiCl 4 source supply step A1, a first purification step B1, an NH 3 reaction gas supply step C1, and a second purification step D1. In the TiCl 4 source supply step (A1), the TiCl 4 source is supplied to the reactor for 0.05 to 10 seconds at a flow rate in the range of 10 to 500 sccm and adsorbed onto the surface of the semiconductor substrate. In the first purification step (B1), 10 to 3000 sccm of N 2 gas is fed to the reactor to remove TiCl 4 sources or other by-products which have not reacted in the reactor from inside the reactor. In the NH 3 reaction gas supply step (C1), the NH 3 reaction gas is supplied into the reactor at a flow rate in the range of 1 to 1000 sccm to form the first TiN film 5. In the second purification step (D1), 10 to 3000 sccm of N 2 gas is again supplied to the reactor to remove the unreacted NH 3 reaction gas or other by-products from the inside of the reactor. The four steps A to D form one cycle, and one cycle is repeated several times to form the first TiN film 5 to a target thickness.

이후, 제 1 TiN막(5) 상부에 Ti(1-x)AlxN막(6)을 형성하는 데, Ti(1-x)AlxN막(6)을 형성하는 단계는 TiCl4또는 AlCl3소오스 공급 단계(A2), 제 1 정화 단계(B2), NH3반응 가스 공급 단계(C2) 및 제 2 정화 단계(D2)로 구성된다. TiCl4또는 AlCl3소오스 공급 단계(A2)에서는 TiCl4또는 또는 AlCl3소오스를 10 내지 500sccm 범위의 유량으로 0.05 내지 10초 동안 반응기로 공급하여 반도체 기판 표면에 흡착시킨다. 제 1 정화 단계(B2)에서는 10 내지 3000sccm의 N2가스를 반응기로 공급하여 반응기 내에 반응하지 않은 TiCl4또는 또는 AlCl3소오스나 기타 부산물을 반응기 내부로부터 제거한다. NH3반응 가스 공급 단계(C2)에서는 NH3반응 가스를 1 내지 1000sccm 범위의 유량으로 반응기 내에 공급하여 Ti(1-x)AlxN막(6)을 형성한다. 제 2 정화 단계(D2)에서는 다시 10 내지 3000sccm의 N2가스를 반응기로 공급하여 반응기 내에 반응하지 않은 NH3반응가스나 기타 부산물을 반응기 내부로부터 제거한다. 상기 4개의 단계(A2 내지 D2)가 1 싸이클(Cycle)을 이루며, Ti(1-x)AlxN막(6)을 목표 두께로 형성하기 위해서는 1 싸이클을 수차례 반복 실시한다. 상기의 단계 중, TiCl4또는 AlCl3소오스 공급 단계(A2)에서는 최상의 Ti(1-x)AlxN막(6)을 형성하기 위하여 TiCl4및 AlCl3소오스를 1 싸이클마다 적절하게 번갈아 가면서 공급한다.Thereafter, the Ti (1-x) Al x N film 6 is formed on the first TiN film 5, and the Ti (1-x) Al x N film 6 is formed by TiCl 4 or AlCl 3 source supply step (A2), the first purification step (B2), NH 3 reactant gas supply step (C2) and the second purification step (D2). In the TiCl 4 or AlCl 3 source supply step (A2), TiCl 4 or AlCl 3 sources are fed into the reactor for 0.05 to 10 seconds at a flow rate ranging from 10 to 500 sccm and adsorbed onto the surface of the semiconductor substrate. In the first purification step (B2), 10 to 3000 sccm of N 2 gas is fed to the reactor to remove unreacted TiCl 4 or AlCl 3 sources or other by-products from inside the reactor. In the NH 3 reaction gas supply step (C2), the NH 3 reaction gas is supplied into the reactor at a flow rate in the range of 1 to 1000 sccm to form the Ti (1-x) Al x N film 6. In the second purification step (D2), 10 to 3000 sccm of N 2 gas is again supplied to the reactor to remove the unreacted NH 3 reaction gas or other by-products from the inside of the reactor. The four steps A2 to D2 form one cycle, and one cycle is repeated several times to form the Ti (1-x) Al x N film 6 to a target thickness. In the above step, in the TiCl 4 or AlCl 3 source supplying step (A2), TiCl 4 and AlCl 3 sources are alternately supplied for each cycle in order to form the best Ti (1-x) Al x N film 6. do.

Ti(1-x)AlxN막(6)이 형성되면, 다시 상부에 TiN막(7)을 형성하는데, TiN막(7) 형성방법은 상기에서 형성한 제 1 TiN막(5) 형성방법과 동일하다.When the Ti (1-x) Al x N film 6 is formed, the TiN film 7 is again formed on the upper side. The method for forming the TiN film 7 is the method for forming the first TiN film 5 formed above. Is the same as

다시 도 1을 참조하면, 상기의 방법으로 형성된 확산 방지막, 즉제 1 TiN/Ti(1-x)AlxN/제 2 TiN막(4 내지 6) 상에 상부 전극을 형성하여 커패시터를 제조한다.Referring back to FIG. 1, a capacitor is manufactured by forming an upper electrode on the diffusion barrier layer formed by the above method, that is, the first TiN / Ti (1-x) Al x N / second TiN layer 4 to 6.

상술한 바와 같이, 본 발명은 계단 도포성 및 산소에 대한 방지 특성이 우수한 제 1 TiN/Ti(1-x)AlxN/제 2 TiN막을 확산 방지막으로 형성하므로써, 후속 고온 공정 후에도 산화에 의한 전기적 특성 저하를 방지하여 커패시터의 전기적 특성을 향상시키는 효과가 있다.As described above, the present invention forms the first TiN / Ti (1-x) Al x N / second TiN film as the diffusion barrier film, which has excellent stair coatability and oxygen resistance property, so that oxidation by the subsequent high temperature process is performed. The electrical characteristics of the capacitor can be improved by preventing the deterioration of the electrical characteristics.

Claims (15)

커패시터를 형성하기 위한 하부 전극 및 유전체막이 형성된 반도체 기판이 제공되는 단계;Providing a semiconductor substrate having a lower electrode and a dielectric film formed thereon for forming a capacitor; 상기 유전체막 상에 ALD 법으로 제 1 TiN막을 형성하는 단계;Forming a first TiN film on the dielectric film by an ALD method; 상기 제 1 TiN막 상에 ALD 법으로 Ti(1-x)AlxN막을 형성하는 단계;Forming a Ti (1-x) Al x N film on the first TiN film by ALD; 상기 Ti(1-x)AlxN막 상에 ALD 법으로 제 2 TiN막을 형성하는 단계; 및Forming a second TiN film on the Ti (1-x) Al x N film by ALD; And 상기 제 2 TiN막 상에 상부 전극을 형성하는 단계로 이루어지는 것을 특징으로 하는 반도체 소자의 커패시터 제조 방법.And forming an upper electrode on the second TiN film. 제 1 항에 있어서,The method of claim 1, 상기 제 1 또는 제 2 TiN막을 형성하는 단계는 TiCl4소오스를 공급하는 제 1 단계, 미반응 TiCl4소오스를 제거하는 제 2 단계, NH3반응 가스를 공급하는 제 3 단계 및 미반응 NH3반응 가스를 제거하는 제 4 단계로 구성되며, 상기 제 1 내지 제 4 단계를 확산 방지막 형성 공정의 1 싸이클로 하여 수차례 반복 실시를 통해 목표 두께의 제 1 또는 제 2 TiN막을 형성하는 것을 특징으로 하는 반도체 소자의 커패시터 제조 방법.The first or second step of forming a TiN film is the third stage and unreacted for supplying a second step 2, NH 3 reaction gas to remove the first step, the unreacted TiCl 4 source for supplying TiCl 4 source and NH 3 reaction And a fourth step of removing the gas, wherein the first to fourth steps are used as one cycle of the diffusion barrier film forming process to form a first or second TiN film having a target thickness through several iterations. Method of manufacturing capacitors in the device. 제 2 항에 있어서,The method of claim 2, 상기 제 1 단계는 상기 반도체 기판이 장착된 반응기로 TiCl4소오스를 공급하여 상기 반도체 기판의 표면에 흡착시키는 것을 특징으로 하는 반도체 소자의 커패시터 제조 방법.In the first step, a TiCl 4 source is supplied to a reactor equipped with the semiconductor substrate and adsorbed onto a surface of the semiconductor substrate. 제 3 항에 있어서,The method of claim 3, wherein 상기 TiCl4소오스는 10 내지 500sccm 범위의 유량으로 0.05 내지 10초 동안 상기 반응기로 공급되는 것을 특징으로 하는 반도체 소자의 커패시터 제조 방법.The TiCl 4 source is a capacitor manufacturing method of the semiconductor device, characterized in that supplied to the reactor for 0.05 to 10 seconds at a flow rate of 10 to 500sccm range. 제 2 항에 있어서,The method of claim 2, 상기 제 2 단계는 10 내지 3000sccm의 N2가스를 이용하여 미반응 TiCl4소오스 및 반응 부산물을 상기 반응기에서 제거하는 것을 특징으로 하는 반도체 소자의 커패시터 제조 방법.The second step is a method for producing a capacitor of a semiconductor device, characterized in that to remove the unreacted TiCl 4 source and reaction by-products from the reactor using N 2 gas of 10 to 3000sccm. 제 2 항에 있어서,The method of claim 2, 상기 제 3 단계는 NH3반응 가스를 1 내지 1000sccm 범위의 유량으로 반응기 내에 공급하여 상기 제 1 또는 제 2 TiN막을 형성하는 것을 특징으로 하는 반도체 소자의 커패시터 제조 방법.The third step is a capacitor manufacturing method of a semiconductor device, characterized in that to supply the NH 3 reaction gas in the reactor at a flow rate of 1 to 1000sccm to form the first or second TiN film. 제 2 항에 있어서,The method of claim 2, 상기 제 4 단계는 다시 10 내지 3000sccm의 N2가스를 상기 반응기로 공급하여 반응하지 않은 NH3반응가스 및 반응 부산물을 상기 반응기 내부로부터 제거하는 것을 특징으로 하는 반도체 소자의 커패시터 제조 방법.The fourth step is a method for producing a capacitor of a semiconductor device, characterized in that to supply the N 2 gas of 10 to 3000sccm again to the reactor to remove the unreacted NH 3 reaction gas and reaction by-products from the inside of the reactor. 제 3 항, 제 5 항, 제 6 항 및 제 7 항 중 어느 한 항에 있어서,The method according to any one of claims 3, 5, 6 and 7, 상기 반응기는 250 내지 850℃ 범위의 증착온도 및 0.5 내지 100Torr 범위의 증착 압력을 유지하는 것을 특징으로 하는 반도체 소자의 커패시터 제조 방법.Wherein the reactor maintains a deposition temperature in the range of 250 to 850 ° C. and a deposition pressure in the range of 0.5 to 100 Torr. 제 1 항에 있어서,The method of claim 1, 상기 Ti(1-x)AlxN막을 형성하는 단계는 TiCl4또는 AlCl3소오스를 공급하는 제1 단계, 미반응 TiCl4또는 AlCl3소오스를 제거하는 제 2 단계, NH3반응 가스를 공급하는 제 3 단계 및 미반응 NH3반응 가스를 제거하는 제 4 단계로 구성되며, 상기 제 1 내지 제 4 단계를 확산 방지막 형성 공정의 1 싸이클로 하여 수차례 반복 실시를 통해 목표 두께의 Ti(1-x)AlxN막을 형성하는 것을 특징으로 하는 반도체 소자의 커패시터 제조 방법.To form the Ti (1-x) Al x N film is to supply a second step 2, NH 3 reaction gas to remove the first step, the unreacted TiCl 4, or AlCl 3 source for supplying TiCl 4 or AlCl 3 source The third step and the fourth step of removing the unreacted NH 3 reaction gas, and the first to fourth steps as one cycle of the diffusion barrier film forming process, repeated several times, the Ti (1-x) of the target thickness ) A method for manufacturing a capacitor of a semiconductor device, characterized by forming an Al x N film. 제 9 항에 있어서,The method of claim 9, 상기 제 1 단계는 상기 반도체 기판이 장착된 반응기로 TiCl4또는 AlCl3소오스를 공급하되, 1 싸이클마다 번갈아가며 TiCl4및 AlCl3소오스 중 어느 하나를 공급하여 상기 반도체 기판의 표면에 흡착시키는 것을 특징으로 하는 반도체 소자의 커패시터 제조 방법.The first step is to supply a TiCl 4 or AlCl 3 source to the reactor equipped with the semiconductor substrate, alternately supplying one of TiCl 4 and AlCl 3 source to each cycle and adsorbed on the surface of the semiconductor substrate A capacitor manufacturing method of a semiconductor device. 제 10 항에 있어서,The method of claim 10, 상기 TiCl4또는 AlCl3소오스는 10 내지 500sccm 범위의 유량으로 0.05 내지 10초 동안 상기 반응기로 공급되는 것을 특징으로 하는 반도체 소자의 커패시터 제조 방법.The TiCl 4 or AlCl 3 source is supplied to the reactor for 0.05 to 10 seconds at a flow rate of 10 to 500sccm range capacitor manufacturing method of a semiconductor device. 제 9 항에 있어서,The method of claim 9, 상기 제 2 단계는 10 내지 3000sccm의 N2가스를 이용하여 미반응 TiCl4또는 AlCl3소오스 및 반응 부산물을 상기 반응기에서 제거하는 것을 특징으로 하는 반도체 소자의 커패시터 제조 방법.The second step is a method for producing a capacitor of a semiconductor device, characterized in that to remove the unreacted TiCl 4 or AlCl 3 source and reaction by-products from the reactor using N 2 gas of 10 to 3000sccm. 제 9 항에 있어서,The method of claim 9, 상기 제 3 단계는 NH3반응 가스를 1 내지 1000sccm 범위의 유량으로 반응기 내에 공급하여 상기 Ti(1-x)AlxN막을 형성하는 것을 특징으로 하는 반도체 소자의 커패시터 제조 방법.The third step is a capacitor manufacturing method of a semiconductor device, characterized in that to supply the NH 3 reaction gas in the reactor at a flow rate of 1 to 1000sccm to form the Ti (1-x) Al x N film. 제 9 항에 있어서,The method of claim 9, 상기 제 4 단계는 다시 10 내지 3000sccm의 N2가스를 상기 반응기로 공급하여 반응하지 않은 NH3반응가스 및 반응 부산물을 상기 반응기 내부로부터 제거하는 것을 특징으로 하는 반도체 소자의 커패시터 제조 방법.The fourth step is a method for producing a capacitor of a semiconductor device, characterized in that to supply the N 2 gas of 10 to 3000sccm again to the reactor to remove the unreacted NH 3 reaction gas and reaction by-products from the inside of the reactor. 제 10 항, 제 12 항, 제 13 항 및 제 14 항 중 어느 한 항에 있어서,The method according to any one of claims 10, 12, 13 and 14, 상기 반응기는 250 내지 850℃ 범위의 증착온도 및 0.5 내지 100Torr 범위의 증착 압력을 유지하는 것을 특징으로 하는 반도체 소자의 커패시터 제조 방법.Wherein the reactor maintains a deposition temperature in the range of 250 to 850 ° C. and a deposition pressure in the range of 0.5 to 100 Torr.
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KR100465631B1 (en) * 2002-12-11 2005-01-13 주식회사 하이닉스반도체 Method for forming capacitor of semiconductor device
KR100542247B1 (en) * 2002-07-19 2006-01-16 주식회사 하이닉스반도체 Atomic layer deposition of titanium nitride using batch type chamber and method for fabricating capacitor by the same

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KR100385946B1 (en) * 1999-12-08 2003-06-02 삼성전자주식회사 Method for forming a metal layer by an atomic layer deposition and a semiconductor device with the metal layer as a barrier metal layer, an upper electrode, or a lower electrode of capacitor
KR19990051335A (en) * 1997-12-19 1999-07-05 윤종용 A method of depositing TIALN by atomic layer deposition and a dielectric full capacitor of semiconductor device using a TIALN thin film formed by the method
KR100510473B1 (en) * 1998-07-03 2005-10-25 삼성전자주식회사 Method for forming upper electrode of a capacitor using ALD
KR20010088207A (en) * 2000-03-11 2001-09-26 윤종용 Method of forming composite dielectric film of tantalum oxide and titanium oxide

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KR100542247B1 (en) * 2002-07-19 2006-01-16 주식회사 하이닉스반도체 Atomic layer deposition of titanium nitride using batch type chamber and method for fabricating capacitor by the same
KR100465631B1 (en) * 2002-12-11 2005-01-13 주식회사 하이닉스반도체 Method for forming capacitor of semiconductor device

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