KR20010108779A - Method for forming contact by using tantalum oxide etch barrier - Google Patents

Abstract

The present invention relates to a method for forming a contact of a semiconductor device using a tantalum oxide etching barrier that can effectively prevent damage to the field oxide film during the etching process for forming a contact. phase and to form a Ta ₂ O ₅ thin film as an etching barrier layer, after forming the interlayer dielectric film by etching the interlayer insulation film in the contact region exposing the Ta ₂ O ₅ thin film, and then, to remove the Ta ₂ O ₅ thin film by wet etching It is characterized by exposing the portion of the semiconductor substrate to be contacted.

Description

Contact Formation Method of Semiconductor Device Using Tantalum Oxide Etch Barrier {METHOD FOR FORMING CONTACT BY USING TANTALUM OXIDE ETCH BARRIER}

TECHNICAL FIELD The present invention relates to the field of semiconductor device manufacturing, and more particularly, to a method for forming a contact of a semiconductor device.

Currently, a thin nitride layer is formed as an etch barrier layer in order to prevent a loss of field oxide during self-aligned contact etching during a highly integrated semiconductor device manufacturing process.

A contact forming method of a semiconductor device according to the prior art will be described with reference to the accompanying drawings, FIGS. 1A to 1D and FIGS. 2A and 2B.

FIG. 1A illustrates a state in which a gate electrode 11, a hard mask 12, and a nitride film spacer 13 are formed on a semiconductor substrate 10 on which a field oxide film (not shown) is completed.

FIG. 1B shows that the nitride film 14 serving as an etch barrier layer is formed on the entire structure.

FIG. 1C shows a BPSG film 15 forming an interlayer insulating film on the nitride film 14 and an etching mask 16 defining a plug contact region on the BPSG film 15.

FIG. 1D shows that the BPSG film 15 and the nitride film 14 are selectively etched to open the semiconductor substrate 10 in the contact region, and the etching mask is removed.

In the dry etching process for opening the active region to be contacted as described above, the nitride layer 14 is removed due to the difference in uniformity, and part of the exposed field oxide layer is lost by etching.

That is, as shown in FIG. 2A, the gate 11 and the like are formed on the semiconductor substrate 10 separated into the active region A and the field oxide film FOX region, and dry etching for forming an interlayer insulating layer and forming a contact is performed. In this process, the nitride film 14 covering the field oxide film FOX is removed during the transient etching, and a portion of the field oxide film FOX is exposed and etched as shown in FIG. 2B along the line AA ′ of FIG. 2A. Is lost. In FIG. 2A, reference numeral C1 denotes a bit line contact hole, and C2 denotes a contact hole, respectively.

When the field oxide film is lost, device characteristics are degraded, and when the etching condition is adjusted to minimize the loss of the field oxide film, a contact does not open as intended.

The present invention devised to solve the above problems is to provide a method for forming a contact of a semiconductor device using a tantalum oxide etching barrier, which can effectively prevent damage to the field oxide film during the etching process for forming the contact. have.

1A to 1D are cross-sectional views of a process for forming a contact of a semiconductor device according to the prior art;

2A and 2B are a plan view and a sectional view of a contact forming process of a semiconductor device according to the prior art;

3A to 3E are cross-sectional views of a contact forming process of a semiconductor device in accordance with an embodiment of the present invention;

4A and 4B are a plan view and a sectional view of a contact forming process of a semiconductor device according to an embodiment of the present invention.

* Description of reference numerals for the main parts of the drawings *

30 semiconductor substrate 31 gate electrode

32: hard mask 33: nitride film spacer

34: Ta ₂ O ₅ thin film 35: BPSG film

The present invention for achieving the above object is a first step of forming a gate electrode on a semiconductor substrate separated into an active region and a field oxide film region, and forming a nitride film spacer on the sidewall of the gate electrode; A second step of forming a Ta ₂ O ₅ thin film as an etch barrier layer on the entire structure in which the first step is completed; Forming an interlayer insulating film on the Ta ₂ O ₅ thin film; Selectively etching the interlayer insulating film to expose the Ta ₂ O ₅ thin film in a contact region; And removing the exposed Ta ₂ O ₅ thin film by wet etching to expose the semiconductor substrate.

According to the present invention, a Ta ₂ O ₅ thin film is formed as an etch barrier layer on a semiconductor substrate on which a field oxide film, a gate electrode, and a nitride film spacer are formed, an interlayer insulating film is formed, and the interlayer insulating film in the contact region is etched to form a Ta ₂ O ₅ thin film. And then wet etching to remove the Ta ₂ O ₅ thin film to expose the portion of the semiconductor substrate to be contacted.

A method of forming a contact of a semiconductor device according to an embodiment of the present invention will be described with reference to the accompanying drawings, FIGS. 3A to 3E and FIGS. 4A and 4B.

First, as shown in FIG. 3A, a gate electrode 31 and a hard mask 32 are formed on a semiconductor substrate 30 on which a field oxide film (not shown) is completed. Nitride films are formed and etched to form nitride spacers 33 on the sidewalls of the gate electrodes 31.

Nitride film etching for forming the nitride film spacer 33 is performed under a pressure of 100 mTorr to 300 mTorr and a power condition of 300 W to 1000 W. As the etchant, CF ₄ , CHF ₃ , O _2, and Ar gas are used.

Next, as shown in FIG. 3B, a Ta ₂ O ₅ thin film 34 having a thickness of 100 kPa to 500 kPa is formed as an etch barrier layer on the entire structure.

Subsequently, as shown in FIG. 3C, an etching mask 36 is formed on the Ta ₂ O ₅ thin film 34 to form an interlayer insulating film and defines a plug contact region on the BPSG film 35. Form.

Next, the BPSG film 35 is selectively selected with C ₄ F ₈ , CH ₂ F ₂ , O _2, and Ar gas at a pressure of 15 mTorr to 50 mTorr and a power condition of 1000 W to 2000 W. Etching to expose the Ta ₂ O ₅ thin film 34 of the plug contact region, the etching mask is removed.

Next, as illustrated in FIG. 3E, the Ta ₂ O ₅ thin film 34 of the plug contact region is removed by wet etching using NaOH or KOH. In this case, H ₂ O ₂ may be mixed and used in the etching solution, and the temperature of the etching solution is 80 ° C. or more.

As such, the Ta ₂ O ₅ thin film having a wet etching selectivity difference between the oxide film and the nitride film in the process of opening the active region to be contacted serves as an etch barrier layer, thereby effectively preventing the loss of the field oxide film.

That is, as shown in FIG. 4A, a gate 31 and the like are formed on the semiconductor substrate 30 separated into the active region A and the field oxide film FOX region, and dry etching for forming an interlayer insulating film and forming a contact is performed. field as shown by the progression by exposing the Ta ₂ O ₅ thin film 34, and then removing the exposed Ta ₂ O ₅ thin film 34 by wet etching view along the line a-a 'in Fig. 4a 4b The active region to be connected to the contact may be exposed without losing the oxide film FOX. In FIG. 4A, reference numeral C1 denotes a bit line contact hole, and C2 denotes a contact hole, respectively.

In the wet etching process of the Ta ₂ O ₅ thin film 34, the loss of the nitride film spacer 33 may be prevented according to the difference in the wet etching selectivity.

The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and various substitutions, modifications, and changes can be made in the art without departing from the technical spirit of the present invention. It will be apparent to those of ordinary knowledge.

According to the present invention, the Ta ₂ O ₅ thin film is formed as an etch barrier layer in the process of forming a contact between the nitride film spacers of neighboring gate electrodes, thereby effectively opening the active region to be connected to the contact without losing the field oxide film. .

Claims (4)

In the semiconductor device manufacturing method, Forming a gate electrode on a semiconductor substrate separated into an active region and a field oxide layer, and forming a nitride spacer on a sidewall of the gate electrode; A second step of forming a Ta ₂ O ₅ thin film as an etch barrier layer on the entire structure in which the first step is completed; Forming an interlayer insulating film on the Ta ₂ O ₅ thin film; Selectively etching the interlayer insulating film to expose the Ta ₂ O ₅ thin film in a contact region; And A fifth step of exposing the semiconductor substrate by wet etching the exposed Ta ₂ O ₅ thin film; Semiconductor device manufacturing method comprising a. The method of claim 1, In the fifth step, Method of manufacturing a semiconductor device, characterized in that using NaOH or KOH as a wet etching solution. The method of claim 2, The method of manufacturing a semiconductor device, characterized in that for mixing the H ₂ O ₂ in the etching solution. The method of claim 2 or 3, The temperature of the etching solution is a semiconductor device manufacturing method, characterized in that not lower than 80 ℃.