KR20010106634A - Electronic system having direct memory access controller operating periodically - Google Patents

Abstract

The electronic system disclosed herein directly accesses a timer that generates an interrupt signal at a predetermined time, a microcontroller unit that performs an interrupt processing routine in response to an interrupt signal output from the timer, and an interrupt signal output from the timer. It includes a direct memory access controller that accepts a request signal and performs a direct memory access operation. The timer includes a control register for storing control data corresponding to an operation mode of the timer and a data register for storing data corresponding to a period for generating the interrupt signal. The DMA controller configured in the electronic system having the above-described configuration operates periodically at regular time corresponding to the data stored in the data register in the timer.

Description

ELECTRICAL SYSTEM HAVING DIRECT MEMORY ACCESS CONTROLLER OPERATING PERIODICALLY}

The present invention relates to an electronic system having a direct memory access controller, and more particularly, to an electronic system having a direct memory access controller that is periodically operated by a timer.

Data transfer between a high speed storage device such as a magnetic disk and a memory may be speed limited by the CPU. Therefore, if you remove the CPU from this data transfer path and let the peripherals manage the memory bus directly, the transfer rate will be much higher. This transfer method is called direct memory access (DMA).

In general, in order to perform a DMA operation, an external input / output device or a universal asynchronous receiver / transmitter (UART) uses a method of inputting a DMA request signal to a DMA controller.

However, this method is very inconvenient when the DMA needs to operate every certain time.

Accordingly, an object of the present invention is to provide an electronic system having a DMA controller that operates periodically at regular time intervals.

1 is a block diagram showing an electronic system according to a preferred embodiment of the present invention;

FIG. 2 is a diagram showing in detail the configuration of a timer controller register configured in the timer shown in FIG. 1; FIG. And

FIG. 3 is a timing diagram illustrating generation of the interrupt signal according to the count value of the timer shown in FIG. 1.

* Description of the symbols for the main parts of the drawings *

10: timer

12: control register

14: data register

20: DMA controller

30: microcontroller unit

According to a feature of the present invention for achieving the object of the present invention as described above, the electronic system comprises: a timer for generating an interrupt signal at a predetermined time, performing an interrupt processing routine in response to the interrupt signal output from the timer; And a microcontroller unit, and a direct memory access controller which receives an interrupt signal output from the timer as a direct memory access request signal and performs a direct memory access operation.

In a preferred embodiment, the timer includes a control register for storing control data corresponding to an operation mode of the timer and a data register for storing data corresponding to a period for generating the interrupt signal.

(Action)

With such a configuration, it is possible to implement an electronic system having a DMA controller that operates automatically at regular time intervals.

(Example)

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to FIGS. 1 to 3.

1 is a block diagram illustrating an electronic system according to a preferred embodiment of the present invention.

Referring to FIG. 1, the electronic system includes a timer 10, a direct memory access (DMA) controller 20, and a microcontroller unit (MCU) 30. The microcontroller unit 30 is composed of an ARM7T manufactured by Advanced RISC Machines (ARM).

The timer 10 includes a control register 12 and a data register 14 to generate an interrupt signal at each preset time. The control register 12 stores control data corresponding to the operation mode of the timer 10. The data register 14 stores data corresponding to a preset time.

FIG. 2 is a diagram illustrating in detail the configuration of a timer controller register configured in the timer illustrated in FIG. 1.

2, the timer controller register 12 is composed of, for example, an 8-bit register. Control data [5: 3] stored in the timer control register 12 represents data corresponding to the mode of the timer. That is, when the control data [5: 3] is '000', the interrupt mode is shown, if it is '001', the match and overflow mode is shown, and if it is '01', the match and DMA modes are shown. In case of '100', it indicates the capture mode.

Referring back to FIG. 1, when the control data stored in the control register 12 is set to the match and DMA mode (ie, set to '010'), the counter embedded in the timer 10 starts a count operation. When the count value is the same as the data previously stored in the data register 14, the interrupt signal MATCH_INT is output.

The DMA controller 20 receives the interrupt signal MATCH_INT output from the timer 10 as a DMA request signal DMA_REQ and performs a DMA operation.

The microcontroller unit 30 receives an interrupt signal MATCH_INT output from the timer 10 and performs an interrupt processing routine. By changing the value stored in the data register 14 of the timer 10 in this interrupt processing routine, the time interval at which the DMA controller 20 is operated can be changed.

FIG. 3 is a timing diagram illustrating generation of the interrupt signal according to the count value of the timer shown in FIG. 1.

Referring to FIG. 3, when the value stored in the data register 14 configured in the timer 10 is a decimal number '3', the timer 10 has a count value of an internal counter (not shown) '3'. Each time a pulse type interrupt signal (MATCH_INT) is output.

As described above, the DMA controller 10 operates periodically at regular time corresponding to the value stored in the data register 14 in the timer 10.

In the above, the configuration and operation of the circuit according to the present invention are shown in accordance with the above description and drawings, but this is merely described, for example, and various changes and modifications are possible without departing from the spirit of the present invention. .

According to the present invention as described above, an electronic system having a DMA controller that operates automatically at regular time intervals is implemented.

Claims (2)

In electronic systems: A timer for generating an interrupt signal at each preset time; A microcontroller unit which performs an interrupt processing routine in response to an interrupt signal output from the timer; And And a direct memory access controller which receives the interrupt signal output from the timer as a direct memory access request signal and performs a direct memory access operation. The method of claim 1, The timer, A control register for storing control data corresponding to the operation mode of the timer; And a data register for storing data corresponding to a period for generating the interrupt signal.