KR20010073762A - Voltage controlled oscillator insensitive to temperature and external voltage variation - Google Patents

Abstract

PURPOSE: A voltage controlled oscillator unaffected by change of temperature and outer power voltage is provided to maintain the oscillating frequency regularly even if the outer power voltage and the temperature are changed. CONSTITUTION: The device includes many portions. The first and second current source portions(10, 11) obtain the current from the outer power voltage(VCC). A charging portion(12) form the first current pass between the outer power voltage(VCC) and the ground voltage(GND) when the power is turned on. A discharging portion(13) forms the second current path between the outer power voltage(VCC) and the ground voltage(GND) when the power is turned on. The first current Sync portion(14) synchronizes the current supplied through the first or second current pass. The second current Sync portion(15) synchronizes the current supplied by the second current source portion(11). The first and second source bias portions(16, 17) bias the first and second current source portions(10, 11) in order that they aren't affected by the outer power voltage and temperature. The first and second Sync bias portions(18, 19) bias the first and second current Sync portions(14, 15) in order that they aren't affected by the outer power voltage and temperature.

Description

Voltage controlled oscillator insensitive to temperature and external voltage variation

TECHNICAL FIELD The present invention relates to electronic circuits and, more particularly, to voltage controlled oscillators that are not affected by temperature and external power supply voltage variations.

One of the voltage controlled oscillators of the prior art is a type of voltage controlled oscillator which oscillates by using an increase or decrease in the amount of charge charged across a capacitor. In the voltage controlled oscillator according to the related art, when the external power supply voltage is changed, the voltage VCE between the collector and the emitter of the transistor is changed. Therefore, since the transmission ratio of the current mirror is changed, the oscillation frequency is changed even at the same input voltage. In addition, as the temperature changes, the oscillation frequency also changes because the voltage VBE between the base and emitter of the transistor changes.

However, if the oscillation frequency is changed in accordance with the external power supply voltage and temperature change, it becomes a factor that deteriorates the system characteristics. For example, when a conventional voltage controlled oscillator is applied to an FM radio tuner, if the free running frequency of the voltage controlled oscillator is changed by a change in external power supply voltage and temperature, the separation characteristic of the tuner is deteriorated. do.

It is an object of the present invention to provide a voltage controlled oscillator in which the oscillation frequency remains constant even when the external power supply voltage and temperature change.

1 is a diagram illustrating a voltage controlled oscillator according to an embodiment of the present invention.

2A and 2B are diagrams for explaining the operation of the voltage controlled oscillator shown in FIG. Figure 2a is a view showing the components related to the discharge operation of the voltage controlled oscillator according to the present invention, Figure 2b is a view showing the components related to the charging operation.

FIG. 2C is a voltage waveform diagram of the VA node of the voltage controlled oscillator shown in FIG. 1.

FIG. 3 is a diagram illustrating a first source bias unit of the voltage controlled oscillator illustrated in FIG. 1.

FIG. 4 is a diagram illustrating a second source bias unit of the voltage controlled oscillator illustrated in FIG. 1.

FIG. 5 is a diagram illustrating a bandgap reference current generator of the second source bias unit illustrated in FIG. 4.

FIG. 6 is a diagram illustrating a first sink bias unit of the voltage controlled oscillator illustrated in FIG. 1.

FIG. 7 is a diagram illustrating a second sink bias unit of the voltage controlled oscillator illustrated in FIG. 1.

8 is a diagram illustrating an example in which the voltage controlled oscillator shown in FIG. 1 is applied.

One aspect of the present invention for achieving the above object of the present invention relates to a voltage controlled oscillator. The voltage controlled oscillator according to the present invention is controlled by a capacitor which receives charge from an external power supply voltage, a current source unit sourcing a current from an external power supply voltage, a voltage difference between both ends of the capacitor and the current source unit, and when turned on, an external power supply A charging unit which forms a predetermined first current path between the voltage and the ground voltage, a discharge unit which is controlled complementarily to the charging unit and forms a predetermined second current path between the external power supply voltage and the ground voltage when turned on And a current sink unit for sinking current supplied through the first or second current path formed by the charging unit, and a source bias unit for biasing the current source unit and the current sink unit so as not to be influenced by an external power supply voltage and temperature; It consists of a sink bias section.

By the voltage controlled oscillator according to the present invention, the oscillation frequency of the voltage controlled oscillator is kept constant even when the external power supply voltage and temperature change.

In order to fully understand the present invention, the operational advantages of the present invention, and the objects achieved by the practice of the present invention, reference should be made to the accompanying drawings which illustrate preferred embodiments of the present invention and the contents described in the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. For each figure, like reference numerals denote like elements.

1 is a diagram conceptually illustrating a voltage controlled oscillator according to the present invention.

According to a preferred embodiment, the voltage controlled oscillator includes a capacitor CS, a first and second current source parts 10 and 11, a charging part 12, and a discharge part 13, which receive charges from an external power supply voltage VCC. And first and second current sinks 14 and 15, first and second source bias portions 16 and 17, and first and second sink bias portions 18 and 19. The first and second current source portions 10, 11 source current from an external power supply voltage VCC. The charging unit 12 is controlled by the voltage difference between the capacitor CS and the first and second current source units 10 and 11, and when turned on, the charging unit 12 is disposed between the external power supply voltage VCC and the ground voltage GND. 1 Form a current path. The discharge part 13 is complementarily controlled with the charging part 12 and forms a second current path between the external power supply voltage VCC and the ground voltage GND when turned on. The first current sink 14 sinks the current supplied through the first or second current path, and the second current sink 15 sinks the current supplied by the second current source 11. . In addition, the first and second source bias parts 16 and 17 bias the first and second current source parts 10 and 11 so as not to be affected by the external power supply voltage VCC and the temperature, respectively. The second sink bias units 18 and 19 bias the first and second current sink units 14 and 15 so as not to be influenced by an external power supply voltage and temperature, respectively.

In addition, the charging unit 12 includes a first charging transistor Q49 and a second charging transistor Q50. The first charging transistor Q49 has a base voltage VA biased by the first current source unit 10, and receives a current supplied by the first current path to the collector and receives the first current sink unit through an emitter. Output to (14). In the second charging transistor Q50, the base voltage VA is biased by the first current source unit 10, and the current supplied by the second current source unit 11 is applied to the collector to receive the second voltage through the emitter. 2 is output to the current sink unit 15. And the discharge part 13 is comprised from the 1st discharge transistor Q51 and the 2nd discharge transistor Q52. In the first discharge transistor Q51, the base voltage VB is biased by the collector voltage of the first charging transistor Q49, and the current supplied by the second current path is applied to the collector to receive the first current through the emitter. Output to the sink 14, the second discharge transistor Q52 is biased by the collector voltage of the first charging transistor Q49, and generates the collector voltage as the output FO of the voltage controlled oscillator. In the present specification, for convenience of description, the current flowing through the base of the n-th transistor is represented by IBn, the current flowing through the collector to the emitter (or vice versa) is represented by IQn, and the current flowing through the resistor Rn is represented by IRn. In addition, the phenomenon in which the amount of charge charged in the capacitor decreases is called "discharge", and the phenomenon in which the amount of charged charge increases is called "charge".

As shown in FIG. 1, the base voltages of the first and second charging transistors Q49 and Q50 constituting the charging unit 12 are VA, and the first and second discharge transistors constituting the discharge unit 13. Each base voltage (Q51, Q52) is VB. Therefore, according to the magnitudes of the VA and VB voltages, the charging section 12 and the discharging section 13 are controlled in a differential type. In addition, the first and second current source units 10 and 11 reduce the amount of charge charged in the capacitor CS, and the current IQ50 flowing through the collector of the second charging transistor Q50 is charged in the capacitor. Increases the amount of charged charge.

Hereinafter, the operation of the voltage controlled oscillator shown in FIG. 1 will be described in detail by dividing the operation into the discharge operation and the charging operation.

2A and 2B are diagrams for explaining the operation of the voltage controlled oscillator shown in FIG. FIG. 2A is a diagram showing the discharging operation of the voltage controlled oscillator according to the present invention, and FIG. 2B is a diagram showing the charging operation.

Initially, if the base voltage VA of the first and second charging transistors Q49 and Q50 is lower than the base voltage VB of the first and second discharge transistors Q51 and Q52, the charging transistors Q49. Q50 is turned off and the discharge transistors Q51 and Q52 are turned on. Then, the current passing through the first resistor R45 flows to the second resistor R48 and the third resistor R47. However, the current IR47 flowing through the third resistor R47 flows into the base of the first discharge transistor Q51, and the magnitude thereof is the emitter of the first discharge transistor Q51 through the second resistor R48. This is much smaller than the current flowing into the furnace (IR48). At this time, if the voltage VBH biasing the discharge unit 13 is obtained, Becomes By the way, as mentioned above, it is IR47 << IR48, Therefore, the voltage VBH biasing the discharge unit 13 is simplified as in Equation 1 below.

In summary, when the amount of charge charged in the capacitor CS decreases (at the time of discharge), a first current path R45-> R48-> Q51-> Q53 is formed between the power supply voltage VCC and the ground voltage GND. do. In this case, since the first discharge transistor Q51 is turned on, the charge charged in the capacitor CS is discharged through the first and second source bias units 10 and 11. Therefore, the voltage VA biasing the charging section 12 rises.

When VA continues to rise and becomes higher than VBH in Equation 1, the first and second charging transistors Q49 and Q50 are turned on and the first and second discharge transistors Q51 and Q52 are turned off. The operation in this case is explained in detail by FIG. 2B.

The current IQ50 sourced from the second current source unit 11 increases the amount of charge charged in the capacitor CS. The condition of is set to be satisfied. Then, the amount of charge charged in the capacitor CS is increased. Therefore, the potential of VA is lowered again. At this time, the current IR45 passing through the first resistor R45 flows into the collector of the first charging transistor Q49 through the third resistor R47. That is, a second current path R45->R47->Q49-> Q53 is formed between the power supply voltage VCC and the ground voltage GND. Therefore, if the potential VBL of VB is obtained, to be. By the way, since the base current IB49 of the first charging transistor 49 is much smaller than the collector current IR47, VBL is simplified to the following equation (2).

When the potential of VA is lowered to be equal to VBL in Equation 2, the charging unit 12 is turned off again and the discharge unit 13 is turned on. The voltage controlled oscillator according to the present invention oscillates while repeating such an operation.

FIG. 2C is a voltage waveform diagram of the VA node of the voltage controlled oscillator shown in FIG. 1.

The voltage controlled oscillator according to the present invention is the magnitude of the current IQ47, IQ48, IQ50 to charge and discharge the capacitor CS and the voltage difference between VA Determined by In FIG. 2C, the oscillation frequency is 1 / T, which is the inverse of the entire period T, and the total period T is the sum of the VA voltage rising section T1 and the falling section T2. The period of each section will be described in detail. In the rising section T1, the capacitor CS is driven by the first and second current source units 10 and 11 while the constant current IQ50 charging the capacitor CS is zero. It is a discharge section (see FIG. 2A). Since the capacitor CS is discharged by a constant current to be. Therefore, T1 becomes the following equation (3).

The current charging the capacitor CS in T2, in which the potential of VA falls, is IQ50- (IQ47 + IQ48). Therefore, T2 becomes the following formula (4).

Therefore, when the oscillation frequency is obtained with reference to Equations 3 and 4, Equation 5 is obtained.

Analyzing Equation 5, the oscillation frequency f of the voltage controlled oscillator is determined according to the first and second source bias currents IB47 and IB48 and the first and second sink bias currents IB53 and IB54. In addition, as shown in Equation 5, when the first source bias current IB47 changes, the magnitude of the current IQ47 sourced by the first current source unit 10 also changes, so that the oscillation frequency f changes. do. Therefore, in order that the oscillation frequency f of the voltage controlled oscillator is not affected by the external voltage and temperature change, the bias currents IB47, IB48, IB53, and IB54 must be designed so as not to be affected by the external voltage and temperature change.

3 is a diagram illustrating an embodiment of a first source bias unit of the voltage controlled oscillator illustrated in FIG. 1.

The first source bias unit 16 shown in FIG. 3 is a source current generating the same current by receiving the current generated from the source current generating unit 31 and the source current generating unit 31 generating a predetermined current. The difference between the mirror 33, the negative feedback portion 35 for negatively returning the current repeated in the source current mirror 33 to the source current generator 31, and the predetermined set voltage VSET and the input voltage VI. By adjusting the magnitude of the current repeated by the source current mirror 33 to bias the first current source portion.

The source current generator 31 generates a current IQ31 suitable for biasing the first source bias unit, and outputs the current IQ31 to the transistor Q30 constituting the source current mirror 33. The thirtieth transistor repeats the applied current IQ31 to determine the collector and emitter currents IQ29 and IQ46 of transistors Q29 and Q46. Transistor Q46 serves to sink the current of input voltage regulator 37. When the external power supply voltage VCC rises, the voltage VCE31 between the emitter and collector of the transistor Q31 increases, so that the current IQ31 passing through the transistor Q31 also increases. On the other hand, the voltage between the emitter and collector VCE32 of transistor Q32 is fixed and therefore constant. The current IQ31 of the transistor Q31 is transmitted to the transistor Q29 and the transistor Q46 by the transistor Q30 of the source current mirror 33. Therefore, since the current IQ29 of the transistor Q29 also increases, the current IQ28 flowing through the transistor Q28 of the negative feedback unit 35 also increases. By the way, the current supplied by the constant current source I25 is constant. Therefore, the current IQ31 passing through the transistor Q31 is reduced because the current IR28 transmitted to the resistor R28 of the current IR29 flowing through the resistor R29 is reduced.

On the contrary, if the external power supply voltage VCC falls, the current IQ31 passing through the transistor Q31 becomes small, so that the current IQ31 of the transistor Q31 is caused by the transistor Q30 and the transistor Q29 and the transistor ( Q46). Accordingly, the current IQ29 of the transistor Q29 also decreases, so that the current IQ28 flowing through the transistor Q28 also decreases. In addition, since the current supplied by the constant current source I25 is constant, the current IR28 transmitted to the resistor R28 of the current IR29 flowing through the resistor R29 is increased. Thus, the current IQ31 passing through the transistor Q31 is increased. As a result, even if the external power supply voltage VCC rises or falls, the current IB31 generated by the source current generator 31 is kept constant.

When the temperature rises, the voltage VBE33 between the base and emitter of the transistor Q33 decreases, so that the current IQ31 of the transistor Q31 also decreases. Therefore, since the current IQ29 of the transistor Q29 decreases, the current IQ28 of the transistor Q28 decreases. Therefore, the current IQ31 of the transistor Q31 is increased because the current IR28 flowing through the resistor R28 of the current IR29 flowing through the 29th resistor R29 is increased. If the temperature falls, IQ31 also increases because VBE33 increases. Therefore, the current IQ28 increases because IQ29 increases. Therefore, the current IR28 flowing through the resistor R28 of the current IR29 flowing through the resistor R29 is reduced, so that the current IQ31 of the transistor Q31 is reduced. As such, the source current generator 31 of the first source bias unit 16 shown in FIG. 3 outputs a constant current IQ31 even if the temperature and the external power supply voltage VCC change.

The input voltage adjusting unit 37 is biased by the collector voltages of the transistors Q44 and Q45 and the transistors Q44 and Q45 respectively biased by the predetermined set voltage VSET and the input voltage VI, respectively. The emitter of is connected to the common connected PMOS transistors Q42 and Q43, the resistors R39 and R40 connected between the emitter of each of the PMOS transistors Q42 and Q43 and the external power supply voltage VCC, and the transistors ( Q44, Q45, respectively, and resistors R41, R42 connected between each collector of transistors Q42, Q43. In order for the input voltage adjuster 37 to have symmetry, the resistors R39 and R40 have the same value, and the resistors R41 and R42 have the same value.

When the input voltage VI and the set voltage VSET have the same value, the left path (R39-> Q42-> R41-> Q44) and the right path (R40-> Q43-> R42) of the input voltage adjuster 37 The current flowing through Q45) is the same. When the input voltage VI is greater than the predetermined set voltage VSET, the current IQ44 of the transistor Q44 becomes larger than the current IQ45 of the transistor Q45. Therefore, the amount of current flowing through the left path (R39-> Q42-> R41-> Q44) of the input voltage adjuster 37 becomes larger than the amount of current flowing through the right path (R40-> Q43-> R42-> Q45). Therefore, the base current IB47 of the transistor Q43 becomes small. On the contrary, when the input voltage VI is smaller than the predetermined set voltage VSET, the current IQ44 of the transistor Q44 becomes smaller than the current IQ45 of the transistor Q45. Therefore, the amount of current flowing through the left path (R39-> Q42-> R41-> Q44) of the input voltage adjusting unit 37 becomes larger than the amount of current flowing through the right path (R40-> Q43-> R42-> Q45). The base current IB47 of the transistor Q43 becomes large. Accordingly, the amount of current IQ47 (see FIG. 1) sourced by the first current source unit 10 (see FIG. 1) biased by the base current IB47 of the transistor Q43 is adjusted. The set voltage VSET is set such that the current IB47 biasing the first current source unit 10 (see FIG. 1) in consideration of the input voltage VI has an appropriate value.

As a result, the first source bias unit 16 illustrated in FIG. 3 repeats the current IQ31 generated by the source current generator 31 at the source current mirror 33 to supply the input voltage adjuster 37. Sink the current. At this time, since the current IQ31 generated by the source current generator 31 is negatively fed back to the source current generator 31 by the negative feedback unit 35, the current IQ31 is stabilized without being affected by temperature and voltage changes. Therefore, the output current IB47 of the input voltage regulator 37 is also stabilized without being affected by temperature and voltage changes. The output current IB47 of the input voltage adjuster 37 is affected by the difference between the input voltage VI and the set voltage VSET.

FIG. 4 is a diagram illustrating an embodiment of the second source bias unit 17 of the voltage controlled oscillator shown in FIG. 1.

The second source bias unit 17 illustrated in FIG. 4 includes a band gap reference current generator 41, a reference current mirror 43, a fixed voltage generator 45, a stable current mirror 47, and a Wilson current mirror. It consists of 49.

The band gap reference current generator 41 generates a reference current IBG that is not affected by a change in temperature, and applies it as a collector current of the transistor Q1 of the reference current mirror 43. This current is repeated in the reference current mirror 43 to generate the collector current IQ7 of the transistor Q7 of the stable current mirror 47. However, referring to the configuration of the fixed voltage generator 45, the tenth resistor R10 is connected between the collector and the base of the transistor Q13, and the resistor R11 is connected between the base and the emitter.

If the collector-emitter voltage VCE13 of transistor Q13 is obtained, to be. Β is a current amplification degree of the transistor Q13. By the way, If you design R11 small enough This results in VCE13 as shown in Equation 6 below.

As can be seen in Equation 6, the voltage between the collector and emitter VCE13 of the transistor Q13 is only affected by the ratio R10 / R11 of the resistance values of the resistors R10 and R11, so that the temperature and the external supply voltage It is fixed regardless of the change. Therefore, since the base voltage of the transistor Q10 is fixed at VCE13, the base voltage of the transistor Q9 is also fixed. Therefore, even if the external power supply voltage VCC and the temperature change, the reference current mirror 43 repeats the current IBG generated by the reference current generator 41.

Since the current IQ2 of the transistor Q2 which repeats the output current IBG of the band gap reference current generator 41 is not affected by the external power supply voltage VCC and the temperature change, the stable current mirror 47 has an external The current which is not affected by the power supply voltage VCC and the temperature change is repeated with the transistor Q35. The current IQ35 of the transistor Q35 is again applied to the Wilson current mirror 49. By the way, the current amplification degree IWS of the Wilson current mirror 49 is defined as the ratio IQ36 / IQ35 of the current IQ35 of the transistor Q35 and the current IQ36 of the transistor Q36, and the value is to be. Β is the current amplification degree of each of the transistors Q36, Q37, and Q38, and the current amplification degree of the three transistors Q36, Q37, and Q38 has the same value. However, when the temperature and the external power supply voltage VCC change, the current amplification degree β of each of the set transistors Q36, Q37, and Q38 changes. Thus, the sensitivity to β of the current amplification degree across the Wilson current mirror 49 Is as shown in Equation 7 below.

As can be seen from Equation 7, the sensitivity Although the exponent of the highest order term of the molecule is quadratic, the denominator is fourth order, and the amplification degree β of a typical transistor has a value of hundreds, Is nearly zero. Therefore, the output IQ35 of the stable current mirror 47 transmitted to the Wilson current mirror 49 is transmitted to the transistor Q39 regardless of the external power supply voltage VCC and the temperature. Therefore, the base current IB48 of the transistor Q39 also biases the second current source portion 11 (see FIG. 1) regardless of the external power supply voltage VCC and temperature.

In addition, since the collector potential of the transistor Q48 of the second current source unit 11 (see FIG. 1) is determined in conjunction with the external power supply voltage VCC, the collector potential remains constant even if the external power supply voltage VCC changes. Therefore, the base current IB48 of the transistor Q39 is delivered to the transistor Q48 without being affected by the external power supply voltage VCC.

FIG. 5 is a diagram illustrating an embodiment of a bandgap reference generator of the second source bias unit illustrated in FIG. 4. The band gap reference current generator illustrated in FIG. 5 may include the first and second reference transistors QR1 and QR2 and the third reference transistor QR3 having a base connected to the collector of the second reference transistor QR2. , A first resistor connected between the external power supply voltage VCC and the collector of the first reference transistor QR1, a second resistor RR2, an emitter, and ground connected between the collector of the second transistor and the external power supply voltage VCC. And a third resistor RR3 coupled between the voltage GND, and an output resistor RBG coupled between the collector and emitter of the third reference transistor QR3. The basic concept of the band gap reference current generator 41 shown in FIG. 5 is to combine the threshold voltage of the transistor, which is a factor that decreases when the temperature rises, and the resistance value that increases, so that the circuit is not affected by temperature.

The voltage VBG across the output resistor RBG is the sum of the voltages across the base and emitter voltage VBE3 of the third reference transistor QR3 and the second resistor RR2. However, the collector currents of the first and second reference transistors QR1 and QR2 are respectively , to be. here And Is the saturation current of each of the first and second reference transistors QR1 and QR2. Then, the voltage VR3 between the third resistor RR3 is the voltage VBE1 between the base and emitter of the first reference transistor QR1 and the voltage between the base and emitter of the second reference transistor QR2. It corresponds to the difference of VBE2), to be. Here, if the current amplification degree β of each of the first to third reference transistors QR1, QR2 and QR3 is large enough to ignore each base current, the current flowing into the collector of the second reference transistor QR2 is already It has the same value as the current flowing out of the rotor. Accordingly, the voltage across the output resistor RBG is expressed by Equation 8 below.

In Equation 8, as the temperature increases, VBE3 decreases and VT increases, so the influence on temperature change is minimized.

In addition, when the external power supply voltage VCC of the band gap reference current generator 41 shown in FIG. 5 is designed using a voltage regulator, the external power supply voltage VCC is stabilized without change. Therefore, the output current IBG of the band gap reference current generator 41 is determined irrespective of changes in temperature and power supply voltage.

FIG. 6 is a diagram illustrating an embodiment of a first sink bias unit of the voltage controlled oscillator illustrated in FIG. 1.

The first sink bias unit 18 illustrated in FIG. 6 applies a voltage repeating unit 61 for applying and repeating a predetermined constant voltage VR and a predetermined constant voltage VR repeated in the voltage repeating unit 61. And a sink current mirror 65 for biasing the first current sink 14 (see FIG. 1) by repeating the current generated by the sink current generator 63 and the sink current generator 63 to generate current. do.

The predetermined constant voltage VR is applied to the base of the transistor Q16 of the voltage repeater 61. If the voltage repeater 61 is designed so that the resistance values of the resistors R13 and R14 are equal to be symmetrical, the applied constant voltage VR is repeated at the base of the transistor Q17. Since the emitter voltage of the transistor Q17 becomes equal to the applied constant voltage VR, the current IR18 flowing through the resistor becomes VR / R18. Similarly, ignoring the current flowing through the base of the transistor, the current IQ19 flowing through the transistor Q19 also becomes VR / R18.

However, since the transistor Q20 is biased by the same base voltage as the transistor Q19, the current IQ20 of the transistor Q20 also becomes VR / R18. This current IQ20 is repeated by the transistor Q21 of the sink current mirror 65 to bias the first current sink 14 (see FIG. 1). At this time, since the applied constant voltage VR does not change even when the external power supply voltage VCC and the temperature change, the IQ19 is constant and the IQ20 is fixed constantly. Therefore, the first current sink 14 (see Fig. 1) is biased by a constant constant current IB53.

FIG. 7 is a diagram illustrating an embodiment of a second sink bias unit of the voltage controlled oscillator illustrated in FIG. 1.

The second sink bias unit 19 illustrated in FIG. 7 receives the current generated by the sink current generator 71 and the sink current generator 71 for generating a predetermined current to generate the same current. It consists of the negative feedback part 75 which negatively returns the current repeated by the mirror 73 and the sink current mirror 73 to the sink current generation part 71. In order for the transistors Q69 and Q70 constituting the sink current mirror 73 to operate as a current mirror, the resistors R66 and R67 connected to the respective emitters are designed to have the same value.

The configuration and operation of the second sink bias portion 19 shown in FIG. 7 is the same as that of the first source bias portion 16 shown in FIG. Therefore, for the sake of simplicity, the detailed description is omitted herein.

As illustrated in FIG. 3, the sink current generator 71 of the second sink bias unit 19 illustrated in FIG. 7 outputs a constant current IQ71 even when the temperature and the external power supply voltage VCC change. Then, the output current IQ71 is repeated by the transistor Q70 constituting the sink current mirror 73 to bias the second current sink 15 (see FIG. 1). Since the second current sink 15 (see FIG. 1) is biased by a constant constant current IB54, the second current sink 15 (see FIG. 1) sinks a constant current even when the temperature and the external power supply voltage VCC change.

FIG. 8 is a diagram illustrating an embodiment of the voltage controlled oscillator shown in FIG. 1.

The voltage controlled oscillator according to the present invention shown in FIG. 8 includes the first and second source bias units 16 and 17 and the first and second shown in FIGS. 3 to 7 in the voltage controlled oscillator shown in FIG. The sink bias units 18 and 19 are shown in combination. Since the operation of each component of the voltage controlled oscillator shown in FIG. 8 has been described in detail with reference to FIGS. 1 to 7, the description thereof is omitted to avoid duplication. Components not illustrated in FIGS. 1 to 7 of the components shown in FIG. 8 are attached to operate the voltage controlled oscillator according to the present invention, and values of each element are omitted.

Table 1 shows the experimental results of the voltage controlled oscillator according to the present invention. The temperature was varied in 25 degree intervals from -25 degrees Celsius to +75 degrees Celsius, and the external power supply voltage (VCC) was changed to 1.9V, 3.0V, and 10.0V.

VCC = 1.9V VCC = 3.0V VCC = 10.0V T = -25 ° 305.4KHz 306.1KHz 306.1KHz T = 0 ° 305.4KHz 305.4KHz 304.0KHz T = 25 ° 305.4KHz 304.8KHz 303.4KHz T = 50 ° 305.4KHz 304.8KHz 303.4KHz T = 75 ° 306.8KHz 306.1KHz 303.4KHz

As can be seen from Table 1, even if the external power supply voltage VCC and the temperature change severely, the oscillation frequency remains almost constant.

Although the present invention has been described with reference to the embodiments shown in the drawings, this is merely exemplary, and it will be understood by those skilled in the art that various modifications and equivalent other embodiments are possible.

For example, the voltage controlled oscillator of the present invention outputs the collector voltage FO of the second discharge transistor Q52 of the discharge unit 13 as an output. In this case, the second discharge transistor Q52 may be used in the form of an open collector, and the waveform of the output voltage FO becomes a square wave. However, the output of the voltage controlled oscillator does not necessarily have to be the collector voltage of the second discharge transistor Q52, and the base voltage VA of the first charging transistor Q49 may also be used as the output.

In addition, the first and second source bias units 16 and 17 and the first and second sink bias units 18 and 19 according to the present invention respectively illustrate the embodiments shown in FIGS. 3, 4, 6, and 7. Although described with reference to the present invention, the technical idea of the present invention is not limited thereto. Rather, the temperature of the first and second current source units 10 and 11 and the first and second current sink units 18 and 19 may be controlled. It is emphasized that any structure capable of constantly biasing the change in the supply voltage VCC is possible.

Therefore, the true technical protection scope of the present invention will be defined by the technical spirit of the appended claims.

By the voltage controlled oscillator according to the present invention, the oscillation frequency is kept constant even when the temperature and the external power supply voltage change.

Claims (3)

In a voltage controlled oscillator oscillating by increasing or decreasing the amount of charge charged in a capacitor, A capacitor supplied with a charge from an external power supply voltage; A current source unit for sourcing a current from an external power supply voltage; A charging part controlled by the voltage difference between the capacitor and the current source part, and configured to form a predetermined first current path between an external power supply voltage and a ground voltage when turned on; A discharge part controlled complementarily to the charging part and forming a predetermined second current path between an external power supply voltage and a ground voltage when turned on; A current sink for sinking the current supplied through the first or second current path formed by the charging and discharging portions; And And a current bias section and a sink bias section for biasing the current source section and the current sink section so as not to be influenced by an external power supply voltage and temperature. The method of claim 1, wherein the source bias unit, A source current generator for generating a predetermined current; A source current mirror configured to generate the same current by receiving the current generated by the source current generator; A negative feedback unit for negatively feedbacking the current repeated in the source current mirror and applying it to the source current generation unit; And And an input voltage adjuster for biasing the current source by adjusting an amount of current repeated by the source current mirror by a difference between a predetermined set voltage and an input voltage. The method of claim 1, wherein the sink bias unit, A voltage repeater configured to repeat a predetermined constant voltage; A sink current generator configured to generate a current by receiving a predetermined constant voltage repeated in the voltage repeater; And And a sink current mirror configured to repeat the current generated by the sink current generator to bias the current sink.