KR20010073286A - Method Of Driving High Frequency Plasma Display Panel - Google Patents
Method Of Driving High Frequency Plasma Display Panel Download PDFInfo
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- KR20010073286A KR20010073286A KR1020000001546A KR20000001546A KR20010073286A KR 20010073286 A KR20010073286 A KR 20010073286A KR 1020000001546 A KR1020000001546 A KR 1020000001546A KR 20000001546 A KR20000001546 A KR 20000001546A KR 20010073286 A KR20010073286 A KR 20010073286A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
- G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
- G09G3/291—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes
- G09G3/292—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes for reset discharge, priming discharge or erase discharge occurring in a phase other than addressing
- G09G3/2922—Details of erasing
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
- G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
- G09G3/291—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes
- G09G3/292—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes for reset discharge, priming discharge or erase discharge occurring in a phase other than addressing
- G09G3/2925—Details of priming
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/06—Details of flat display driving waveforms
- G09G2310/066—Waveforms comprising a gently increasing or decreasing portion, e.g. ramp
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- Power Engineering (AREA)
- Plasma & Fusion (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Gas Discharge Display Tubes (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Gas-Filled Discharge Tubes (AREA)
Abstract
Description
본 발명은 플라즈마 디스플레이 장치에 관한 것으로, 특히 방전실패를 방지할 수 있는 고주파 플라즈마 디스플레이 패널의 구동방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display device, and more particularly, to a method of driving a high frequency plasma display panel capable of preventing a discharge failure.
최근 들어, 대형 평판 표시장치의 필요에 따라 대면적의 평판 디스플레이로서 패널 제작이 용이한 플라즈마 디스플레이 패널(Plasma Display Panel; 이하, PDP라 한다)에 대한 연구가 활발히 진행되고 있다. PDP는 통상 가스방전 현상을 이용하는 것으로 가스방전시 발생하는 진공자외선이 형광체를 발광시킴으로써 발생하는 가시광을 이용하여 화상을 표시하게 된다. 이러한 PDP는 통상 매트릭스 형태의 색화소에 대응되는 방전셀들을 구성으로 한다. 방전셀들 각각은 어드레스방전에 의해 선택된 후 계속적인 유지방전에 의해 발생된 진공 자외선이 형광체를 발광시킴으로써 가시광을 방출하게 된다. 이 경우 PDP는 유지방전기간, 즉 유지방전 횟수를 조절하여 영상 표시에 필요한 단계적인 밝기(Gray Scale)를 표시하게 된다. 유지방전 횟수는 PDP의 발광휘도 및 발광효율을 결정하는 중요한 요소가 되고 있다. 그런데, 기존의 저주파 교류(AC) 전압을 이용하여 유지방전을 발생시키는 경우 유지 방전은 인가되는 전압펄스마다 짧은 순간에 1번씩만 발생하고 그 외의 대부분 시간은 벽전하 형성 및 다음 방전을 위한 준비단계로 소비됨으로써 PDP의 발광휘도 및 발광효율은 낮을 수밖에 없었다.Recently, researches on plasma display panels (hereinafter referred to as PDPs), which are easy to manufacture panels as large-area flat panel displays, have been actively conducted according to the needs of large flat panel displays. The PDP generally uses a gas discharge phenomenon to display an image using visible light generated by vacuum ultraviolet rays generated during gas discharge to emit phosphors. Such a PDP has discharge cells corresponding to color pixels in a matrix form. Each of the discharge cells is selected by the address discharge and then the vacuum ultraviolet rays generated by the sustain discharge discharge the phosphor to emit visible light. In this case, the PDP adjusts the sustain discharge period, that is, the number of sustain discharges, to display the gray scale required for displaying an image. The number of sustain discharges is an important factor in determining the luminous luminance and luminous efficiency of the PDP. However, in the case of generating a sustain discharge using the existing low frequency AC voltage, the sustain discharge is generated only once at a short time for each applied voltage pulse and most of the other time is a step for forming wall charge and preparing for the next discharge. By consuming the PDP, the luminous luminance and luminous efficiency of the PDP were inevitably low.
이러한 PDP의 낮은 발광휘도 및 발광효율 문제를 해결하고자 최근에는 고주파전압을 유지전압으로 인가하는 방법이 도입되었다. 보통 수 MHz 내지 수백 MHz 대의 고주파전압을 인가하게 되는 경우 방전셀의 내부에 진동전계가 발생하여 전자가 진동운동을 하면서 방전가스를 연속적으로 이온화시키고 여기시킴으로써 거의 대부분의 방전시간동안 전자의 소멸없이 연속적인 방전, 즉 고주파방전이 발생하게 된다. 이러한 고주파 방전은 글로우 방전에서 전극간의 거리가 긴 경우 방전효율이 매우 높은 양광주(Positive Column)와 같은 물리적인 효과를 갖게 된다. 이에 따라, 고주파 방전을 이용하는 경우 PDP의 방전효율을 현저하게 향상시킬 수 있는 장점이 있다.In order to solve the low luminous luminance and luminous efficiency problems of the PDP, a method of applying a high frequency voltage as a sustain voltage has recently been introduced. When a high frequency voltage of several MHz to several hundred MHz is applied, a vibrating electric field is generated inside the discharge cell, and electrons are continuously vibrated to ionize and excite the discharge gas as it vibrates, thereby continuously discharging the electrons for most of the discharge time. Discharge, that is, high frequency discharge occurs. The high frequency discharge has a physical effect such as a positive column having a very high discharge efficiency when the distance between the electrodes is long in the glow discharge. Accordingly, there is an advantage that can significantly improve the discharge efficiency of the PDP when using a high frequency discharge.
도 1을 참조하면, 통상의 고주파 PDP에 구성되는 방전셀에 대한 사시도가 도시되어 있다.Referring to Fig. 1, a perspective view of a discharge cell constituted of a typical high frequency PDP is shown.
도 1에 도시된 PDP 방전셀은 상부기판(10)에 배치된 고주파전극(12)과, 하부기판(14)에 배치된 어드레스전극(16) 및 주사전극(20)을 구비한다. 상부기판(10)과 하부기판(14)이 이격되어 평행하게 배치되고, 하부기판(14) 상에는 세로방향의 어드레스전극(16)과 가로방향의 주사전극(20)이 형성된다. 어드레스전극(16)과 주사전극(20) 사이에는 유전층(48)이 형성된다. 상부기판(10)에는 주사전극(20)과 같은 방향으로 고주파전압이 인가되는 고주파전극(12)이 형성된다. 상부기판(10)과 하부기판(14) 사이에는 이웃한 방전셀간의 광학적 간섭을 배제하기 위한 격벽(24)이 사방이 막힌 구조로 형성된다. 격벽(24)이 표면에는 적색이나 녹색 또는 청색의 가시광을 발생하기 위한 형광체(26)가 도포된다. 그리고, 내부의 방전공간에는 방전가스가 충진된다. 이러한 방전셀에서는 주사전극(20)에 주사전압이 공급됨과 아울러 어드레스전극(16)에 데이터전압이 공급되는 경우 그 전압차에 의해 어드레스방전을 함으로써 하전입자들이 생성된다. 이어서, 고주파전극(12)에 공급되는 고주파전압에 의해 상기 하전입자들이 진동운동을 하면서 방전가스를 연속적으로 이온화 및 여기시키게 되고, 여기된 가스 원자 및 분자가 기저상태로 천이하면서 진공자외선을 방출하여 형광체를 발광시킴으로써 가시광이 방출된다.The PDP discharge cell shown in FIG. 1 includes a high frequency electrode 12 disposed on the upper substrate 10, an address electrode 16 and a scan electrode 20 disposed on the lower substrate 14. The upper substrate 10 and the lower substrate 14 are spaced apart and arranged in parallel, and the address electrode 16 in the vertical direction and the scan electrode 20 in the horizontal direction are formed on the lower substrate 14. A dielectric layer 48 is formed between the address electrode 16 and the scan electrode 20. The upper substrate 10 is formed with a high frequency electrode 12 to which a high frequency voltage is applied in the same direction as the scan electrode 20. Between the upper substrate 10 and the lower substrate 14, barrier ribs 24 for eliminating optical interference between neighboring discharge cells are formed in a block-shaped structure. On the surface of the partition wall 24, a phosphor 26 for generating visible light of red, green or blue color is applied. Then, the discharge gas is filled in the discharge space therein. In such a discharge cell, when the scan voltage is supplied to the scan electrode 20 and the data voltage is supplied to the address electrode 16, charged particles are generated by performing address discharge by the voltage difference. Subsequently, the charged particles continuously ionize and excite the discharge gas by vibrating motion by the high frequency voltage supplied to the high frequency electrode 12, and emits vacuum ultraviolet rays while the excited gas atoms and molecules transition to the ground state. Visible light is emitted by emitting phosphors.
도 2은 도 1에 도시된 방전셀을 구성으로 하는 PDP의 전체적인 전극배치 구조를 도시한 것이다. 도 2에 도시된 PDP는 각 칼럼라인(Column Line)에 대응하여 배치된 어드레스 전극라인들(X1∼Xm)과, 각 로오라인(Row Line)에 대응하여 나란하게 배치된 주사 전극라인들(Y1∼Yn) 및 고주파 전극라인들(RF)을 구비한다. 이러한, 어드레스 전극라인들(X1∼Xm)과 주사전극라인들(Y1∼Yn) 및 고주파 전극라인들(RF)의 교차지점마다 방전셀(28)이 마련되게 된다.FIG. 2 shows the overall electrode arrangement structure of the PDP constituting the discharge cell shown in FIG. The PDP shown in FIG. 2 includes address electrode lines X1 to Xm arranged corresponding to each column line, and scan electrode lines Y1 arranged side by side corresponding to each row line. Yn) and high frequency electrode lines RF. The discharge cell 28 is provided at each intersection of the address electrode lines X1 to Xm, the scan electrode lines Y1 to Yn, and the high frequency electrode lines RF.
도 3는 도 2에 도시된 PDP를 ADS(Address and display Separation) 방법으로 구동하는 경우 임의의 서브필드동안 각 전극라인들에 공급되는 전압파형도를 나타낸 것이다. 도 3에서 주사 전극라인들(Y1∼Yn) 각각에는 라인순차적으로 주사신호(SP)가 공급됨과 아울러 이 주사펄스(SP)에 동기되어 어드레스 전극라인들(X1∼Xm)에는 데이터신호(DP)가 공급됨으로써 어드레스방전이 발생하게된다. 이러한 어드레스기간에 이어 주사 전극라인들(Y1∼Yn) 각각에는 라인순차적으로 프라이밍펄스(PP)를 공급하여 어드레스 방전이 발생된 방전셀들에 고주파방전에 이용될 하전입자들을 생성하기 위한 프라이밍 방전이 발생되게 한다. 이 프라이밍 방전에 의해 발생된 하전입자들은 고주파 전극라인들(RF)에 공통적으로 공급되는 고주파신호와 주사 전극라인들(Y1∼Yn)에 공급되는 고주파신호 센터전압(Vc)에 의해 고주파방전을 함으로써 원하는 밝기의 가시광이 방출되게 한다. 이러한 고주파방전기간에 이어 주사 전극라인들(Y1∼Yn) 각각에는 라인순차적으로 소거펄스(EP)를 인가하여 상기 고주파방전에 이용되는 하전입자들을 끌어당겨 소멸되게 함으로써 고주파방전이 소거되게 한다.FIG. 3 is a diagram illustrating voltage waveforms supplied to respective electrode lines during an arbitrary subfield when the PDP shown in FIG. 2 is driven by an address and display separation (ADS) method. In FIG. 3, the scan signal SP is supplied to each of the scan electrode lines Y1 to Yn in line order, and the data signal DP is supplied to the address electrode lines X1 to Xm in synchronization with the scan pulse SP. Is supplied to generate an address discharge. Following this address period, priming discharges for supplying priming pulses PP to each of the scan electrode lines Y1 to Yn in order to generate charged particles to be used for high frequency discharge in the discharge cells in which the address discharge is generated are provided. To be generated. The charged particles generated by the priming discharge are subjected to a high frequency discharge by a high frequency signal commonly supplied to the high frequency electrode lines RF and a high frequency signal center voltage Vc supplied to the scan electrode lines Y1 to Yn. Allow visible light of desired brightness to be emitted. Following the high frequency discharge period, erase pulses EP are sequentially applied to each of the scan electrode lines Y1 to Yn to attract and dissipate the charged particles used for the high frequency discharge, thereby erasing the high frequency discharge.
이러한 구동파형에서 고주파방전에 이용되어질 하전입자들을 생성하기 위한 프라이밍 펄스(PP)는 고주파방전이 용이하게 발생할 수 있도록 충분한 하전입자들을 생성해야만 한다. 그런데, 프라이밍 펄스(PP)의 폭이 길어지게 되면 하전입자가 벽전하로 쌓이게 되어 오히려 방전이 소거되는 문제점이 있다. 상세히 하면, 도 4에 도시된 바와 같은 프라이밍 펄스(PP)에 있어서, t1 기간(약 0.3∼0.7㎲)에서는 프라이밍 방전이 개시되어 하전입자들이 발생하는 반면에 t2 기간에서는 그 하전입자들이 벽전하로 쌓이면서 방전전압을 감소시키므로 방전이 소거되게 된다. 이와는 달리, 프라이밍 펄스(PP)의 폭이 1㎲이하로 짧은 경우 방전 딜레이가 불안정하게 되어 방전 실패가 발생하게 되는 문제점이 있다.In this drive waveform, the priming pulse PP for generating charged particles to be used for high frequency discharge must generate enough charged particles so that high frequency discharge can be easily generated. However, when the width of the priming pulse PP becomes longer, charged particles accumulate as wall charges, and thus there is a problem in that discharge is erased. In detail, in the priming pulse PP as shown in FIG. 4, priming discharge is initiated in the t1 period (about 0.3 to 0.7 mW) and charged particles are generated, whereas in the t2 period, the charged particles are converted into wall charges. As it accumulates, the discharge voltage is reduced, so that the discharge is erased. On the contrary, when the width of the priming pulse PP is shorter than 1 mW, the discharge delay may become unstable and a discharge failure may occur.
또한, 고주파 방전 소거시에는 고주파 방전이 유지될 수 없을 정도로 공간의 하전입자를 소거펄스(EP)에 의해 제거해야만 한다. 그런데, 도 5에 도시된 바와같은 소거펄스(EP)에 있어서, t1기간에서는 하전입자들이 소거전압(V1)에 의해 소멸되지만 시간이 경과함에 따라 공간전하가 벽전하로 쌓이게 된다. 이러한 벽전하에 의한 전압(Vw)이 상기 소거전압(V1)과 같아지는 t2기간에서는 소거전압(V1)이 벽전하 전압(Vw)에 의해 상쇄되게 된다. 이에 따라, 소거펄스(PP)의 폭을 아무리 증가하더라도 더이상의 방전소거는 이루어지지 않게 되므로 방전소거가 실패되는 문제점이 있다.In addition, during the high frequency discharge erasing, the charged particles in the space must be removed by the erasing pulse EP so that the high frequency discharge cannot be maintained. By the way, in the erasing pulse EP as shown in FIG. 5, in the t1 period, the charged particles are extinguished by the erasing voltage V1, but the space charges accumulate as wall charges as time passes. In the period t2 where the voltage Vw due to the wall charge becomes equal to the erase voltage V1, the erase voltage V1 is canceled by the wall charge voltage Vw. Accordingly, no matter how much the width of the erase pulse PP is increased, the discharge is no longer erased.
따라서, 본 발명의 목적은 프라이밍 방전 및 방전소거의 실패를 방지할 수 있는 고주파 PDP 구동방법을 제공하는 것이다.Accordingly, an object of the present invention is to provide a high frequency PDP driving method capable of preventing the failure of priming discharge and discharge erasure.
도 1은 종래의 고주파 플라즈마 디스플레이 패널에 구성되는 방전셀 구조를 나타내는 사시도.1 is a perspective view showing a discharge cell structure formed in a conventional high frequency plasma display panel.
도 2는 도 2에 도시된 방전셀을 구비하는 플라즈마 디스플레이 패널의 전체적인 전극 배치도.FIG. 2 is an overall electrode layout of the plasma display panel including the discharge cells shown in FIG.
도 3은 도 2에 도시된 플라즈마 디스플레이 패널의 구동파형도.3 is a driving waveform diagram of the plasma display panel shown in FIG. 2;
도 4는 도 3에 도시된 프라이밍 펄스의 동작구간을 구체적으로 나타낸 도면.4 is a view showing in detail the operation period of the priming pulse shown in FIG.
도 5는 도 3에 도시된 소거펄스의 동작구간을 구체적으로 나타낸 도면.5 is a view showing in detail the operation period of the erase pulse shown in FIG.
도 6은 본 발명의 실시예에 따른 플라즈마 디스플레이 패널의 구동방법에 적용되는 구동파형도.6 is a driving waveform diagram applied to a method of driving a plasma display panel according to an exemplary embodiment of the present invention.
도 7은 도 6에 도시된 프라이밍 펄스의 동작구간을 구체적으로 나타낸 도면.7 is a view showing in detail the operation period of the priming pulse shown in FIG.
도 8a 및 도 8b는 도 6에 도시된 소거펄스의 파형의 실시형태를 구체적으로 나타낸 도면.8A and 8B illustrate embodiments of the waveform of the erase pulse shown in FIG. 6 in detail.
<도면의 주요부분에 대한 부호의 간단한 설명><Brief description of symbols for the main parts of the drawings>
10 : 상부기판 12 : 고주파전극10: upper substrate 12: high frequency electrode
14 : 하부기판 16 : 데이터전극14: lower substrate 16: data electrode
18 : 유전층 20 : 주사전극18 dielectric layer 20 scanning electrode
24 : 격벽 26 : 형광체24: partition 26: phosphor
상기 목적을 달성하기 위하여, 본 발명에 따른 고주파 PDP 구동방법은 시간경과에 따라 증가하는 전압레벨을 가지는 소거전압 펄스를 이용하여 고주파 방전을 소거하는 단계를 포함하는 것을 특징으로 한다. 그리고, 본 발명에 따른 고주파 PDP 구동방법은 방전에 의해 생성된 하전입자들이 시간경과에 따라 벽전하로 축적되고, 그 벽전하에 의해 셀프-이레이징 방전을 일으키게끔 긴 펄스폭을 가지는 셀프-이레이징 펄스를 인가하여 상기 고주파방전에 이용될 하전입자들을 생성하는 프라이밍 방전 단계를 더 포함한다.In order to achieve the above object, the high frequency PDP driving method according to the present invention is characterized in that it comprises the step of erasing the high frequency discharge using an erase voltage pulse having a voltage level increasing with time. In the high frequency PDP driving method according to the present invention, the charged particles generated by the discharge accumulate as wall charges over time, and have a long pulse width to cause self-raising discharges by the wall charges. And a priming discharge step of applying charged pulses to generate charged particles to be used for the high frequency discharge.
상기 목적 외에 본 발명의 다른 목적 및 이점들은 첨부 도면을 참조한 본 발명의 바람직한 실시예에 대한 설명을 통하여 명백하게 드러나게 될 것이다.Other objects and advantages of the present invention in addition to the above object will become apparent from the description of the preferred embodiment of the present invention with reference to the accompanying drawings.
이하, 본 발명의 바람직한 실시 예를 도 6 내지 도 8b를 참조하여 상세히 설명하기로 한다.Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to FIGS. 6 to 8B.
도 6은 본 발명의 실시 예에 따른 고주파 PDP 구동방법을 설명하기 위한 구동파형을 나타내는 것이다. 도 6에서 주사 전극라인들(Y1∼Yn) 각각에는 라인순차적으로 주사신호(SP)가 공급됨과 아울러 이 주사펄스(SP)에 동기되어 어드레스 전극라인들(X1∼Xm)에는 데이터신호(DP)가 공급됨으로써 어드레스방전이 발생하게 된다. 이러한 어드레스기간에 이어 주사 전극라인들(Y1∼Yn)에 동시에 프라이밍 펄스, 즉 셀프-이레이징펄스(Self-erasing Pulse ;SEP)를 공급하여 어드레스 방전이 발생된 방전셀들에 고주파방전에 이용될 하전입자들을 생성하기 위한 프라이밍 방전이 발생되게 한다. 이 경우, 셀프-이레이징 펄스(SEP)는 도 7에 도시된 바와 같이 벽전하에 의해 셀프-이레이징 방전이 발생될 수 있게끔 종래의 프라이밍펄스(PP)에 비하여 상대적으로 긴 펄스 폭을 가지게 된다. 이러한 셀프-이레이징 펄스(SEP)에 있어서, 상승에지에서 방전이 개시되어 하전입자들이 생성되고 시간이 경과함에 따라 하전입자들은 계속 벽전하로 쌓이게 된다. 이어서, 상기 셀프-이레이징 펄스(SEP)의 하강에지에서 상기 벽전하에 의한 셀프-이레이징 방전이 발생하게 되는데 이 경우 하강시간이 매우 짧기 때문에 벽전하는 거의 없고 대부분의 공간에 하전입자들이 생성되게 된다. 이 프라이밍 기간에 의해 발생된 하전입자들은 고주파 전극라인들(RF)에 공통적으로 공급되는 고주파신호와 주사 전극라인들(Y1∼Yn)에 공급되는 고주파신호 센터전압(Vc)에 의해 고주파방전을 함으로써 원하는 밝기의 가시광이 방출되게 한다. 이러한 고주파방전기간에 이어 주사 전극라인들(Y1∼Yn)에 동시에 소거펄스(EP)를 인가하여 상기 고주파방전에 이용되는 하전입자들을 끌어당겨 소멸되게 함으로써 고주파방전이 소거되게 한다. 이 경우, 소거펄스(EP)는 도 8a에 도시된 바와 같이 계단 형태로 인가하거나, 도 8b에 도시된 바와 같이 양의 기울기를 가지는 선형 전압 형태로 인가하게 된다. 도 8a에 도시된 바와 같이 소거펄스(EP)를 계단형태로 인가하는 경우 t1 구간에서는 제1 전압(V1)을 인가하고 t2구간에서는 상대적으로 높은 제2 전압(V2)을 인가함으로써 벽전하에 의해 감소되는 전압을 보상하고 처음에 너무 큰 전압을 인가할 때 발생하는 오방전을 방지할 수 있게 된다. 도 8b에 도시된 바와 같이 소거펄스(EP)를 양의 기울기를 가지는 선형 전압 형태로 인가하는 경우 역시 벽전하에 의해 감소되는 전압을 보상함과 아울러 처음에 너무 큰 전압을 인가할 때 발생하는 오방전을 방지할 수 있게 된다.6 illustrates a driving waveform for explaining a high frequency PDP driving method according to an embodiment of the present invention. In FIG. 6, the scan signals SP are sequentially supplied to each of the scan electrode lines Y1 to Yn, and the data signal DP is supplied to the address electrode lines X1 to Xm in synchronization with the scan pulse SP. Is supplied to generate an address discharge. Following this address period, priming pulses, that is, self-erasing pulses (SEP), are simultaneously supplied to the scan electrode lines Y1 to Yn to be used for high frequency discharge to discharge cells in which the address discharge is generated. A priming discharge is generated to generate charged particles. In this case, the self-aging pulse SEP has a relatively long pulse width compared to the conventional priming pulse PP so that self-aging discharge can be generated by wall charge as shown in FIG. 7. . In this self-aging pulse (SEP), discharge is initiated at the rising edge so that charged particles are generated and charged particles continue to accumulate as wall charges over time. Subsequently, self-raising discharge caused by the wall charge occurs at the falling edge of the self-raising pulse SEP. In this case, since the fall time is very short, there is almost no wall charge and charged particles are generated in most spaces. do. The charged particles generated by this priming period are subjected to a high frequency discharge by a high frequency signal commonly supplied to the high frequency electrode lines RF and a high frequency signal center voltage Vc supplied to the scan electrode lines Y1 to Yn. Allow visible light of desired brightness to be emitted. After the high frequency discharge period, the erase pulse EP is simultaneously applied to the scan electrode lines Y1 to Yn to attract and dissipate the charged particles used for the high frequency discharge, thereby erasing the high frequency discharge. In this case, the erasing pulse EP is applied in the form of a step as shown in FIG. 8A or in the form of a linear voltage having a positive slope as shown in FIG. 8B. As shown in FIG. 8A, when the erasing pulse EP is applied in the form of a step, the first voltage V1 is applied in the t1 section and the second voltage V2 is relatively high in the t2 section. It is possible to compensate for the reduced voltage and to prevent erroneous discharges occurring when an excessively large voltage is initially applied. As shown in FIG. 8B, when the erasing pulse EP is applied in the form of a linear voltage having a positive slope, an error generated when an excessively large voltage is initially applied while compensating for the voltage reduced by the wall charge. Discharge can be prevented.
상술한 바와 같이, 본 발명에 따른 고주파 PDP 구동방법에 의하면 프라이밍 펄스로 상대적으로 긴 펄스폭을 가지는 셀프-이레이징 펄스를 인가하여 충분한 하전입자를 공급할 수 있게 된다. 또한, 본 발명에 따른 고주파 PDP 구동방법에 의하면 소거펄스를 계단형태 또는 양의 기울기를 가지는 선형형태로 인가하여 고주파방전을 확실하게 소거시킬 수 있게 된다.As described above, according to the high frequency PDP driving method according to the present invention, it is possible to supply sufficient charged particles by applying a self-aging pulse having a relatively long pulse width as a priming pulse. Further, according to the high frequency PDP driving method according to the present invention, it is possible to reliably erase the high frequency discharge by applying the erase pulse in the form of a step or a linear shape having a positive slope.
이상 설명한 내용을 통해 당업자라면 본 발명의 기술사상을 일탈하지 아니하는 범위에서 다양한 변경 및 수정이 가능함을 알 수 있을 것이다. 따라서, 본 발명의 기술적 범위는 명세서의 상세한 설명에 기재된 내용으로 한정되는 것이 아니라 특허 청구의 범위에 의해 정하여져야만 할 것이다.Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.
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