KR20010037322A - A method of forming a trench isolation in a semiconductor device - Google Patents

Abstract

PURPOSE: A method for forming a trench isolation of a semiconductor device is provided to prevent a recess or dent of a liner nitride layer formed in a trench for anti-oxidation. CONSTITUTION: In the method, a pad oxide layer(120b), a mask nitride layer(140b) and a mask oxide layer overlying thereon are formed in sequence on a semiconductor substrate(100) and then etched with a part of the substrate(100) to form a trench. After a thermal oxide layer(200a) is formed in the trench, the liner nitride layer(220a) is formed thereon. The trench is then half filled with the first insulating layer(240b). Thereafter, the mask nitride layer(140b) and the liner nitride layer(220a) are separated from each other by a selective strip process with phosphoric acid. The trench is then fully filled with the second insulating layer(260a). Next, the second insulating layer(260a) is planarized until the mask nitride layer(140b) is exposed, and then the mask nitride layer(140b) is removed.

Description

A method of forming trench isolation in semiconductor devices {A METHOD OF FORMING A TRENCH ISOLATION IN A SEMICONDUCTOR DEVICE}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a trench isolation formation method for improving the insulation characteristics of trench isolation by preventing dent phenomenon of the liner nitride film in the trench.

Techniques for isolation of devices formed on semiconductor substrates have a close relationship with transistor characteristics and device reliability, which are the basis of device configuration. Therefore, the necessity of effective device isolation technology is growing in importance with the development of devices. Inadequate device isolation can result in leakage currents, which are manifested in massive loss of power to the semiconductor chip. It also raises latch-up, causing temporary or permanent damage to semiconductor functions. Furthermore, this leads to degradation of the noise margin, voltage shift, or crosstalk.

As a method of isolating the device region of the semiconductor substrate, a conventional method of local oxidation of silicon (hereinafter referred to as "LOCOS") has been used. A typical LOCOS structure uses a patterned silicon nitride film and a pad oxide film (used to relieve stress caused by the silicon nitride film) to mask the active region at the bottom to implant ions into the isolation region and then to a thick field oxide film. Implemented by locally forming

In the above-described LOCOS structure, some fundamental problems occur according to the implementation process. That is, the oxidation of the silicon under the silicon nitride mask in the lateral direction causes the edge portion of the field oxide film to have a bird beak shape (so-called bird's beak), and the side diffusion of channel stop dopants is Dopants can erode the active device regions, resulting in the formation of a physical channel narrower than a predetermined channel width. The reduced channel portion due to the two problems makes the situation even more difficult when manufacturing a highly integrated semiconductor (VLSI). That is, it increases the threshold voltage and reduces the current driving capability. As the LOCOS method described above causes various disadvantages, a method of separating devices using shallow trenches has been developed. So-called shallow trench isolation (hereinafter referred to as "STI") methods are widely used. The isolation of the device by this STI method is generally as follows. Etching the semiconductor substrate using the nitride film mask to form a trench; Filling the trench with a CVD film, which is a device isolation film; Planarization etching the CVD film; And stripping the nitride mask.

However, in this STI method, stress due to an element isolation material filled in the trench is applied to the trench inner wall. This stress creates shallow pit in the trench sidewalls or active region, resulting in increased leakage current in the active region of the semiconductor substrate, which degrades the isolation characteristics of the trench isolation. As is well known, the stress is caused by a heat budget by CVD film deposition or its annealing process, or by volume expansion due to diffusion of oxygen in subsequent oxidation processes.

As a solution to this, a process of forming a nitride film as an oxygen diffusion barrier film between the trench sidewall oxide film and the trench insulating material film to prevent an increase in stress caused by a subsequent oxidation process has been widely used.

However, the introduction of such an antioxidant nitride film solves the stress problem but causes a new problem as shown in FIG. 1. In other words, when using the anti-oxidation liner nitride film, the final device isolation profile, as indicated by reference numeral 18, causes a dent (hereinafter referred to as a dent) along the active region and the device isolation boundary. The reason for the occurrence of such dents is that the film used as the trench etching mask and the antioxidant trench liner are made of a nitride film having the same film quality. Next, after the planarization process for the trench insulating material, the thickness distribution of the remaining nitride film due to the uniformity defect occurs.

In other words, the strip process for removing the mask nitride after chemical mechanical polishing (CMP) of the trench insulating material requires sufficient overetching due to poor uniformity, which results in a liner connected to the mask nitride where the remaining thickness of the nitride is lower. The nitride film is removed along the trench sidewalls to expose the sidewall oxide film, which is then consumed in subsequent wet cleaning processes to form dents.

This dent generation directly affects device characteristics such as a gate threshold voltage drop and a gate oxide film deterioration.

Therefore, there is an urgent need for a new method of improving the insulating properties of trench isolation, which prevents the oxidation nitride film in the trench from being recessed and improves the stress properties.

SUMMARY OF THE INVENTION The present invention has been proposed to solve the above-mentioned problems, and an object thereof is to provide a trench isolation formation method for preventing an oxidation-resistant nitride film in a trench from being recessed.

1 is a cross-sectional view schematically showing the dent phenomenon of the trench liner nitride film generated in the trench isolation formation method according to the conventional invention; And,

2A-2I are flow diagrams showing in sequence the processes of a trench isolation formation method in accordance with a preferred embodiment of the present invention.

* Explanation of symbols for the main parts of the drawings

100 semiconductor substrate 120 pad oxide film

140: mask nitride film 160: mask oxide film

180: trench 200: thermal oxide film

220: liner nitride film 240: first trench filling insulating film

260: second trench filling insulating film

(Configuration)

According to the present invention for achieving the above object, the shallow trench isolation process for device isolation of the semiconductor device comprises the steps of forming a trench by etching the pad oxide film, the trench mask nitride film and the semiconductor substrate formed on the semiconductor substrate, Forming a trench liner nitride film on both sidewalls and bottoms of the trench, forming a first trench filling insulating film to partially fill the trench, and performing a selective phosphoric acid strip process on the nitride film to form the trench mask Separating the nitride film and the trench liner nitride film, forming a second trench filling insulating film to completely fill the trench, and planarizing until the top of the trench mask nitride film appears, and removing the trench mask nitride film Consists of including It is characterized by.

In an embodiment of the present disclosure, the forming of the first trench filling insulating film to partially fill the trench may include forming the first trench filling insulating film on the trench liner nitride layer and the first trench filling. Partially removing the first trench filling insulation layer such that an upper portion of the insulating layer is higher than an upper portion of the semiconductor substrate, wherein the first trench filling insulation layer is about 200 Angstroms to 400 Angstroms higher than the semiconductor substrate. It is characterized by.

In an embodiment of the present invention, the selective phosphate strip process for the nitride film may include etching the trench liner and trench mask nitride film formed along a sidewall at least at an upper edge of the first trench peeling insulating film to form the thermal oxide film and the pad oxide film. And forming a recess to expose the trench liner, thereby separating the trench liner nitride layer and the trench mask nitride layer, wherein an upper portion of the etched trench liner nitride layer has at least the same height as an upper portion of the semiconductor substrate.

(Action)

According to the trench isolation forming method of the present invention as described above, the trench filling step consists of depositing a first insulating film, removing a portion of the first insulating film and depositing a second insulating film, and selectively removing a nitride film before depositing the second insulating film. This proceeds to separate the trench mask nitride film and the liner nitride film. That is, since the trench mask nitride film and the trench liner nitride film are separated from each other in the trench filling step, the trench line nitride film may be prevented from denting when the subsequent trench mask nitride film is removed.

(Example)

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to FIGS. 2A to 2I. Referring to FIG. 2A, in the trench isolation formation method according to the exemplary embodiment of the present invention, a pad oxide film 120, a mask nitride film 140, and a mask oxide film 160 are sequentially formed on a semiconductor substrate 1000. The pad oxide layer 120 is formed to have a thickness of about 110 Angstroms, and the mask nitride layer 140 is formed to have a thickness of about 1,000 Angstroms to 1,500 Angstroms. The mask nitride layer 140 may be formed of a silicon nitride layer (Si ₃ N ₄ ), a silicon oxynitride layer (SiO _X N _Y : X and Y are natural numbers). The mask oxide layer 160 is a high temperature oxide (HTO) and is formed to have a thickness of about 1,000 Angstroms.

Then, a trench mask 170 in which the mask oxide layer 160, the mask nitride layer 140, and the pad oxide layer 120 are etched to define a trench region is formed by a photolithography process well known in the art. Is formed. Next, the semiconductor substrate 100 is etched using the trench mask 170 to form the trench 180 as shown in FIG. 2B. At this time, the semiconductor substrates on both sides of the trench become active regions. The trench 180 is formed to have a depth within a range of about 2,300 Angstroms to 2,700 Angstroms.

Next, as shown in FIG. 2C, the thermal oxide film 200 is thermally etched by the thermal oxidation process to remove damage generated in the etching process of the semiconductor substrate 100 for forming the trench 180. It is formed on the bottom and both side walls of the. The thermal oxide film 200 is formed to have a thickness of about 110 Angstroms, for example, as a silicon oxide film. Next, a trench liner nitride layer 220 is formed on the thermal oxide layer 200 including the trench mask 170 to prevent crystal defects caused by stress. The trench liner nitride film 220 may be formed of, for example, a silicon nitride film or a silicon oxynitride film. The trench liner nitride film 220 prevents oxidation of the inner wall of the trench 180, thereby functioning as a buffer layer to buffer stress applied to the inner wall of the trench 180 in a subsequent oxidation process.

The next process is the process of filling the trench 180 with an insulating film for device isolation, as shown schematically in FIGS. 2D-2G. According to the present invention, the trench 180 proceeds with an insulating film deposition process in two steps, and an etching process for separating the trench mask nitride film 140a and the trench liner nitride film 220 proceeds between the two deposition processes. do.

It looks at in detail below. First, a first trench filling layer having good filling characteristics is deposited on the trench liner 220 and partially etched so that the etched top is slightly above the top of the semiconductor substrate as shown in FIG. 2D. The trench filling film 240a is formed. Preferably from about 200 angstrom to 400 angstrom high. For example, a high density plasma oxide (HDP oxide), an undoped silicate glass (USG), or the like is deposited as the first trench filling layer.

Next, a selective removal process for the nitride film for separating the trench mask nitride film 140a and the trench liner nitride film 220 is performed. This is to prevent phosphoric acid from penetrating and etching along the trench liner nitride film 220 connected to the mask nitride film 140a during the subsequent trench mask nitride film 140a phosphate strip process. In the separation process, the etching amount is determined so that the two nitride layers can be completely separated by wet etching using phosphoric acid. As shown in the circle indicated by reference numeral 250 of FIG. 2E, the two nitride layers are selectively removed to form an active region. A recess region is formed at the boundary with the trench, and the mask nitride film 140b and the liner nitride film 220a are separated from each other.

As shown, the trench mask 140a is etched in the direction of the active region by the wet etching of the nitride layer, and the liner nitride layer 220 is etched downward along the sidewall of the first trench filling layer 240a. The nitride film is separated. Since the first trench filling film 240a is formed higher than the active region (about 200 angstroms to 400 angstroms as described above), the etching margin in the downward direction with respect to the trench liner nitride film 220 is increased. The upper portion of the etched trench liner nitride layer 220a is at least the height of the active region.

The recess portion may be filled with a subsequent second trench filling layer, and the phosphoric acid, which is an etching solution, may be penetrated during the subsequent stripping process of the nitride layer 140b along with the pad oxide layer 120a and the thermal oxide layer 200 exposed by the recess. To prevent them.

The next process is an optional process, in which the recesses formed in the trench sidewalls may be expanded through a wet process on the oxide layer prior to depositing the second trench fill layer (FIG. 2F). This is to prevent voids from occurring along the recess when the second trench fill layer is deposited. However, if there is no problem of void generation, the wet process may not proceed.

Referring to FIG. 2G, a second trench filling film for planarization is formed on the structure shown in FIG. 2F. Then, a planarized second trench peeling layer 260a is formed through a chemical mechanical polishing (CMP) process until the upper portion of the mask nitride layer 140a appears, as shown in FIG. 2G. The second trench filling film 260a is formed of an oxide film, and preferably, the second trench filling film 260a is formed of the same film as the first trench filling film.

FIG. 2H is a vertical cross-sectional view of a semiconductor substrate in a state in which a predetermined amount of the trench filling film 260b is etched through a wet etching process and a phosphate strip process for removing the mask nitride film 140b is performed. . The wet etching of the trench filling layer 260a is determined in consideration of the total etching amount of the oxide film consumed by various wet processes formed after the strip process for the trench mask nitride layer 140b and before the gate poly deposition. As illustrated, the trench fill layer 260a surrounds the trench liner nitride layer 220a, so that the trench liner nitride layer 220a is not consumed by the mask nitride layer 140b stripping process.

FIG. 2I is a vertical cross-sectional view of the semiconductor substrate in a state in which a subsequent process is performed after the strip process and before the gate poly deposition is performed on the mask nitride layer 140b. There is no exposure of the trench sidewall oxide film (thermal oxide film) due to the consumption of the liner nitride film 220a, and thus, no dent occurs due to the consumption of the trench sidewall oxide film in various wet processes until the gate poly deposition.

Subsequent processes include conventional gate oxide film growth and gate poly deposition processes.

Although the present invention has been described with reference to preferred embodiments, the scope of the present invention is not limited thereto. Rather, various modifications and similar arrangements are included. Therefore, the true scope and spirit of the claims of the present invention should be interpreted broadly to encompass such modifications and similar arrangements.

The present invention relates to trench formation for device isolation of a semiconductor device, wherein the trench filling step consists of depositing a first insulating film, removing a portion of the first insulating film, and depositing a second insulating film. Since the removal process proceeds to separate the trench mask nitride film and the liner nitride film, it is possible to prevent the trench liner nitride film from denting during the subsequent trench mask nitride film removal.

Claims (3)

In a shallow trench isolation process for device isolation of semiconductor devices, Etching the pad oxide film, the trench mask nitride film and the semiconductor substrate formed on the semiconductor substrate to form a trench; Forming a trench liner nitride film on both sidewalls and bottoms of the trench; Forming a first trench filling insulating film to partially fill the trench; Performing a selective phosphate strip process on the nitride film to separate the trench mask nitride film and the trench liner nitride film; Forming a second trench filling insulating film to completely fill the trench and planarizing until an upper portion of the trench mask nitride film appears; And Removing the trench mask nitride film. The method of claim 1, The step of forming the first trench filling insulating film to partially fill the trench, Forming the first trench filling insulating film on the trench liner nitride film; And Partially removing the first trench filling insulation layer such that an upper portion of the first trench filling insulation layer is higher than an upper portion of the semiconductor substrate; And the first trench filling insulating film is about 200 angstroms to 400 angstroms higher than the semiconductor substrate. The method of claim 1, An optional phosphate strip process for the nitride film may form a recess that exposes the thermal oxide film and the pad oxide film by etching the trench liner and trench mask nitride film formed along a sidewall at least at the upper edge of the first trench filling insulating film. Therefore, the trench liner nitride layer and the trench mask nitride layer are separated, and the upper portion of the etched trench liner nitride layer has at least the same height as the upper portion of the semiconductor substrate.