KR20010017024A - Chip scale type semiconductor package - Google Patents

Abstract

PURPOSE: A chip scale semiconductor package is provided to maximize supporting stability of solder balls and to minimize the semiconductor package in size, by forming a slim-type structure in a fan-out type semiconductor package. CONSTITUTION: A semiconductor chip has a plurality of bonding pads that are disposed along the center of a surface and separated by a constant interval. A pair of stress mitigating films is divided into right and left parts with reference to the bonding pads, of which one surface is settled on the semiconductor chip and the other surface is extended to the outside of the chip. A pair of adhesive tapes are settled on the surface of each stress mitigating film, and a plurality of solder ball windows are disposed in the respective surfaces. The adhesive tapes are divided into right and left parts with reference to the bonding pads, of which one surface corresponds to the surface of the chip and the other surface is extended to the outside of the chip. Beam leads are intervened between the stress mitigating films and polyimide tapes, wherein one end portion of the beam leads is exposed to the surface of the polyimide tapes through the solder ball windows and the other end portion is exposed to a side of the polyimide film to be electrically connected to the bonding pads. A plurality of solder balls is settled on the solder ball windows. A pair of supporting films is installed on both sides of the semiconductor chip.

Description

Chip scale type semiconductor package

The present invention relates to a semiconductor package, for example, a chip scale semiconductor package, and more particularly, a slim structure that can replace a conventional thermal spreader is newly placed in the structure of a pen-out type semiconductor package, and thus, solder balls The present invention relates to a chip scale semiconductor package capable of achieving "support stability of solder balls" and "minimizing the size of a semiconductor package" by maximizing their support stability.

In recent years, as the memory capacity of electronic and information devices has increased, semiconductor chips such as DRAM and SRAM have been increasingly integrated, and accordingly, the size of semiconductor chips has also increased.

However, in contrast to the increase in size of such semiconductor chips, packaging technologies for packaging semiconductor chips are moving toward the direction of making the size of the final semiconductor chip package light and small in accordance with the trend of miniaturization and light weight of electronic and information devices.

In recent years, with the rapid development of semiconductor chip packaging technology, surface-mount semiconductor packages such as BGA type semiconductor packages have been developed that can accommodate semiconductor chips of larger sizes while minimizing their size. In addition, as the technology continues to develop, chip-scale semiconductor packages such as FBGA type semiconductor packages and μBGA type semiconductor packages are being developed in which the size of the semiconductor package approaches 120% of the semiconductor chip size.

Various structures of such conventional chip scale semiconductor packages are described, for example, in US Pat. No. 56,63593, "Ball grid array package with lead frame," US Pat. No. 5,706,178, "Pads of the package." Ball grid array integrated circuit package that has vias located within the solder pads of a package ", US Patent No. 5708567" Ball Grid with Ring Type Heat Sink " Ball grid array semiconductor package with ring-type heat sink ", US Patent No. 5729050" Semiconductor package substrate and ball grid array semiconductor package using same " , US Patent No. 5741729 "Ball grid array package for an integr ated circuit ", US Pat. No. 5748450," BGA package using a dummy ball and a repairing method, "US Pat. No. 5796170," Ball grid array integrated circuit. " Packages (Ball grid array integrated circuit packages) ".

Among these various types of chip scale semiconductor packages, the μBGA type semiconductor package is largely classified into a fan-in type and a fan-out type.

In general, a pen-in type μBGA semiconductor package has a structure in which an adhesive tape formed on an upper portion of a semiconductor chip maintains a size smaller than that of the semiconductor chip and all solder balls are disposed on the upper portion of the semiconductor chip. In contrast, the pen-out type μBGA semiconductor package has a structure in which an adhesive tape formed on an upper portion of the semiconductor chip maintains a larger size than that of the semiconductor chip, and a portion of the solder balls is disposed in a region deviated from the surface of the semiconductor chip.

At this time, as described above, all the solder balls disposed in the pen-in type μBGA semiconductor package are disposed on top of the semiconductor chip to be stably supported, but do not cause any problems, but solder balls disposed in the pen-out type μBGA semiconductor package Some of them are disposed in regions deviated from the surface of the semiconductor chip, and thus have no support base, thereby causing a problem of mechanically very unstable structure.

In order to solve this problem in a conventional production line, for example, as described in "TechSearch International, Inc / March 1997 issue / page 97", the structure of the package with a thermal spreader (cavity) is formed It arrange | positions inside and uses the thermal spreader, and actively adopts the method of supporting the solder balls arrange | positioned away from the surface of a semiconductor chip.

However, there are some significant problems in operating such conventional chip scale semiconductor packages, such as μBGA semiconductor packages. This is described as follows.

As described above, the conventional pen-out type μBGA semiconductor package has a problem in that some of the solder balls are disposed away from the surface of the semiconductor chip and thus do not have a special support base. In order to provide a thermal spreader having a cavity, the thermal spreader is used to support solder balls located in an area deviated from the surface of the semiconductor chip, thereby maintaining stability as if the solder balls were supported by the semiconductor chip. To induce.

However, in the case of using the thermal spreader in the construction of the pen-out type μBGA semiconductor package, the production line must bear the problem that the size of the entire semiconductor package is greatly increased by the area occupied by the thermal spreader.

In this case, since the size of the entire semiconductor package is greatly increased, there is another problem in the production line, in which the finished semiconductor package cannot be flexibly responded to the thin and light reduction of the recently required semiconductor package.

In addition, since the thermal spreader described above is very expensive, when the thermal spreader is added to the structure of the final semiconductor package, the assembly cost of the semiconductor package is greatly increased, resulting in a significant decrease in overall product production efficiency. Is caused.

Accordingly, an object of the present invention is to newly place a slim type structure that can replace a conventional thermal spreader in the structure of a pen-out type semiconductor package, thereby increasing the size of the semiconductor package while maximizing the support stability of the solder balls. To minimize.

Another object of the present invention is to improve the overall product production efficiency by suppressing an increase in the cost of assembling a semiconductor package by the addition of a thermal spreader.

Still other objects of the present invention will become more apparent from the following detailed description and the accompanying drawings.

1 is an exemplary view showing a chip scale semiconductor package according to an embodiment of the present invention.

2 is a cross-sectional view of FIG.

3 is an exemplary view showing a chip scale semiconductor package according to another embodiment of the present invention.

4 is a cross-sectional view of FIG.

The present invention for achieving the above object is a semiconductor chip having a plurality of bonding pads arranged along the center of the surface at a predetermined interval spaced apart from the left and right relative to the bonding pads, the surface of the semiconductor chip A pair of stress-relaxing films having some surfaces seated on the surface of the semiconductor chip, and a portion of the surface of each of the stress-releasing films, and a plurality of solder ball windows are arranged on each surface. A pair of adhesive tapes, stress relief films, and polyimide tapes, which are separated from side to side with respect to the bonding pads, and whose surface is positioned to correspond to the surface of the semiconductor chip, and the other surface extends to the outside of the semiconductor chip. Interposed between, one end exposed through the solder ball windows to the surface of each polyimide tape, the other end being polyimide films Is exposed to the side portion includes a plurality of solder balls are mounted on the bonding pads and beam leads and electrically, the beam lead and the solder balls electrically coupled to the window in contact with.

In this case, a pair of support films are formed at both sides of the semiconductor chip to support other surface of the stress relaxation films extending to the outside of the semiconductor chip.

Since these supporting films have a much smaller size than the conventional thermal spreader described above, in the production line of the present invention, the solder balls positioned in the area deviated from the surface of the semiconductor chip are as if they were supported by the semiconductor chip. While being able to stably support, it is possible to obtain an advantage of greatly reducing the size of the overall semiconductor package.

Hereinafter, a chip scale semiconductor package according to the present invention will be described in detail with reference to the accompanying drawings.

As shown in FIG. 1, a chip scale semiconductor package according to an embodiment of the present invention, as a whole, includes a semiconductor chip 1 and a pair of adhesive tapes disposed separately on the semiconductor chip 1. 13), a combination of a plurality of solder balls 15 arranged on the adhesive tapes 13. In this case, the adhesive tapes 13 have a polyimide material, for example.

In this case, a plurality of bonding pads 2 are arranged on the surface of the semiconductor chip 1 along a center at a predetermined interval, and the bonding pads 2 may be formed by beam leads 12 and will be described later. Electrically connected to form a series of conductive paths with an external circuit block, such as a printed circuit board (not shown), so that an electrical signal output from the printed circuit board can be quickly input to the semiconductor chip 1, or On the contrary, the electric signal output from the semiconductor chip 1 can be quickly input to the printed circuit board.

Here, as shown in the figure, between the adhesive tapes 13 and the semiconductor chip 1 is a pair of so-called stress relief films 11, called "elastomer" is interposed, such stress relief films ( 11) buffers the external shock transmitted to the semiconductor chip 1, thereby preventing the semiconductor chip 1 from being damaged by external force.

In this case, beam leads 12 extending to the outside of the adhesive tape 13 are disposed on the surface of the adhesive tape 13 corresponding to the point where the solder balls 15 are attached. The beam leads 12 form a structure in which the beam leads 12 are electrically connected to the bonding pads 2 continuously arranged along the center of the semiconductor chip 1. In this state, when an external printed circuit board is mounted on top of the semiconductor chip 1, the semiconductor chip 1 and the printed circuit board connect the series of electric conduction paths through the beam leads 12. Form.

Here, for example, a plurality of solder ball windows 14 having a circular shape is formed on the surface of the adhesive tape 13, and the solder ball windows 14 may define a region in which the solder balls 15 may be seated in advance. In addition, by opening the surface of the adhesive tape 13 to a predetermined size, the beam leads 12 embedded in the bottom of the adhesive tape 13 can be more stably contacted with the solder balls 15. Act as a guide.

In this case, as shown in FIG. 2, the above-described stress relaxation films 11 are separated from side to side based on the bonding pads 2 arranged along the center of the semiconductor chip 1, and a part of the surface is semiconductor. It is seated on the surface of the chip 1, and the other side surface has a structure extending to the outside of the semiconductor chip (1).

The adhesive tapes 13 disposed on the stress relief films 11 are also separated from side to side based on the above-described bonding pads 2, and some surfaces thereof are seated on the surface of the semiconductor chip 1. Some other surfaces form a structure extending outwardly of the semiconductor chip 1.

In this case, the adhesive tapes 13 generally have a size larger than that of the semiconductor chip 1 disposed at the bottom thereof, thereby forming a pen-out type semiconductor package, and the upper portion of the adhesive tapes 13. Some of the solder balls 15 arranged at the upper portion of the solder balls 15 form a structure disposed in a region separated from the surface of the semiconductor chip 1.

At this time, as shown in the figure, an encapsulant 3 for protecting the bonding pad region from external impact is disposed at a portion where the beam leads 12 are in contact with the bonding pads 2.

When the adhesive tapes 13 of the present invention have the above-described structure, in the production line, some of the solder balls 15 disposed on the adhesive tapes 13 are not taken, unless special measures are taken on the structure of the semiconductor package. Is disposed in a region deviated from the surface of the semiconductor chip 1, and thus does not have a support base, resulting in a very unstable structure mechanically.

In the related art, in order to solve this problem, for example, a method is provided in which a thermal spreader having a cavity of a predetermined size is formed, and using the thermal spreader to support solder balls arranged away from the surface of the semiconductor chip.

However, when applying the conventional method to the support of the solder balls, the production line had to bear the problem that the size of the entire semiconductor package is greatly increased by the occupied area of the thermal spreader. Due to the significant increase in size, the production line also had to suffer from the problem that the finished semiconductor package could not flexibly cope with the recently required thin and short reduction.

However, in the case of the present invention, unlike this conventional case, only a pair of supporting the partial surface of the stress relaxation films 11 extending to the outside of the semiconductor chip 1 on both sides of the semiconductor chip 1 By arranging the support films 20, the support stability of the solder balls 15 may be secured. In this case, as shown in the drawing, between the stress relief films 11 and the support films 20, the attach for stably adhering the support films 20 to the bottom of the stress relief films 11 The films 21 are interposed.

The support films 20 have a very simple configuration compared to the conventional thermal spreader, and have a slim structure as a whole.

In this case, the stress relaxation films 11 and the adhesive films 13 forming the support base of the solder balls 15 located in the region deviated from the surface of the semiconductor chip 1 are stable by the support films 20. Since it is supported, the solder balls 13 based on the stress relaxation films 11 and the adhesive films 13 can also maintain a stable support state as if supported by a semiconductor chip.

Of course, as described above, since the support films 20 of the present invention have a very simple structure compared to a conventional thermal spreader and have a slim size, in the production line, the size of the overall semiconductor package is determined in the production line. The advantage that can greatly reduce can be obtained.

In this case, the size of the entire semiconductor package can be significantly reduced in the production line as compared with the conventional one, so that the finally completed semiconductor package can be flexibly responded to the recently required light and thin reduction.

As described above, since the support films 20 of the present invention maintain a very simple structure compared to the above-described thermal spreader, the semiconductor package structure of the present invention can be implemented at a low cost in a production line. By assembling cost can be significantly reduced than in the conventional case, the overall product production efficiency can be significantly improved.

At this time, the support films 20 of the present invention, for example, has a material such as ceramic, silicon, metal.

On the other hand, as shown in Figure 3, the chip-scale semiconductor package according to another embodiment of the present invention as a whole, the semiconductor chip 1, a plurality of adhesive tapes disposed separately on the upper portion of the semiconductor chip 1 Field 13, a combination of a plurality of solder balls 15 arranged on the adhesive tapes 13.

At this time, unlike the above-described embodiment, the surface of the semiconductor chip 1 is provided with a plurality of bonding pads 2 arranged along the edge of the semiconductor chip 1 at a predetermined interval.

In accordance with the structure change of the bonding pads 2, in another embodiment of the present invention, the structures of the stress relaxation films 11 and the adhesive tapes 13 are changed.

In this case, as shown in Figure 4, the stress relaxation films 11 according to another embodiment of the present invention is separated into a plurality of based on the above-described bonding pads (2), and some surfaces of the semiconductor chip ( It is seated on the surface of 1) and the other part forms a structure separated from the surface of the semiconductor chip 1.

The adhesive tapes 13 according to another embodiment of the present invention also have a structure similar to that of the above-described stress relaxation films 11, and the bonding pads described above are mounted on the surfaces of the stress relaxation films 11. In addition to being separated into a plurality of reference to the field (2), some surfaces are positioned to correspond to the surface of the semiconductor chip 1, and the other some surface is separated from the surface of the semiconductor chip (1).

Even in the case of another embodiment of the present invention, the adhesive tapes 13 are generally larger than the semiconductor chips 1 disposed on their bottoms to form a pen-out type semiconductor package. Some of the solder balls 15 disposed on the tapes 13 form a structure disposed in a region separated from the surface of the semiconductor chip 1.

Of course, even in this case, in the production line, if no action is taken on the structure of the semiconductor package, some of the solder balls 15 arranged on the adhesive tapes 13 are separated from the surface of the semiconductor chip 1. Placed in the area, they do not have a special support base, resulting in a very unstable structure mechanically.

In another embodiment of the present invention, in consideration of such a problem in advance, as in the case of the above-described embodiment, the stress relief films 11 separated from the surface of the semiconductor chip 1, on both sides of the semiconductor chip 1 A plurality of support films 30 are formed to support the other part surface. Even in this embodiment of the present invention, the attachment between the stress relief films 11 and the support films 20 for attaching the support films 20 to the bottom of the stress relief films 11 stably The films 31 are interposed.

Of course, these support films 30 have a very simple configuration compared to the conventional thermal spreader, and has a slim structure as a whole.

When this embodiment of the present invention is carried out, the stress relief films 11 and the adhesive films 13 forming the support base of the solder balls 15 located in a region deviated from the surface of the semiconductor chip 1 are supported. Since the film 30 is stably supported, the solder balls 15 on which the stress relaxation films 11 and the adhesive films 13 are supported are also supported by the semiconductor chip 1. It can maintain a stable support state such as.

When this embodiment of the present invention is applied, since the support films 30 for supporting the solder balls 15 may have a very simple structure compared to the conventional thermal spreader, the production line may reduce the overall size of the semiconductor package. The advantage that can greatly reduce can be obtained. In this case, in the production line, the finished semiconductor package can be flexibly responded to the recently required light and thin reduction, and the assembly cost of the semiconductor package can be greatly reduced than in the conventional case, thereby significantly reducing the overall product production efficiency. Can be improved.

Subsequently, the chip scale semiconductor package of the present invention is manufactured through core processes of an electronic device by going through a later process, for example, an “electric test process”, a “printed circuit board mounting process”, and the like.

As described above, in the present invention, by placing a slim structure that can replace the conventional thermal spreader in the structure of the pen-out type semiconductor package, thereby maximizing the support stability of the solder balls, "support stability of solder balls" Securing, "" minimizing the size of the semiconductor package "and the like can be achieved at once.

The present invention has an overall useful effect in the semiconductor package of various varieties constituting the ball array type.

And while certain embodiments of the invention have been described and illustrated, it will be apparent that the invention may be embodied in various modifications by those skilled in the art.

Such modified embodiments should not be understood individually from the technical spirit or point of view of the present invention and such modified embodiments should fall within the scope of the appended claims of the present invention.

As described in detail above, in the chip scale semiconductor package according to the present invention, a pair of support films are formed on both sides of the semiconductor chip to support other partial surfaces of the stress relaxation films separated from the surface of the semiconductor chip. In this case, since the stress relaxation films and the adhesive films forming the support base of the solder balls are stably supported by the supporting films, the stress relaxation films and the solder balls based on the adhesive films are also supported by the semiconductor chip. It can maintain a stable support state such as supported.

Since these supporting films can achieve a simple structure of a single layer type compared to a conventional thermal spreader, when the present invention is achieved, the production line is required to achieve the final finished product while maximizing the support stability of the solder balls in the production line. It is possible to flexibly cope with fire extinguishment, and to reduce the assembly cost of the product more than in the conventional case, which in turn can significantly improve the overall product production efficiency.

Claims (3)

A semiconductor chip having a plurality of bonding pads arranged along a center of the surface at a predetermined interval; A pair of stress relaxation films separated left and right on the basis of the bonding pads, the other part of which extends to the outside of the semiconductor chip with a part of which is seated on a surface of the semiconductor chip; Seated on the surface of each of the stress relaxation films, a plurality of solder ball windows are arranged on each surface, and separated from side to side based on the bonding pads, some surface is positioned to correspond to the surface of the semiconductor chip, the other part A pair of adhesive tapes whose surfaces extend outwardly of the semiconductor chip; The bonding pads are interposed between the stress relaxation films and the polyimide tapes, and one end is exposed to the surface of each polyimide tape through the solder ball windows, and the other end is exposed to the sides of the polyimide films. Beam leads electrically connected to the beam leads; A plurality of solder balls seated on the solder ball windows in electrical contact with the beam leads, A chip scale semiconductor package, characterized in that a pair of support films are formed on both sides of the semiconductor chip to support the other partial surface of the stress relaxation films extending to the outside of the semiconductor chip. The chip scale semiconductor package of claim 1, wherein the support films are made of any one material of silicon, ceramic, or metal. A semiconductor chip having a plurality of bonding pads arranged along the edge of the surface at a predetermined interval; A plurality of stress relaxation films separated into a plurality of bonding pads based on the bonding pads, a part of which is seated on a surface of the semiconductor chip, and another part of which is separated from a surface of the semiconductor chip; It is seated on the surface of each of the stress relaxation films, a plurality of solder ball windows are arranged on each surface, separated into a plurality of the bonding pads, a part of the surface is positioned to correspond to the surface of the semiconductor chip, the other part A plurality of adhesive tapes whose surfaces are separated from the surface of the semiconductor chip; Interposed between the stress relaxation films and the adhesive tapes, one end is exposed to the surface of each adhesive tape through the solder ball windows, and the other end is exposed to the side of the adhesive tapes to be electrically connected to the bonding pads. Connected beam leads; A plurality of solder balls seated on the solder ball windows in electrical contact with the beam leads, A chip scale semiconductor package, characterized in that a pair of support films are formed on both sides of the semiconductor chip to support the other partial surface of the stress relaxation films separated from the surface of the semiconductor chip.