KR20010009953A - Plasma Display Panel Driving with Radio Frequency Signal and Fabricating Method thereof - Google Patents

Abstract

PURPOSE: A method for manufacturing an RF PDP(Radio Frequency Plasma Display Panel) is provided to improve the quality of address discharging by forming a dielectric layer having a regular thickness on a data electrode. CONSTITUTION: In an RF PDP having a lower plate, address discharging occurs at a contact between a scan electrode(108) and a data electrode(104) to be extended lengthwise to the data electrode by power supply thereto. An address discharging pattern is not extended any longer and limited within a discharge cell when the discharging reaches a dielectric barrier(114) in the cell. This is because the discharge voltage supplied to the discharge area becomes very low by voltage fall in the thick dielectric layer. However, most of voltage supplied to the two electrodes is supplied to the discharge area as each dielectric layer on the scan electrode and a groove(112) is thin. In the RF PDP having the groove(112), the voltage is lowered as most of voltage supplied to the data electrode is fed to the discharge area. Thereby, discharge particles are diffused to neighboring cells rarely in address discharging to reduce interference between the neighboring cells. The first dielectric layer(106) minimizes parasitic capacitance between the two electrodes to prevent unnecessary energy loss.

Description

High frequency plasma display panel and its manufacturing method {Plasma Display Panel Driving with Radio Frequency Signal and Fabricating Method

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high frequency plasma display panel and a method for manufacturing the same, and more particularly, to a high frequency plasma display panel with improved address discharge characteristics and a method for manufacturing the same.

Plasma Display Panel (hereinafter referred to as "PDP") is a display device in which ultraviolet light generated by gas discharge excites a phosphor to generate visible light from the phosphor. PDP has the advantages of being thin, light, high-definition large screen, and wider viewing angle than the cathode ray tube (CRT), which has been the dominant display device. PDP is composed of a plurality of discharge cells arranged in a matrix form, one discharge cell constitutes a pixel of the screen. In the PDP, by adjusting the number of sustain discharges in each discharge cell, stepwise brightness required for image display, that is, gray scale, is realized.

1 is a cross-sectional view illustrating a longitudinal cross-sectional structure of a discharge cell in a conventional AC surface discharge PDP. Referring to FIG. 1, the upper plate 20 and the lower plate 22 are provided in parallel with a predetermined distance. An AC drive signal is supplied to the rear surface of the upper substrate 24 constituting the upper plate 20 so that a pair of discharge sustaining electrodes 26 forming a surface discharge is formed side by side for each discharge cell. The upper dielectric layer 28 formed to have a uniform thickness on the pair of discharge sustaining electrodes 26 has a function of accumulating charge during discharge. The protective layer 30 entirely coated on the upper dielectric layer 28 protects the pair of discharge sustaining electrodes 26 and the upper dielectric layer 28 from sputtering shock of charged particles during discharge to extend the life of the discharge cell. On the lower substrate 32 constituting the lower plate 22, a data electrode 34 for address discharge is formed to cross at right angles with the pair of discharge sustaining electrodes 26 on the upper substrate 24. On the lower substrate 32 and the data electrode 34, a lower dielectric layer 36 is formed on the entire surface to form wall charges during discharge. In addition, the partition wall 42 is vertically formed between the upper plate 20 and the lower plate 22. The partition wall 42 forms the discharge region 38 of the cell together with the upper plate 20 and the lower plate 22, and separates the discharge cells from each other to block electrical and optical interference between neighboring cells. The discharge region 38 is filled with a mixed gas of He + Xe or Ne + Xe that generates ultraviolet rays during discharge. On the lower dielectric layer 36 of the lower plate 22, a fluorescent layer 40 that is excited by ultraviolet rays generated during discharge and generates visible light is applied.

Briefly describing the light emission process, when a voltage is applied between the discharge sustaining electrode 26 of the upper plate 20 and the data electrode 34 of the lower plate 22, an address discharge occurs to cause the upper / lower dielectric layers 28 and 36. ) Wall charges are formed. The formed wall charges lower the discharge voltage required for sustain discharge. In the cells selected by the address discharge, sustain discharge occurs between the discharge sustain electrodes 26 by the AC signal supplied to the discharge sustain electrode 26 pairs. As an AC signal, a square wave pulse having a duty ratio of 1 is mainly used. The frequency of the AC signal is usually about 200 ~ 300 Hz, the discharge pulse width is about 10 ~ 20 Hz. Charged particles are generated in the discharge region 38 during the sustain discharge. Ultraviolet rays are generated in the process of transition after the discharge gas is excited by the charged particles. The generated ultraviolet rays excite the fluorescent layer 40 to generate visible light, thereby realizing an image of the PDP.

In AC surface discharge PDP, sustain discharge occurs only once in a very short moment for one spherical pulse. The charged particles generated during the sustain surface discharge move the discharge paths formed between the discharge sustain electrodes 26 according to the electrode polarities to form wall charges on the surface of the upper dielectric layer 28. The discharge is stopped because the discharge voltage in the discharge region 38 is reduced by the formed wall charge. Accordingly, in the AC surface discharge PDP, most of the discharge time is consumed as a preparation step for the formation of the wall charge and the next discharge, thereby lowering the discharge efficiency. In addition, since negative glow is used, most of the electrical energy applied to the discharge region is consumed for the excitation and ionization of the gas, thereby lowering the luminous efficiency and luminance. In order to solve this problem, a PDP (hereinafter referred to as "RF PDP") in which discharge is continuously maintained by a radio frequency signal has been proposed. In the RF PDP, electrons vibrating in the discharge area under the force of the high frequency signal supplied to the PDP continuously ionize the discharge gas, thereby causing continuous discharge for most of the discharge time.

2 is a cross-sectional view illustrating a longitudinal cross-sectional structure of a discharge cell in a conventional RF PDP. Referring to FIG. 2, the upper plate 60 and the lower plate 62 are provided in parallel at a predetermined distance. A high frequency signal is supplied to the rear surface of the upper substrate 64 constituting the upper plate 60 so that the high frequency electrodes 66 forming high frequency sustain discharge are formed side by side for each discharge cell. The upper dielectric layer 68 formed on the high frequency electrode 66 has a function of accumulating charge during discharge. The upper protective layer 70 coated on the upper dielectric layer 68 may protect the high frequency electrode 66 and the upper dielectric layer 68 from sputtering shocks of charged particles during discharge to extend the life of the discharge cell. On the lower substrate 72 constituting the lower plate 62, a data electrode 74 for address discharge is formed to cross at right angles with the high frequency electrode 66 of the upper plate 60. The scan electrode 78 is formed on the data electrode 74 in a direction orthogonal to the data electrode 74 with the first dielectric layer 76 interposed therebetween. The scan electrode 78 and the high frequency electrode 66 of the upper plate 60 are parallel to each other. The scan electrode 78 generates an address discharge together with the data electrode 74 and also generates a high frequency sustain discharge together with the high frequency electrode 66 of the upper plate 60. The second dielectric layer 80 and the lower passivation layer 82 are sequentially formed on the scan electrode 78. In addition, the partition wall 84 is formed vertically between the upper plate 60 and the lower plate 62. The partition wall 84 forms a discharge region 86 of the cell together with the upper plate 60 and the lower plate 62, and distinguishes the discharge cells from each other to block electrical and optical interference between neighboring cells. The discharge region 86 is filled with a mixed gas of He + Xe or Ne + Xe that generates ultraviolet rays during discharge. On the second dielectric layer 80 of the lower plate 62, a fluorescent layer 88 which is excited by ultraviolet rays generated during discharge and generates visible light is coated.

When the discharge process of the RF PDP is schematically described, an AC driving signal is supplied between the data electrode 74 and the scan electrode 78 of the lower plate 62 so that an address discharge occurs between the two electrodes 74 and 78. In this process, charged particles such as electrons are generated in the discharge region 86. Then, the direction of the electric field is alternately changed in the discharge region 86 by the high frequency signal supplied to the high frequency electrode 66 of the upper plate 60. Accordingly, the electrons generated in the discharge region 86 continuously generate a sustain discharge while vibrating up and down between the high frequency electrode 66 and the scan electrode 78. Thus, when the distance between the electrodes in the glow discharge is long, the discharge efficiency can be achieved, such as a positive column (Positive column) is very high. The vibrating electrons excite and ionize the discharge gas continuously during most discharge times. Ultraviolet rays generated in this process excite the fluorescent layer 88 to generate visible light, thereby realizing an image of the PDP.

In this RF PDP, the sustain discharge efficiency is improved compared to the conventional AC surface discharge PDP, but still has problems in address discharge for cell selection and charged particle generation. This problem will be described with reference to FIGS. 3A and 3B. Figure 3a shows in detail the longitudinal cross-sectional structure of the bottom plate to make the address discharge in the conventional RF PDP. As shown in FIG. 3A, a first dielectric layer 76 for electrical insulation is formed between the scan electrode 78 and the data electrode 74 formed on the lower plate 62 of the panel, and on top of the second dielectric layer ( 80) is formed. The protective layer and the fluorescent layer formed on the second dielectric layer 80 are omitted in FIG. 3A. In the conventional AC surface discharge PDP, not only sustain discharge but also discharge sustaining electrode pairs which cause address discharge are arranged side by side in each discharge cell, and a dielectric layer is formed on it with a uniform thickness. When a voltage is applied to an electrode to cause a discharge, a voltage drop occurs in proportion to the thickness of the dielectric layer, and a difference voltage is applied to the discharge region to cause a discharge. Since the dielectric layers formed on the pair of discharge sustaining electrodes have the same thickness, the amount of voltage drop generated in the dielectric layer when the voltage is applied to the discharge sustaining electrode is the same everywhere. Therefore, even when a voltage is applied to any of the discharge sustaining electrode pairs, since the same voltage drop occurs in the dielectric layer, discharge occurs uniformly anywhere in the discharge cell. In such an AC surface discharge PDP, it is easy to optimize the discharge efficiency by adjusting the thickness of the dielectric layer. However, in the RF PDP, as illustrated in FIG. 3A, the thickness t ₁ + t ₂ of the dielectric layer formed on the data electrode 74 is different from the thickness t ₁ of the dielectric layer formed on the scan electrode 78. Accordingly, when the voltage is applied to the scan electrode 78 and the data electrode 74 during the address discharge, the discharge voltage applied to the actual discharge region 86 is different due to the difference in the voltage drop according to the thickness difference of the dielectric layer. The problem arises that the position is uneven. In addition, the amount of the voltage drop generated in the dielectric layer by the first dielectric layer 76 additionally formed between the scan electrode 78 and the data electrode 74 becomes larger than that of the conventional AC surface discharge PDP. The discharge voltage actually applied to the discharge region 86 of the RF PDP due to the voltage drop generated in the dielectric layers 76 and 80 formed on the scan electrode 78 and the data electrode 74 is compared with the data electrode 74. It is estimated that it is about 60 to 70% of the driving voltage applied between the scan electrodes 78. Thus, if the voltage required to generate the address discharge in the discharge region 86 is 200V, a higher voltage of 290 to 330V should be applied between the actual data electrode 74 and the scan electrode 78. In addition, in the RF PDP, unnecessary energy consumption occurs due to the parasitic capacitance component C2 between the data electrode 74 and the scan electrode 78, resulting in a decrease in discharge efficiency. The parasitic capacitance component C2 decreases when the thickness t ₂ of the first dielectric layer 76 is increased. However, when the thickness of the first dielectric layer 76 is increased, the voltage drop in the dielectric layer increases and is supplied to the data electrode 74. The driving voltage must be increased and this causes another problem. When the driving voltage of the data electrode 74 is increased during address discharge, the address discharge pattern 90 is formed long in the longitudinal direction of the data electrode 74 as shown in the plan view of the lower plate shown in FIG. 3B. As a result, diffusion and movement of charged particles into adjacent cells becomes severe, and mutual interference between adjacent cells occurs. This problem severely affects the overall discharge uniformity and driving voltage margin of the panel.

Accordingly, an object of the present invention is to provide a high frequency plasma display panel having improved address discharge characteristics and a method of manufacturing the same.

1 is a cross-sectional view showing the longitudinal cross-sectional structure of the discharge cell in the conventional AC surface discharge PDP.

2 is a cross-sectional view illustrating a longitudinal cross-sectional structure of a discharge cell in a conventional high frequency plasma display panel.

3A is a cross-sectional view showing a longitudinal cross-sectional structure of a lower plate in a conventional high frequency plasma display panel.

Fig. 3B is a plan view of the lower plate showing the address discharge pattern in the conventional high frequency plasma display panel.

4A is a cross-sectional view illustrating a longitudinal cross-sectional structure of a lower plate in a high frequency plasma display panel according to an exemplary embodiment of the present invention.

4B is a plan view of a lower plate showing an address discharge pattern in the high frequency plasma display panel according to the embodiment of the present invention;

5A and 5B are plan views illustrating a planar structure of a lower plate in a high frequency plasma display panel according to another exemplary embodiment of the present invention.

6A to 6E are diagrams showing in steps a method of manufacturing a lower plate of a high frequency plasma display panel according to an embodiment of the present invention.

<Description of the code | symbol about the principal part of drawing>

20,60: top plate 22,62,100: bottom plate

24,64: upper substrate 26: discharge sustaining electrode

28,68: upper dielectric layer 30: protective layer

32,72,102: lower substrate 34,74,104: data electrode

36: lower dielectric layer 38,86: discharge area

40,88 Fluorescent layer 42,84 Bulkhead

66: high frequency electrode 70: upper protective layer

76,106: first dielectric layer 78,108: scan electrode

80,110 second dielectric layer 82 lower protective layer

90,116: address discharge pattern 112: groove

114,118,120: dielectric barrier 140: photoresist

In order to achieve the above object, the high frequency plasma display panel of the present invention includes a first dielectric layer formed between the data electrode and the scan electrode, a second dielectric layer formed on the first dielectric layer and the scan electrode, and first and second sides of the scan electrode. A groove is formed on the second dielectric layer to a predetermined depth.

A method of manufacturing a high frequency plasma display panel according to the present invention includes the steps of forming a mask pattern on the second dielectric layer to mask the outer portion of the scan electrode and the discharge cell, exposing exposed portions of the dielectric layers exposed through the mask pattern; Heat treating the dielectric layers, etching the exposed portions of the dielectric layers to form grooves of predetermined depth on the dielectric layers, and removing the mask pattern.

Other objects and features of the present invention in addition to the above object will be apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 4A to 6E.

4A illustrates a longitudinal cross-sectional structure of a bottom plate of an RF PDP according to an embodiment of the present invention. Referring to FIG. 4A, the data electrode 104 is formed on the lower substrate 102 constituting the lower plate 100, and the first dielectric layer 106 is coated on the entire surface thereof. The scan electrode 108 is formed in the direction orthogonal to the data electrode 104 on the first dielectric layer 106, and the second dielectric layer 110 is applied thereon. Some dielectric layer regions between the scan electrodes 108 formed for each discharge cell are etched by an etching operation. The etched regions form grooves 112 and the unetched regions form dielectric barriers 114. The protective layer and the fluorescent layer which are also formed on the structure of the lower plate 100 are omitted in the drawing. The first dielectric layer 106 between the scan electrode 108 and the data electrode 104 is formed to a sufficient thickness of about 50 to 70 μm. In the groove 112, not only the first dielectric layer 110 but also a portion of the first dielectric layer 106 is etched so that the thickness of the dielectric layer between the data electrode 104 and the discharge region becomes very thin. In the dielectric barrier 114, the thickness of the dielectric layer between the data electrode 104 and the discharge region is very thick as in the conventional structure.

When the driving voltage is applied to the data electrode 104 and the scan electrode 108 in the RF PDP having the bottom plate structure according to the present invention, an address discharge is generated at the intersection of the scan electrode 108 and the data electrode 104 and thus the data electrode. It extends in the longitudinal direction of 104. At this time, when the discharge reaches the dielectric barrier 114 in the cell, the address discharge pattern 116 is no longer enlarged and is limited in the discharge cell as shown in FIG. 4B. This is because a large voltage drop in the thick dielectric layer causes the discharge voltage applied to the discharge region on the dielectric barrier 114 to be very low. However, since the thickness of the dielectric layer formed on the scan electrode 108 and the groove 112 is relatively thin, most of the driving voltages supplied to the data electrode 104 and the scan electrode 108 are applied to the discharge region. Accordingly, address discharge is concentrated in the discharge region on the scan electrode 108 and the discharge region of the groove 112, and the discharge is suppressed on the dielectric barrier 114. In addition, in the RF PDP of the present invention having the grooves 112, most of the driving voltage supplied to the data electrode 104 can be applied to the discharge region, thereby lowering the driving voltage. When the driving voltage of the data electrode 104 is lowered, the phenomenon in which charged particles are diffused into adjacent cells during address discharge is reduced, thereby further reducing mutual interference between adjacent cells. Meanwhile, the first dielectric layer 106 is formed to a sufficient thickness to minimize the parasitic capacitance component between the scan electrode 108 and the data electrode 104. Accordingly, unnecessary energy loss can be prevented. In the present invention, the thickness of the dielectric layer between the scan electrode 108 and the data electrode 104 is sufficiently thick and the thickness of the dielectric layer formed on the data electrode 104 can be made thin. Thus, energy loss and voltage drop in the dielectric layer can be solved. It can be solved at the same time.

As shown in the top view of the bottom plate shown in FIG. 4B, the address discharge pattern 116 is distributed along the data electrode 104 and stopped at the dielectric barrier 114. The dielectric barrier 114 may be formed in various shapes within a range that prevents the address discharge pattern 116 having such a distribution from being extended to adjacent cells. That is, since the address discharge pattern 116 is distributed in the longitudinal direction of the data electrode 104, dielectric barriers 118 and 120 having a short rectangular shape or an elliptic shape are surrounded by the data electrode 104 as shown in FIGS. 5A to 5B. It is also possible to be formed around the. Any other form is possible, and these various types of dielectric barriers can be easily realized by patterning appropriately the photo-resist applied on the bottom plate to etch the dielectric layer in the desired form. .

6A to 6E are diagrams illustrating step-by-step manufacturing methods of the RF PDP according to an embodiment of the present invention. Referring first to FIG. 6A, the data electrode 104, the first dielectric layer 106, the scan electrode 108 disposed in a direction orthogonal to the data electrode 104, and the second substrate 102 are disposed on the lower substrate 102. The lower plate 100 in which the dielectric layers 110 are sequentially stacked is provided. In the present invention, as the material of the first and second dielectric layers 106 and 110, photosensitive glass having a property of changing its trait in response to ultraviolet rays is used. On the lower plate 100, a photoresist 140 patterned in a suitable form is applied as shown in FIG. 6B. The photoresist 140 is patterned to be formed only at the position where the scan electrode 108 and the dielectric barrier are formed. Next, as shown in FIG. 6C, ultraviolet rays are irradiated onto the lower plate 100 on which the photoresist 140 is formed. When the lower plate 100 is irradiated with ultraviolet rays and then subjected to heat treatment, the dielectric layer portion irradiated with ultraviolet rays and the dielectric layer portion not irradiated with ultraviolet rays are systematically different from each other. After the ultraviolet irradiation and heat treatment steps, the lower plate 100 is etched by being precipitated in an aqueous solution containing hydrofluoric acid (HF) for a predetermined time. The portion to be etched will vary depending on the amount of ultraviolet radiation and the heat treatment temperature. A method of causing the portion of the dielectric layer irradiated with ultraviolet light to be etched is called a positive photosensitive glass etching method, and a method of covering a portion of the photoresist 140 that is not irradiated with ultraviolet light to be etched is called a negative photosensitive glass etching method. The method shown in Fig. 6D is a positive photosensitive glass etching method in which a portion irradiated with ultraviolet rays is etched. In this case, the exposed dielectric layer portion is etched by the etchant by depositing a crystal phase by heat treatment. In the case of the negative photosensitive glass etching method, the energy of irradiated ultraviolet rays is lower than that of the positive photosensitive glass etching method, while the heat treatment temperature is higher than that of the positive photosensitive glass etching method. In the negative photosensitive glass etching method, the exposed dielectric layer portion has a dense structure in which a crystal phase is formed, while the unexposed portion covered by the photoresist has an amorphous structure in which excessive defects exist. Accordingly, during etching, the penetration of the etchant into the unexposed portion having the amorphous structure is facilitated, and the unexposed portion is quickly etched and removed. When such a negative photosensitive glass etching method is used in the manufacturing method of the present invention, the photoresist should be formed only at the portion where the dielectric well will be formed, as opposed to the form shown in FIG. 6B. Removing the dielectric layer exposed by the positive photosensitive glass etching method forms the dielectric barrier 114 and the groove 112 as shown in FIG. 6D. Finally, after removing the photoresist on the lower plate 100 in the process of Figure 6e and coating a protective layer and a fluorescent layer not shown in the figure is completed the lower plate of the RF PDP according to the present invention.

Photosensitive glass used as the material of the first and second dielectric layers 106 and 110 in the present invention has anisotropic etching characteristics. Thus, if the etching time is properly adjusted, the width and depth of the portion to be etched can be easily adjusted to realize a precise shape. Accordingly, the lower plate manufacturing method of the present invention can make the thickness of the dielectric layer on the data electrode uniform, thereby increasing the discharge uniformity of the address discharge.

As described above, the high frequency plasma display panel according to the present invention can effectively suppress mutual interference between adjacent cells during address discharge by using a dielectric barrier, thereby improving discharge uniformity and driving voltage margin for each discharge cell. There is this. In addition, the driving voltage required for the address discharge can be reduced by reducing the thickness of the dielectric layer formed on the data electrode. Accordingly, it is possible to reduce the load on the driving device and to further reduce mutual interference between adjacent cells. In addition, by forming a sufficiently thick dielectric layer between the data electrode and the scan electrode, parasitic capacitance values can be reduced, thereby reducing unnecessary energy loss.

In the method for manufacturing a high frequency plasma display panel according to the present invention, a lower plate provided with a dielectric barrier and a groove may be precisely formed by using an anisotropic etching method using photosensitive glass. Accordingly, the thickness of the dielectric layer formed on the data electrode can be made uniform, thereby improving the discharge uniformity of the address discharge and the driving voltage margin.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (6)

A high frequency plasma display panel comprising a plurality of data electrodes and a scan electrode for causing an address discharge in a discharge cell, A first dielectric layer formed between the data electrode and the scan electrode; A second dielectric layer formed on the first dielectric layer and the scan electrode; And a groove formed at a predetermined depth in the first and second dielectric layers on both sides of the scan electrode. The method of claim 1, And the groove has a flat bottom surface thereof. The method of claim 1, And a dielectric barrier having a predetermined thickness from the groove to an outer portion of the discharge cell. A high frequency in which a data electrode and a scan electrode for causing an address discharge in a discharge cell, a first dielectric layer formed between the data electrode and the scan electrode, and a second dielectric layer formed on the scan electrode and the first dielectric layer are formed In the method of manufacturing a plasma display panel, Forming a mask pattern on the second dielectric layer to mask an outer portion of the scan electrode and the discharge cell; Exposing exposed portions of the dielectric layers exposed through the mask pattern; Heat treating the dielectric layers; Etching the exposed portions of the dielectric layers to form grooves of a predetermined depth on the dielectric layers; And removing the mask pattern. The method of claim 4, wherein And a dielectric barrier having a predetermined thickness is formed from the groove to the outer edge of the discharge cell. The method of claim 4, wherein And said first dielectric layer and said second dielectric layer are photosensitive glass having anisotropic etching characteristics and changing crystal states by exposure and heat treatment.