KR20010002220A - A pad arrangement structure of semiconductor device - Google Patents

Abstract

PURPOSE: A pad arrangement structure in semiconductor devices is provided to be capable of preventing malfunction and fail of semiconductor devices, by preventing supply power voltage drop, delay of signal and noise that are generated in a circuit in the central portion of semiconductor devices. CONSTITUTION: A pad arrangement structure in semiconductor devices includes the first group of pads (P1-P38) formed in the edge of semiconductor devices. The pad further includes the second group of pads (P39-P42) formed in the central portion of the semiconductor devices. Each of the pads transfers a supply power voltage (VCC) from the outside and alternating current (A.C.) signal to internal circuits formed in the central portion of the semiconductor devices.

Description

A pad arrangement structure of a semiconductor device {A PAD ARRANGEMENT STRUCTURE OF SEMICONDUCTOR DEVICE}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly, to a pad arrangement structure of a semiconductor device for preventing a drop in power supply voltage.

Recently, as semiconductor technology develops and chips requiring high performance are required, the size of a semiconductor device, that is, a chip, has gradually increased. Of course, the size of the chip can be designed small, but to pursue the high performance of the semiconductor device, the size of the chip is inevitably increased.

1 and 2, a general semiconductor device has regions of pads P1, P2,..., P37, and P38 formed at edges. The pads P1, P2,..., P37, and P38 may be externally supplied with a power supply voltage (hereinafter referred to as VCC), a clock, an address, data, and a command. command), etc., to the inside of the semiconductor device, that is, the chip. However, as the size of the semiconductor device increases, when the pads P1, P2,..., P37, P38 are formed at the edges of the semiconductor device as shown in FIG. 1, the pads P1, P2,. Since the P37 and P38 are formed at the edges of the semiconductor device, the power supply voltage VCC supplied to the center of the semiconductor device drops as shown in FIG. 2. This phenomenon is caused by the resistance of the wiring connecting the pads (P1, P2, ..., P37, P38) and the internal circuit (not shown) formed in the center of the semiconductor device, the longer the length of the wiring Ohm's law increases the amount of the voltage drop.

In particular, since a large amount of current flows in a high performance microprocessor, the voltage drop phenomenon becomes a more serious problem. In addition, as the clock supplied to the entire semiconductor device moves away from the pads P1, P2,..., P37, and P38, a signal is delayed and noise is generated. These problems cause a direct current (DC) fail, a function fail, and the like, which is the main cause of the semiconductor device failing.

Accordingly, it is an object of the present invention to provide a pad arrangement structure of a semiconductor device that efficiently transfers an external power supply and an external alternating signal to a semiconductor device without loss.

1 illustrates a pad structure of a general semiconductor device;

2 is a diagram illustrating a power supply voltage drop generated in the semiconductor device of FIG. 1;

3 shows a pad structure of a semiconductor device according to a first embodiment of the present invention;

4 illustrates a pad structure of a semiconductor device according to a second embodiment of the present invention;

5 is a diagram illustrating a power supply voltage drop generated in the semiconductor device according to the first embodiment of the present invention.

(Configuration)

According to one aspect of the present invention for achieving the above object, the semiconductor device according to the present invention includes a first and second groups of pads. Each of the pads of the first group is formed at an edge of the semiconductor device. The pads of the second group are formed in the center of the semiconductor device. The pads of the second group deliver power from the outside into the semiconductor device and transmit an AC signal from the outside to the semiconductor device.

According to another feature of the invention, the semiconductor device according to the invention comprises first and second groups of pads. The pads of the first group are formed at edges of the semiconductor device. The pads of the second group are formed at predetermined portions other than a portion where the first pad regions are formed. Each of the pads of the second pad group transfers power and AC signals from the outside into the semiconductor device.

(Action)

With such a device, the pads are located in the central portion of the semiconductor device, whereby power and AC signals from the outside are efficiently transmitted to the entire semiconductor device without loss.

(Example)

Hereinafter, reference will be described in detail with reference to FIGS. 3 to 5 according to a preferred embodiment of the present invention.

Referring to FIG. 3, the semiconductor device according to the present invention may include not only the first groups of pads P1, P2,... Has pads P39, P40, P41, P42 in the group. The pads P39, P40, P41, and P42 of the second group transfer an external power supply voltage VCC and an AC signal to an internal circuit formed in a central portion of the semiconductor device. This prevents the voltage drop and the noise of the AC signal generated in the circuit in the central portion of the semiconductor, thereby preventing the semiconductor device from malfunctioning or failing.

Referring to FIG. 3, the semiconductor device according to the first embodiment of the present invention includes first and second groups of pads P1, P2,..., P41, and P42. The pads P1, P2,..., P37, and P38 of the first group are connected to lead frames (not shown) formed at edge portions of the semiconductor device, and receive a power supply voltage VCC from the outside. ), An AC signal (eg, a clock, an address, etc.), data, and the like are transferred to internal circuits (not shown) in the semiconductor device. The pads P39, P40, P41, and P42 of the second group are connected to lead frames (not shown) formed at a central portion of the semiconductor device, and supply a power voltage VCC and an AC signal to the semiconductor device. Transfer to internal circuits (not shown) located in the central portion of the.

Referring to FIG. 4, the semiconductor device according to the second embodiment of the present invention includes first, second, and third groups of pads P1, P2,..., P45, and P46. The pads P1, P2,..., P37, and P38 of the first group are connected to lead frames (not shown) formed at edge portions of the semiconductor device, and receive a power supply voltage VCC from the outside. ), AC signals, data, and the like are transferred to internal circuits (not shown) in the semiconductor device. The pads P39, P40, P41, and P42 of the second group are connected to lead frames (not shown) formed in a central portion of the semiconductor device, and receive a power voltage VCC and an AC signal from an external source. Transfer to internal circuits (not shown) located in the central portion of the semiconductor device. The pads P43, P44, P45, and P46 of the third group may include leads formed between the pads P1, P2,..., P41, P42 of the first and second groups of the semiconductor device (not shown). And a power supply voltage (VCC) and an alternating current signal from the outside to the internal circuits of the semiconductor device.

2 and 5, it can be seen that the voltage drop occurring in the center portion of the semiconductor device according to the present invention is significantly reduced than the voltage drop occurring in the general semiconductor device. This is because the semiconductor device according to the first embodiment of the present invention has the pad structure as described above, so that power generated by wiring resistance, contact resistance and RC capacitor (resistor capacitor delay) which increases toward the center portion of the semiconductor device. This has the effect of preventing voltage (VCC) drop, signal delay and noise generation.

For example, assuming that a voltage drop of 0.5 volts (V) occurs in a central portion of a semiconductor device having a general pad arrangement structure, as shown in FIG. 2, a central portion of a semiconductor device having a pad arrangement structure according to the present invention. The voltage drop phenomenon does not occur, and a slight voltage drop (for example, 0.1 V to 0.2 V) occurs in a portion between the edge portion and the center portion of the semiconductor device. Of course, this phenomenon can be overcome with the pad arrangement structure of the semiconductor device according to the second embodiment of the present invention.

In the above, although the semiconductor device according to the present invention has been shown in accordance with the above description and drawings, this is merely an example, and various changes and modifications are possible without departing from the technical idea of the present invention.

As described above, the pads are positioned in the central portion of the semiconductor device, so that power and AC signals from the outside are efficiently transmitted to the entire semiconductor device without loss.

Claims (3)

In a semiconductor device: Pads of a first group formed at an edge of the semiconductor device; A second group of pads formed in the center of the semiconductor device, Each of the pads of the second group may be And a power supply from the outside to the semiconductor device. The method of claim 1, Each of the pads of the second group may be And transmitting an alternating current signal from the outside to the semiconductor device. In a semiconductor device: A plurality of first group pads formed at an edge of the semiconductor device; A second group of pads formed in a predetermined portion other than the portion where the pads of the first group are formed; Each of the pads of the second group may be A semiconductor device characterized by transferring power and AC signals from the outside into the semiconductor device.