KR20000073119A - Method for forming passivation layer of ffs mode liquid crystal display device - Google Patents
Method for forming passivation layer of ffs mode liquid crystal display device Download PDFInfo
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- KR20000073119A KR20000073119A KR1019990016192A KR19990016192A KR20000073119A KR 20000073119 A KR20000073119 A KR 20000073119A KR 1019990016192 A KR1019990016192 A KR 1019990016192A KR 19990016192 A KR19990016192 A KR 19990016192A KR 20000073119 A KR20000073119 A KR 20000073119A
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- G—PHYSICS
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- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
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- G02F1/134363—Electrodes characterised by their geometrical arrangement for applying an electric field parallel to the substrate, i.e. in-plane switching [IPS]
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
- G02F1/134372—Electrodes characterised by their geometrical arrangement for fringe field switching [FFS] where the common electrode is not patterned
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Abstract
Description
본 발명은 에프에프에스 모드 액정표시장치에 관한 것으로, 특히, ITO 상에 실리콘 질화막 재질의 보호막을 형성하기 위한 에프에프에스 모드 액정표시장치의 보호막 형성방법에 관한 것이다.The present invention relates to a fs mode liquid crystal display device, and more particularly, to a method of forming a protective film of a fs mode liquid crystal display device for forming a silicon nitride film protective film on the ITO.
에프에프에스(FFS : Fringe Field Switching) 모드 액정표시장치는 IPS 모드 액정표시장치의 낮은 개구율 및 투과율을 개선시키기 위하여 제안된 것으로, 이에 대하여 대한민국 특허출원 98-9243호로 출원되었다.Fringe Field Switching (FFS) mode liquid crystal display is proposed to improve the low aperture ratio and transmittance of IPS mode liquid crystal display, and has been filed in Korean Patent Application No. 98-9243.
이러한 FFS 모드 액정표시장치는, 카운터 전극과 화소 전극을 투명 금속막, 예컨데, ITO(Indium Tin IOxide)로 형성하면서, 상기 카운터 전극과 화소 전극간의 간격을 상·하부 유리기판들 사이의 간격 보다 좁게 형성함으로써, 카운터 전극과 화소 전극 상부에 프린지 필드(fringe field)가 형성되도록 한 것이다.In the FFS mode liquid crystal display, the counter electrode and the pixel electrode are formed of a transparent metal film, such as indium tin oxide (ITO), and the gap between the counter electrode and the pixel electrode is smaller than the gap between the upper and lower glass substrates. By forming, a fringe field is formed on the counter electrode and the pixel electrode.
도 1은 일반적인 FFS 모드 액정표시장치를 개략적으로 도시한 도면으로서, 도시된 바와 같이, 유리 재질의 하부 기판(1)과 상부 기판(10)은 액정층(도시안됨)의 개재하에 소정 거리를 두고 대향·배치되어 있다. 여기서, 하부 기판(1)과 상부 기판(10)간의 간격을 셀갭(d1)이라 칭한다.FIG. 1 is a view schematically illustrating a general FFS mode liquid crystal display. As shown in FIG. 1, the lower substrate 1 and the upper substrate 10 of a glass material may be spaced apart from each other by a liquid crystal layer (not shown). Facing and arranged. Here, the gap between the lower substrate 1 and the upper substrate 10 is called a cell gap d1.
하부 기판(1)의 내측면 상에 카운터 전극들(3)이 일정 등간격으로 이격·배치되어 있다. 이러한 카운터 전극(3)은 ITO와 같은 투명 금속막으로 형성되며, 플레이트 형태로 형성될 수도 있다. 카운터 전극들(3)이 형성된 하부 기판(1)의 전면 상에 게이트 절연막(5)이 증착되어 있고, 상기 게이트 절연막(5) 상에 상기 카운터 전극들(3) 사이마다 각각 화소 전극(7)이 형성되어 있다. 상기 화소 전극(7)은 카운터 전극(3)과 마찬가지로 ITO 금속막으로 형성된다. 이때, 화소 전극(5)과 카운터 전극(3)간의 간격(d2)은 셀갭(d1) 보다는 작다.The counter electrodes 3 are spaced apart at regular intervals on the inner surface of the lower substrate 1. The counter electrode 3 is formed of a transparent metal film such as ITO, and may be formed in a plate shape. A gate insulating film 5 is deposited on the entire surface of the lower substrate 1 on which the counter electrodes 3 are formed, and each pixel electrode 7 is disposed between the counter electrodes 3 on the gate insulating film 5. Is formed. The pixel electrode 7 is formed of an ITO metal film similarly to the counter electrode 3. At this time, the distance d2 between the pixel electrode 5 and the counter electrode 3 is smaller than the cell gap d1.
상기 화소 전극(7) 및 게이트 절연막(5) 상에 실리콘 질화막(SiNx)으로된 보호막(8)이 형성되어 있다. 여기서, 보호막(8)의 재질인 실리콘 질화막은 통상 파워를 2,000∼3,000W, 압력을 1,500∼2,500mTorr, 소오스 가스인 SiH4가스의 가스량은 800∼1,000sccm, 반응 가스인 NH3가스의 가스량은 7,000∼7,200sccm, N2가스의 가스량은 9,500∼9,900sccm으로 하는 공정 조건에 의해 형성된다.A protective film 8 made of a silicon nitride film SiN x is formed on the pixel electrode 7 and the gate insulating film 5. Here, the silicon nitride film made of the protective film 8 usually has a power of 2,000 to 3,000 W, a pressure of 1,500 to 2,500 mTorr, a gas amount of SiH 4 gas as a source gas is 800 to 1,000 sccm, and a gas amount of NH 3 gas as a reaction gas. 7,000~7,200sccm, gas of N 2 gas is formed by the process conditions as set 9,500~9,900sccm.
계속해서, 보호막(8) 상에 제1배향막(9)이 형성되어 있고, 상기 제1배향막과 대향하는 상부 기판(10)의 내측면 상에 제2배향막(11)이 형성되어 있다. 이러한 배향막들(9, 11)은 카운터 전극(3)과 화소 전극(7) 사이에서 전계가 형성되기 이전에, 액정층 내의 액정 분자들이 어느 한 방향에 대해서 일률적으로 배열되도록 하기 위하여 형성시킨 것이다.Subsequently, the first alignment film 9 is formed on the protective film 8, and the second alignment film 11 is formed on the inner side surface of the upper substrate 10 facing the first alignment film. The alignment layers 9 and 11 are formed so that the liquid crystal molecules in the liquid crystal layer are uniformly aligned in either direction before the electric field is formed between the counter electrode 3 and the pixel electrode 7.
상기와 같은 구성을 갖는 FFS 모드 액정표시장치에서, 카운터 전극(3)과 화소 전극(7) 사이에 전계가 형성되기 이전에는, 액정층 내의 액정 분자들이 배향막(9,11)의 영향으로 인하여 기판에 거의 수평을 이루도록 배열되지만, 카운터 전극(3)과 화소 전극(7) 사이에 전계가 형성되면, 전계의 형태는 수직 성분을 포함하는 프린지 필드가 되고, 액정 분자들은 그의 광축이 전계 방향과 수직 또는 수평이 되도록 틀어지게 됨으로써, 광을 누설시키게 된다.In the FFS mode liquid crystal display device having the above configuration, before the electric field is formed between the counter electrode 3 and the pixel electrode 7, the liquid crystal molecules in the liquid crystal layer are formed by the influence of the alignment layers 9 and 11 on the substrate. When the electric field is formed between the counter electrode 3 and the pixel electrode 7, the shape of the electric field becomes a fringe field including a vertical component, and the liquid crystal molecules have their optical axes perpendicular to the electric field direction. Or it is twisted to be horizontal, which causes light to leak.
그러나, 상기와 같은 FFS 모드 액정표시장치를 제조함에 있어서, 화소 전극의 재질인 ITO 상에 보호막의 재질인 실리콘 질화막을 증착시키게 되면, ITO의 계면에서 In의 석출이 일어남으로써, 이러한 In에 의해 투과율이 저하됨은 물론, 막들간의 스텝 커버리지 특성이 저하되는 문제점이 있다.However, in manufacturing the FFS mode liquid crystal display device as described above, when the silicon nitride film, which is the material of the protective film, is deposited on the ITO, which is the material of the pixel electrode, precipitation of In occurs at the interface of the ITO. In addition to this deterioration, there is a problem in that the step coverage characteristics between the films are deteriorated.
자세하게, PECVD법으로 ITO 상에 실리콘 질화막을 증착할 경우에는, 실리콘 질화막의 증착이 수행되는 동안, ITO의 계면에 존재하는 산소 성분과 SiH3, SiH2, 또는, SiH와 같은 플라즈마 내의 레디컬(Radical), 즉, 소오스 가스로 이용되는 SiH4가스의 수소 성분간의 반응에 의해 환원 반응이 일어나게 되고, 이 결과로, ITO의 계면에 In이 석출된다. 그런데, 이렇게 석출된 In은 ITO 계면이나, 보호막 내부에서 흑점으로 존재되기 때문에, 상기한 In에 의해 FFS 모드 액정표시장치의 투과율이 저하되며, 또한, 석출된 In으로 인하여 실리콘 질화막의 표면이 불균일하게 되어, 막들간의 스텝 커버리지 특성이 저하된다.In detail, when the silicon nitride film is deposited on the ITO by PECVD, the oxygen component present at the interface of the ITO and the radical in the plasma such as SiH 3 , SiH 2 , or SiH during the deposition of the silicon nitride film ( Radical), that is, a reduction reaction occurs due to a reaction between hydrogen components of the SiH 4 gas used as the source gas. As a result, In precipitates at the interface of ITO. However, the precipitated In is present as a black spot in the ITO interface or inside the protective film, so that the transmittance of the FFS mode liquid crystal display is lowered by the above In, and the surface of the silicon nitride film is uneven due to the deposited In. As a result, the step coverage characteristics between the films are lowered.
도 2는 종래의 공정 조건에 따라 ITO 상에 증착된 실리콘 질화막을 보여주는 SEM 사진이고, 도 3은 종래의 공정 조건에 따라 유리 기판 및 ITO 상에 형성된 실리콘 질화막을 보여주는 SEM 사진이다. 도면에서, 도면부호 21은 유리 기판, 22는 ITO, 23는 실리콘 질화막, A는 ITO와 수소 성분간의 환원반응이 발생하면서 이상(異常) 증착된 실리콘 질화막의 단면이고, 23a는 ITO 상에 형성된 실리콘 질화막이고, 23b는 유리기판 상에 형성된 실리콘 질화막이다.FIG. 2 is a SEM photograph showing a silicon nitride film deposited on ITO according to a conventional process condition, and FIG. 3 is a SEM photograph showing a silicon nitride film formed on a glass substrate and ITO according to a conventional process condition. In the drawing, reference numeral 21 is a glass substrate, 22 is ITO, 23 is a silicon nitride film, A is a cross section of a silicon nitride film which is abnormally deposited while reducing reaction between ITO and a hydrogen component occurs, and 23a is silicon formed on ITO. 23b is a silicon nitride film formed on the glass substrate.
도 2에서 보여지는 바와 같이, ITO와 SiH4가스의 수소 성분간의 환원반응에 의해, 도 3에서 보여지는 바와 같이, 유리 기판 상에 형성된 실리콘 질화막(32a)는 비교적 균일하지만, ITO 상에 형성된 실리콘 질화막(32B)는 매우 불균일하게 된다.As shown in FIG. 2, by the reduction reaction between the hydrogen component of ITO and SiH 4 gas, as shown in FIG. 3, the silicon nitride film 32a formed on the glass substrate is relatively uniform, but the silicon formed on ITO The nitride film 32B becomes very nonuniform.
따라서, 상기와 같은 문제점을 해결하기 위하여 안출된 본 발명은, 화소 전극의 재질인 ITO 상에 보호막의 재질인 실리콘 질화막을 증착시키더라도, ITO의 계면에서 In이 석출되는 것을 방지할 수 있는 FFS 모드 액정표시장치의 보호막 형성방법을 제공하는데, 그 목적이 있다.Therefore, the present invention devised to solve the above problems, even if the silicon nitride film of the protective film is deposited on the ITO material of the pixel electrode, the FFS mode that can prevent the deposition of In at the interface of the ITO SUMMARY OF THE INVENTION An object of the present invention is to provide a method for forming a protective film of a liquid crystal display device.
도 1은 일반적인 에프에프에스 모드 액정표시장치를 개략적으로 도시한 단면도.1 is a cross-sectional view schematically showing a general FSF mode liquid crystal display device.
도 2는 종래 공정 조건에 따라 ITO 상에 증착된 실리콘 질화막을 보여주는 SEM 사진.2 is a SEM photograph showing a silicon nitride film deposited on ITO according to conventional process conditions.
도 3은 종래의 공정 조건에 따라 유리 기판 및 ITO 상에 형성된 실리콘 질화막을 보여주는 SEM 사진.3 is a SEM photograph showing a silicon nitride film formed on a glass substrate and ITO according to conventional process conditions.
도 4는 본 발명의 실시예에 따른 공정 조건에 따라 ITO 상에 증착된 실리콘 질화막을 보여주는 SEM 사진.Figure 4 is a SEM photograph showing a silicon nitride film deposited on ITO according to the process conditions in accordance with an embodiment of the present invention.
도 5는 본 발명의 실시예에 따른 공정 조건에 따라 유리 기판 및 ITO 상에 증착된 실리콘 질화막을 보여주는 SEM 사진.5 is a SEM photograph showing a silicon nitride film deposited on a glass substrate and ITO according to the process conditions in accordance with an embodiment of the present invention.
(도면의 주요 부분에 대한 부호의 설명)(Explanation of symbols for the main parts of the drawing)
41 : 유리 기판 42 : ITO41: glass substrate 42: ITO
43,43a,43b : 실리콘 질화막43,43a, 43b: silicon nitride film
상기와 같은 목적을 달성하기 위한 본 발명의 FFS 모드 액정표시장치의 보호막 형성방법은, FFS 모드 액정표시장치에서 화소 전극의 재질인 ITO 상에 보호막의 재질인 실리콘 질화막을 형성하기 위한 FFS 모드 액정표시장치의 보호막 형성방법으로서, 상기 실리콘질화막은 파워를 2,000∼3,000W, 압력을 2,700∼3,500mTorr, 소오스 가스인 SiH4가스의 가스량은 200∼700sccm, 반응 가스인 NH3가스량은 7,000∼7,200sccm, N2가스량은 9,500∼9,900sccm으로 하는 공정 조건으로 형성하는 것을 특징으로 한다.A method of forming a protective film of an FFS mode liquid crystal display device according to the present invention for achieving the above object is an FFS mode liquid crystal display for forming a silicon nitride film of a protective film on ITO which is a material of a pixel electrode in an FFS mode liquid crystal display device. As the method for forming a protective film of the device, the silicon nitride film has a power of 2,000 to 3,000 W, a pressure of 2,700 to 3,500 mTorr, a gas amount of SiH 4 gas as a source gas is 200 to 700 sccm, an amount of NH 3 gas as a reaction gas is 7,000 to 7,200 sccm, The amount of N 2 gas is formed under process conditions of 9,500 to 9,900 sccm.
본 발명에 따르면, 소오스 가스인 SiH4가스의 가스량, 즉, 플로우 속도를 낮추어줌으로써, ITO의 계면에서 환원 반응에 의해 In이 석출되는 것을 방지하거나, 또는, 최대한 감소시킬 수 있다.According to the present invention, by lowering the gas amount of the SiH 4 gas, that is, the source gas, that is, the flow rate, it is possible to prevent In from precipitation or reduce as much as possible by reducing reaction at the interface of ITO.
이하, 첨부한 도면에 의거하여 본 발명의 바람직한 실시예를 자세히 설명하도록 한다.Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.
본 발명의 실시예에서는 화소 전극의 재질인 ITO 상에 보호막의 재질인 실리콘 질화막을 형성함에 있어서, 상기 실리콘 질화막을 형성하기 위한 공정 조건을 다음과 같이 조정한다.In an embodiment of the present invention, in forming a silicon nitride film of a protective film on ITO, which is a material of a pixel electrode, process conditions for forming the silicon nitride film are adjusted as follows.
우선, 파워와 반응 가스인 NH3가스 및 N2가스의 가스량은, 종래와 마찬가지로, 각각 2,000∼3,000W, 7,000∼7,200sccm, 9,500∼9,900sccm 정도로 하지만, 소오스 가스인 SiH4가스의 가스량, 즉, SiH4가스의 분당 플로우 속도는 종래와 비교해서, 200∼700sccm, 바람직하게는, 500sccm 정도로 감소시키고, 압력은 SiH4가스의 가스량을 감소시킨 것에 기인하여 실리콘 질화막의 증착 속도가 감소되는 것을 보상하기 위하여, 2,700∼3,500mTorr, 바람직하게는, 3,000mTorr 정도로 증가시킨다.First, the gas amount of power and a reactive gas of NH 3 gas and N 2 gas is, as in the prior art, respectively, so 2,000~3,000W, 7,000~7,200sccm, 9,500~9,900sccm but the amount of gas of the source gas of SiH 4 gas, that is, The flow rate per minute of SiH 4 gas is reduced by 200-700 sccm, preferably 500 sccm, compared with the conventional method, and the pressure is compensated for the decrease in deposition rate of the silicon nitride film due to the decrease in the amount of gas of SiH 4 gas. In order to increase the density, it is increased to about 2,700 to 3,500 mTorr, preferably about 3,000 mTorr.
상기와 같은 공정 조건으로 ITO 상에 SiNX를 증착시킬 경우에는 다음과 같이 ITO 계면으로부터 In이 석출되는 것을 방지할 수 있다.In the case of depositing SiN X on ITO under the above process conditions, In can be prevented from being precipitated from the ITO interface as follows.
먼저, 종래의 공정 조건에 따라 ITO 상에 실리콘 질화막을 증착시킬 경우에는, ITO 계면에서의 산소 성분과 SiH4가스의 수소 성분간의 반응에 의해 In2O3가 환원되어 ITO의 계면으로 많은 양의 In이 석출된다.First, in the case of depositing a silicon nitride film on ITO according to the conventional process conditions, In 2 O 3 is reduced by the reaction between the oxygen component at the ITO interface and the hydrogen component of the SiH 4 gas, thereby increasing the amount of In 2 O 3 to the interface of the ITO. In is precipitated.
그러나, 본 발명의 실시예에 따른 공정 조건에 따라 ITO 상에 실리콘 질화막을 증착시킬 경우에는, SiH4가스의 가스량, 즉, 플로우 속도가 감소된 것에 기인하여 플라즈마 내의 레티클 성분인 수소 성분이 감소되고, 이에 따라, ITO 계면에서 산소 성분과 수소 성분간의 반응을 종래와 비교해서 상대적으로 줄일 수 있게 되며, 이 결과로, ITO의 계면으로 In이 석출되는 것을 방지하거나, 또는, 현격하게 감소시킬 수 있게 된다.However, when the silicon nitride film is deposited on the ITO according to the process conditions according to the embodiment of the present invention, the hydrogen content, which is a reticle component in the plasma, is reduced due to the decrease in the gas amount of the SiH 4 gas, that is, the flow rate. Accordingly, the reaction between the oxygen component and the hydrogen component at the ITO interface can be relatively reduced as compared with the prior art. As a result, the precipitation of In at the interface of the ITO can be prevented or significantly reduced. do.
도 4는 본 발명의 실시예에 따른 공정 조건에 따라, ITO 상에 실리콘 질화막을 형성시킨 상태를 보여주는 SEM 사진으로서, 보여지는 바와 같이, 도 2와 비교해서, ITO(42)의 스텝 커버리지(Step Coverage)가 아주 우수하게 됨을 볼 수 있다. 여기서, 도면부호 41은 유리 기판, 43은 실리콘 질화막이다.FIG. 4 is a SEM photograph showing a state in which a silicon nitride film is formed on ITO according to process conditions according to an exemplary embodiment of the present invention. As shown in FIG. 4, the step coverage of the ITO 42 as compared to FIG. 2 is shown. It can be seen that coverage is very good. Here, reference numeral 41 is a glass substrate, and 43 is a silicon nitride film.
도 5는 본 발명의 실시예에 따른 공정 조건에 따라 유리 기판 및 ITO 상에 증착된 실리콘 질화막을 보여주는 SEM 사진으로서, ITO 상에 실리콘 질화막을 증착시키는 동안에 In의 석출이 거의 일어나지 않았기 때문에, 유리 기판 상에 증착된 실리콘 질화막(43a)이나, ITO 상에 증착된 실리콘 질화막(43b) 모두 균일한 표면을 갖게 됨을 볼 수 있다.5 is a SEM photograph showing a silicon nitride film deposited on the glass substrate and the ITO according to the process conditions according to the embodiment of the present invention. Since the deposition of In hardly occurred during deposition of the silicon nitride film on the ITO, the glass substrate It can be seen that both the silicon nitride film 43a deposited on the silicon nitride film 43a and the silicon nitride film 43b deposited on the ITO have a uniform surface.
따라서, 도 4 및 도 5로부터, 소오스 가스인 SiH4가스의 플로우 속도를 종래 보다 대략 45% 정도 감소시킬 경우에는, ITO의 계면에서 In이 석출되는 것을 방지할 수 있기 때문에, FFS 모드 액정표시장치의 투과율 저하를 방지할 수 있으며, 아울러, 실리콘 질화막의 표면 불균일을 방지할 수 있는 것에 기인하여, 스텝 커버리지 특성이 저하되는 것도 방지할 수 있다.4 and 5, when the flow rate of the SiH 4 gas, which is the source gas, is reduced by approximately 45% compared to the conventional method, since In can be prevented from depositing at the interface of the ITO, the FFS mode liquid crystal display device. It is possible to prevent the decrease in transmittance of, and also to prevent the surface unevenness of the silicon nitride film, so that the step coverage characteristic can be prevented from being lowered.
한편, 본 발명의 실시예에서와 같이, 소오스 가스인 SiH4가스의 가스량을 감소시킬 경우에는 ITO의 계면으로 In이 석출되는 것은 방지할 수는 있지만, 반면에, SiH4가스의 가스량을 감소시킨 것에 기인하여, 실리콘 질화막의 증착 속도가 감소됨으로써, 생산성의 저하를 초래하게 된다.On the other hand, when reducing the amount of gas of SiH 4 gas, which is a source gas, as in the embodiment of the present invention, it is possible to prevent In from depositing at the interface of ITO, while reducing the amount of gas of SiH 4 gas. Due to this, the deposition rate of the silicon nitride film is reduced, resulting in a decrease in productivity.
그런데, 본 발명의 실시예에서는 실리콘 질화막을 형성하기 위한 공정 조건에서 압력을 2,700∼3,500mTorr로 증가시켰기 때문에, 이러한 압력 증가에 의하여 실리콘 질화막의 증착 속도의 감소는 보상된다.However, in the embodiment of the present invention, since the pressure is increased to 2,700 to 3,500 mTorr under the process conditions for forming the silicon nitride film, the decrease in the deposition rate of the silicon nitride film is compensated for by this pressure increase.
이상에서 설명한 바와 같이, 본 발명은 ITO 상에 실리콘 질화막을 형성함에 있어서, 상기 실리콘 질화막을 형성하기 위한 소오스 가스인 SiH4가스의 가스량을 감소시킴으로써, 실리콘 질화막을 형성하는 동안에 ITO의 계면으로 In이 석출되는 것을 방지할 수 있고, 이에 따라, In에 의해 FFS 모드 액정표시장치의 투과율이 저하되는 것을 방지할 수 있으며, 또한, 실리콘 질화막으로 되는 보호막이 In에 의해 다공성화되는 것을 방지함은 물론, 그 표면을 균일하게 만들 수 있기 때문에, FFS 모드 액정표시장치의 신뢰성을 향상시킬 수 있다.As described above, in the present invention, in forming a silicon nitride film on ITO, In is reduced to the interface of ITO during the formation of the silicon nitride film by reducing the gas amount of SiH 4 gas, which is a source gas for forming the silicon nitride film. Precipitation can be prevented, and accordingly, the transmittance of the FFS mode liquid crystal display can be prevented from being lowered by In, and the protective film made of silicon nitride film is prevented from being porous by In. Since the surface can be made uniform, the reliability of the FFS mode liquid crystal display device can be improved.
기타, 본 발명은 그 요지를 일탈하지 않는 범위에서 다양하게 변경하여 실시할 수 있다.In addition, this invention can be implemented in various changes within the range which does not deviate from the summary.
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| US8288771B2 (en) | 2004-10-26 | 2012-10-16 | Samsung Electonics Co., Ltd. | Thin film transistor array panel and manufacturing method thereof |
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