JPH10239680A - Electrode plate for liquid crystal display device and production thereof - Google Patents

Electrode plate for liquid crystal display device and production thereof

Info

Publication number
JPH10239680A
JPH10239680A JP4267097A JP4267097A JPH10239680A JP H10239680 A JPH10239680 A JP H10239680A JP 4267097 A JP4267097 A JP 4267097A JP 4267097 A JP4267097 A JP 4267097A JP H10239680 A JPH10239680 A JP H10239680A
Authority
JP
Japan
Prior art keywords
layer
transparent
liquid crystal
electrode
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4267097A
Other languages
Japanese (ja)
Inventor
Yuichi Kumamoto
優一 熊本
Akihiro Hoshino
昭裕 星野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toppan Inc
Original Assignee
Toppan Printing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toppan Printing Co Ltd filed Critical Toppan Printing Co Ltd
Priority to JP4267097A priority Critical patent/JPH10239680A/en
Publication of JPH10239680A publication Critical patent/JPH10239680A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To prevent the occurrence of display irregularity due to voltage loss, defective pixels and the disturbance in the alignment of liquid crystals by providing the surfaces of substrates with colored pattern layers and forming switching elements and transparent electrodes for pixel driving via transparent coating layers thereon. SOLUTION: An over-coating layer 41 of an acrylic resin is formed on pigment dispersed color filters 20 which are formed with patterns of plural colors and consists of acrylate resins as resin component on the glass substrate 11. Gate electrodes 33 consisting of chromium and the transparent pixel electrodes 31 consisting of ITO(indium tin oxide) are patterned and formed thereon, Next, a gate insulating film 34 is formed of SiNx by plasma enhanced CVD, an amorphous silicon (a-Si:H) layer 35 by the plasma enhanced CVD and a passivation layer 35 of the SiNx by the plasma enhanced CVD. Further, reactive ion etching using a photoresist as a pattern resistant contact film is executed in gaseous CF4 , by which the gate insulating film 34, the amorphous silicon layer 35 and the passivation layer 36 are formed to the desired patterns.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、カラー液晶表示装
置において用いられる電極板に関する。
[0001] The present invention relates to an electrode plate used in a color liquid crystal display device.

【0002】[0002]

【従来の技術】薄膜トランジスタ(TFT)等のスイッ
チング素子および画素駆動用透明電極が形成された側の
電極板に透明着色層(カラーフィルタ)を形成すること
は、対向基板の簡略化や、双方の電極板を貼り合わせる
際の位置ずれや寸法ずれを防ぐ意味からも望ましいこと
と考えられ、この構成を実現する試みが為されてきた。
しかしながら、この構成の場合においては、カラーフィ
ルタの存在に起因する諸々の不具合が発生していた。
2. Description of the Related Art Forming a transparent colored layer (color filter) on an electrode plate on which a switching element such as a thin film transistor (TFT) and a transparent electrode for driving a pixel are formed can be achieved by simplifying an opposing substrate or by using both. It is considered to be desirable from the viewpoint of preventing displacement and dimensional displacement when bonding the electrode plates, and attempts have been made to realize this configuration.
However, in the case of this configuration, various problems have occurred due to the presence of the color filters.

【0003】すなわち、これらを箇条書きすると以下の
如くである。 1.画素電極の上にカラーフィルタを配置する構成、す
なわちその層構成が、例えば図2に示すように基板11
透明画素電極31 カラーフィルタ20 配向膜51
の順となっている層構成においては、透明画素電極31
と対向電極32との間には、ポリイミドの配向膜51に
さらにカラーフィルタ20が加わるので電気抵抗がより
高くなる効果を持ち、新たな電圧損失が発生する。通常
この場合、カラーフィルタ層形成による表面の乱れを平
坦化するため、カラーフィルタ20層上にオーバーコー
ト層41を設けるので、電圧損失はさらに増大し、印加
電圧を高くする必要が生じ、あるいは液晶駆動の応答性
の劣化を招くという問題を生じる。
[0003] That is, these are listed as follows. 1. A configuration in which a color filter is arranged on a pixel electrode, that is, the layer configuration is, for example, as shown in FIG.
Transparent pixel electrode 31 Color filter 20 Alignment film 51
, The transparent pixel electrode 31
Since the color filter 20 is further added to the polyimide alignment film 51 between the and the counter electrode 32, the effect of increasing the electrical resistance is obtained, and a new voltage loss occurs. Usually, in this case, the overcoat layer 41 is provided on the color filter 20 layer in order to flatten the surface disorder due to the formation of the color filter layer, so that the voltage loss further increases, and it becomes necessary to increase the applied voltage. There is a problem that the driving response is deteriorated.

【0004】2.そこで、上記の問題を解消するためカ
ラーフィルタ20上に透明画素電極31を設ける場合、
すなわちその層構成が、例えば図3に示すように基板1
1 カラーフィルタ20 透明画素電極31 配向膜5
1の順となっている層構成においては、透明画素電極3
1とスイッチング素子30との導通をスルーホールAを
介して行うことになるが、この場合、カラーフィルタ2
0の位置ずれやスルーホールA形成時の形状不良などの
不具合により、スイッチング素子30と透明画素電極3
1との接触抵抗を一定に保つことが難しくなり、ひどい
場合には接触不良、即ち欠陥画素の発生の原因となるも
のであった。
[0004] 2. Therefore, when the transparent pixel electrode 31 is provided on the color filter 20 to solve the above problem,
That is, as shown in FIG.
1 Color filter 20 Transparent pixel electrode 31 Alignment film 5
1, the transparent pixel electrode 3
1 and the switching element 30 are conducted through the through hole A. In this case, the color filter 2
The switching element 30 and transparent pixel electrode 3
This makes it difficult to maintain a constant contact resistance with No. 1 and, in severe cases, causes poor contact, that is, a defective pixel.

【0005】3.また、カラーフィルタ20の表面は、
段差や不均一が発生しやすく、このために液晶61の配
向乱れ、液晶層の厚み(ギャップ幅)の不均一などが生
じ、表示画像にむらがみられることがあった。以上のよ
うな現状から、従来より現在でもなお、ほとんどの液晶
表示装置においては、カラーフィルタ20はスイッチン
グ素子30と対向するもう一方の電極板の側に設けられ
ていた。
[0005] 3. The surface of the color filter 20 is
Steps and non-uniformity are apt to occur, which may cause disorder in the alignment of the liquid crystal 61 and non-uniformity in the thickness (gap width) of the liquid crystal layer, resulting in uneven display images. In view of the above situation, the color filter 20 has been provided on the other electrode plate side facing the switching element 30 in most liquid crystal display devices.

【0006】[0006]

【発明が解決しようとする課題】本発明では、上記のよ
うな様々な不具合点を一挙に解決可能な電極板の構成お
よびその製造方法を提供することを目的とする。
SUMMARY OF THE INVENTION An object of the present invention is to provide a configuration of an electrode plate and a method of manufacturing the same, which can solve the above-mentioned various problems at once.

【0007】[0007]

【課題を解決するための手段】本発明は、基板上に耐熱
性のアクリレート樹脂またはポリイミドの着色パターン
層を形成し、次いで透明被覆層を介在させ、その上にス
イッチング素子と画素駆動用透明電極とを形成したこと
を特徴とする液晶表示装置用電極板、およびその製造方
法である。
According to the present invention, a colored pattern layer of a heat-resistant acrylate resin or polyimide is formed on a substrate, a transparent coating layer is interposed therebetween, and a switching element and a transparent electrode for driving pixels are formed thereon. And an electrode plate for a liquid crystal display device, and a method of manufacturing the same.

【0008】[0008]

【発明の実施の形態】すなわち本発明は、既に述べたカ
ラーフィルタの存在に起因する諸々の不具合を解消する
ため、カラーフィルタの上に絶縁性の透明被覆層を介し
て、スイッチング素子及び画素駆動用透明電極を形成す
る。これらのことが可能になるよう、カラーフィルタに
は、後工程の熱処理の温度に耐え得るだけの耐熱性が要
求される。それ故、カラーフィルタの材料として、着色
材料は染料よりも耐熱性に優れる顔料が用いられる。こ
の顔料を分散させる媒体は、カラーフィルタの骨格成分
となる樹脂であり、この樹脂は耐熱性のある樹脂が望ま
しい。具体的には、耐熱温度230〜250℃のアクリ
レート樹脂やポリイミド樹脂が挙げられる。
DESCRIPTION OF THE PREFERRED EMBODIMENTS In order to solve the various problems caused by the existence of the color filter described above, the present invention provides a switching element and a pixel drive through an insulating transparent coating layer on the color filter. A transparent electrode for use. In order to make these possible, the color filter is required to have heat resistance enough to withstand the temperature of the heat treatment in the subsequent step. Therefore, as a material of the color filter, a pigment having higher heat resistance than a dye is used as a coloring material. The medium in which the pigment is dispersed is a resin serving as a skeleton component of the color filter, and the resin is preferably a resin having heat resistance. Specifically, an acrylate resin or a polyimide resin having a heat resistance temperature of 230 to 250 ° C. is exemplified.

【0009】また、透明被覆膜は、カラーフィルタ表面
の段差や微細な凹凸を緩和するためのものであって、平
滑化層とも言い得るものである。表面を平坦化すること
で、この上に形成されるスイッチング素子や、画素駆動
用透明電極の特性に好結果をもたらす。透明被覆層の材
料としては、カラーフィルタに用いられた樹脂と同様の
耐熱性樹脂のほか、二酸化ケイ素(SiO2)、五酸化
タンタル(Ta25)、窒化ケイ素(Si34)等の透
明無機物質を用いることができる。耐熱性樹脂の上に透
明無機物質を積層する複層構造にした透明被覆層であっ
ても良い。
[0009] The transparent coating film is provided for alleviating steps and fine irregularities on the surface of the color filter, and can be called a smoothing layer. By flattening the surface, the characteristics of the switching element formed thereon and the characteristics of the transparent electrode for driving a pixel are advantageously obtained. Examples of the material of the transparent coating layer include, in addition to the same heat-resistant resin as the resin used for the color filter, silicon dioxide (SiO 2 ), tantalum pentoxide (Ta 2 O 5 ), silicon nitride (Si 3 N 4 ), and the like. Can be used. A transparent coating layer having a multilayer structure in which a transparent inorganic substance is laminated on a heat-resistant resin may be used.

【0010】次いで、スイッチング素子について述べ
る。スイッチング素子として薄膜トランジスタ(TF
T)を設ける場合、基本的にゲート電極、ゲート絶縁
膜、アモルファスシリコン層、パシベーション層、オー
ミック層、ソース電極、およびドレイン電極よりなる。
このうち、ゲート絶縁膜、アモルファスシリコン層、お
よびパシベーション層は、層構造として稠密性が要求さ
れるので、プラズマCVD法により成膜する際も、基板
温度をある程度加温する必要があるとされていた。しか
し、本発明では、スイッチング素子の下にあるカラーフ
ィルタの耐熱温度230〜250℃を踏まえて、その温
度以下の低温で成膜するプロセスを採用する。具体的手
段の一つとしては、プラズマCVD中に水素ラジカル
(H*)を導入することであり、これにより所望の物性
を有する各種の膜構造が得られる。
Next, the switching element will be described. Thin film transistor (TF
When T) is provided, it basically includes a gate electrode, a gate insulating film, an amorphous silicon layer, a passivation layer, an ohmic layer, a source electrode, and a drain electrode.
Of these, the gate insulating film, the amorphous silicon layer, and the passivation layer are required to have a dense layer structure, so that it is necessary to raise the substrate temperature to some extent even when the film is formed by the plasma CVD method. Was. However, the present invention adopts a process of forming a film at a low temperature equal to or lower than the heat resistance temperature of 230 to 250 ° C. of the color filter below the switching element. One of the specific means is to introduce hydrogen radicals (H * ) during plasma CVD, whereby various film structures having desired physical properties can be obtained.

【0011】[0011]

【実施例】【Example】

<実施例1>TFT方式液晶表示装置のTFT形成側電
極板の製造プロセスの一例を、以下に図1に沿って説明
する。ガラス基板11上に複数色パターン形成した、ア
クリレート樹脂を樹脂成分とする顔料分散カラーフィル
タ20の上に、アクリル系樹脂のオーバーコート層41
を形成し、この上にクロムのゲート電極33と、ITO
(酸化インジウム−スズ)の透明画素電極31をパター
ン形成した。
<Example 1> An example of a manufacturing process of a TFT forming side electrode plate of a TFT type liquid crystal display device will be described below with reference to FIG. An acrylic resin overcoat layer 41 is formed on a pigment-dispersed color filter 20 having a plurality of color patterns formed on a glass substrate 11 and containing an acrylate resin as a resin component.
Is formed thereon, and a chromium gate electrode 33 and an ITO
A transparent pixel electrode 31 of (indium-tin oxide) was patterned.

【0012】次いでゲート絶縁膜34をSiNxにてプ
ラズマCVDで厚さ0.5μmに形成した。ここでは、
基板温度は230℃、水素を170sccm、水素で希
釈した10%シラン(SiH4:10%、H2:90%)
を流量50sccm、同じく水素希釈のアンモニアを流
量34sccmで反応室内に供給し、圧力1torr、
負荷電力180W、堆積速度1Å/secにて成膜を行
った。この際、230℃という低温成膜を実現するた
め、マイクロ波(2.45GHz、400W)により形
成した水素ラジカル(H*)(水素20sccm)をS
iNxのプラズマCVD中に導入した。これは、図5に
示すように、発振器71からのマイクロ波を導波管72
に導き、この導波管72の途中から水素を供給すること
で水素ラジカルを生成し、これをCVDチャンバー73
内で主に基板11に向けて供給するものである。
Next, a gate insulating film 34 was formed to a thickness of 0.5 μm by plasma CVD using SiNx. here,
The substrate temperature is 230 ° C., 170 sccm of hydrogen, 10% silane diluted with hydrogen (SiH 4 : 10%, H 2 : 90%)
Is supplied into the reaction chamber at a flow rate of 50 sccm, and ammonia diluted with hydrogen is also supplied at a flow rate of 34 sccm.
Film formation was performed at a load power of 180 W and a deposition rate of 1 ° / sec. At this time, in order to realize film formation at a low temperature of 230 ° C., hydrogen radicals (H * ) (hydrogen 20 sccm) formed by microwaves (2.45 GHz, 400 W) are converted to S
Introduced during plasma CVD of iNx. This is because, as shown in FIG.
To supply hydrogen from the middle of the waveguide 72 to generate hydrogen radicals.
It is mainly supplied to the substrate 11 inside.

【0013】続いてアモルファスシリコン(a−Si:
H)層35をプラズマCVDにて厚さ0.05μmに形
成した。ここでは、基板温度は230℃、水素で希釈し
た10%シラン(SiH4:10%、H2:90%)を流
量300sccmで反応室内に供給し、圧力1tor
r、負荷電力60W、堆積速度1Å/secにて成膜を
行った。続いてパシベーション層36をSiNxにて同
様にしてプラズマCVDで厚さ0.5μmに形成した。
この際にも、水素ラジカル(H*)(水素20scc
m)をSiNxのプラズマCVD中に導入した。この
後、フォトレジストをパターン耐蝕膜とする反応性イオ
ンエッチングをCF4ガス中にて行ってゲート絶縁膜3
4、アモルファスシリコン層35、およびパシベーショ
ン層36を所望のパターンとした。
Subsequently, amorphous silicon (a-Si:
H) The layer 35 was formed to a thickness of 0.05 μm by plasma CVD. Here, the substrate temperature is 230 ° C., 10% silane (SiH 4 : 10%, H 2 : 90%) diluted with hydrogen is supplied into the reaction chamber at a flow rate of 300 sccm, and the pressure is 1 torr.
The film was formed at a load power of 60 W and a deposition rate of 1 ° / sec. Subsequently, the passivation layer 36 was similarly formed to a thickness of 0.5 μm by plasma CVD using SiNx.
At this time, the hydrogen radical (H * ) (hydrogen 20 scc)
m) was introduced during SiNx plasma CVD. Thereafter, reactive ion etching using a photoresist as a pattern corrosion-resistant film is performed in CF 4 gas to form a gate insulating film 3.
4. The amorphous silicon layer 35 and the passivation layer 36 have a desired pattern.

【0014】ここでは、TFTのゲート電極33と、ソ
ース電極38、ドレイン電極39が重なる部分の界面が
特性上重要であるため、上記のゲート絶縁膜34とアモ
ルファスシリコン(a−Si:H)層35は必ず連続形
成し、パシベーション層36も続いて連続形成すること
が望ましい。そののちパターニングする。
Here, since the interface of the portion where the gate electrode 33 of the TFT overlaps the source electrode 38 and the drain electrode 39 is important in characteristics, the gate insulating film 34 and the amorphous silicon (a-Si: H) layer It is preferable that the passivation layer 36 be formed continuously and the passivation layer 36 be formed continuously. After that, patterning is performed.

【0015】続いて、フォトレジストをパターン耐蝕膜
とし、パシベーション層36に、同様に反応性イオンエ
ッチングをCF4ガス中にて行って長方形のスルーホー
ルを2箇所形成し、ここにオーミック層37をプラズマ
CVDにて厚さ0.05μmに形成した。ここで、基板
温度は230℃、水素を150sccmと、水素で希釈
した10%シラン(SiH4:10%、H2:90%)を
流量300sccm、水素希釈1000ppmのPH3
を流量90sccmで反応室内に供給し、圧力1tor
r、負荷電力60W、堆積速度0.6Å/secにて成
膜を行った。次いでソース電極38とドレイン電極39
を金属アルミニウム膜にて厚さ0.8μmにスパッタリ
ングにて成膜し、ウエットエッチングにてパターン形成
した。
Subsequently, a photoresist is used as a pattern corrosion resistant film, and reactive ion etching is similarly performed in the CF 4 gas in the passivation layer 36 to form two rectangular through holes, and the ohmic layer 37 is formed here. It was formed to a thickness of 0.05 μm by plasma CVD. Here, the substrate temperature is 230 ° C., the hydrogen is 150 sccm, the flow rate is 300 sccm of 10% silane (SiH 4 : 10%, H 2 : 90%) diluted with hydrogen, and the hydrogen dilution is 1000 ppm of PH 3.
Is supplied into the reaction chamber at a flow rate of 90 sccm, and the pressure is 1 torr.
The film was formed at a load power of 60 W and a deposition rate of 0.6 ° / sec. Next, the source electrode 38 and the drain electrode 39
Was formed with a metal aluminum film to a thickness of 0.8 μm by sputtering, and a pattern was formed by wet etching.

【0016】このあと、全面にポリイミドの配向膜を塗
布し、ラビング工程を経て、対向電極板と対向させて位
置合わせをしながら貼り合わせ、液晶を両電極板の間に
注入し、密封して液晶表示装置とした。得られた液晶表
示装置は、欠陥画素や色ムラなどは発生せず高品位な画
面が得られた。
After that, an alignment film of polyimide is applied to the entire surface, and is subjected to a rubbing process so that the alignment film is bonded to the counter electrode plate so as to be opposed to the counter electrode plate. The device. In the obtained liquid crystal display device, a high-quality screen was obtained without occurrence of defective pixels or color unevenness.

【0017】<実施例2>TFT方式液晶表示装置のT
FT形成側電極板の製造プロセスの別の一例を、以下に
図4に沿って説明する。ガラス基板11上に複数色パタ
ーン形成した、ポリイミドを樹脂成分とする顔料分散カ
ラーフィルタ20の上に、ポリイミド系樹脂のオーバー
コート層41を形成し、この上にクロムのゲート電極3
3と、IPS(In-Plane Switching:平面スイッチン
グ)方式の対向電極32aをパターン形成した。
<Embodiment 2> T of a TFT type liquid crystal display device
Another example of the manufacturing process of the FT formation side electrode plate will be described below with reference to FIG. A polyimide resin overcoat layer 41 is formed on a pigment-dispersed color filter 20 containing polyimide as a resin component and having a plurality of color patterns formed on a glass substrate 11, and a chromium gate electrode 3 is formed thereon.
3 and an opposite electrode 32a of the IPS (In-Plane Switching) type were patterned.

【0018】次いでゲート絶縁膜34をSiNxにてプ
ラズマCVDで厚さ0.5μmに形成した。ここでは、
基板温度は250℃、水素を170sccm、水素で希
釈した10%シラン(SiH4:10%、H2:90%)
を流量50sccm、同じく水素希釈のアンモニアを流
量34sccmで反応室内に供給し、圧力1torr、
負荷電力180W、堆積速度1Å/secにて成膜を行
った。この際、250℃という低温成膜を実現するた
め、マイクロ波(2.45GHz、400W)により形
成した水素ラジカル(H*)(水素20sccm)をS
iNxのプラズマCVD中に導入した。これは、図5に
示すように、発振器71からのマイクロ波を導波管72
に導き、この導波管72の途中から水素を供給すること
で水素ラジカルを生成し、これをCVDチャンバー73
内で主に基板11に向けて照射するものである。
Next, a gate insulating film 34 was formed with a thickness of 0.5 μm by plasma CVD using SiNx. here,
The substrate temperature is 250 ° C., hydrogen is 170 sccm, 10% silane diluted with hydrogen (SiH 4 : 10%, H 2 : 90%)
Is supplied into the reaction chamber at a flow rate of 50 sccm, and ammonia diluted with hydrogen is also supplied at a flow rate of 34 sccm.
Film formation was performed at a load power of 180 W and a deposition rate of 1 ° / sec. At this time, in order to realize low-temperature film formation at 250 ° C., hydrogen radicals (H * ) (hydrogen 20 sccm) formed by microwaves (2.45 GHz, 400 W) are converted into S
Introduced during plasma CVD of iNx. This is because, as shown in FIG.
To supply hydrogen from the middle of the waveguide 72 to generate hydrogen radicals.
The irradiation is mainly performed toward the substrate 11.

【0019】続いてアモルファスシリコン(a−Si:
H)層35をプラズマCVDにて厚さ0.05μmに形
成した。ここでは、基板温度は250℃、水素で希釈し
た10%シラン(SiH4:10%、H2:90%)を流
量300sccmで反応室内に供給し、圧力1tor
r、負荷電力60W、堆積速度1Å/secにて成膜を
行った。続いてパシベーション層36をSiNxにて同
様にしてプラズマCVDで厚さ0.5μmに形成した。
この際にも、水素ラジカル(H*)(水素20scc
m)をSiNxのプラズマCVD中に導入した。その
後、フォトレジストをパターン耐蝕膜とする反応性イオ
ンエッチングをCF4ガス中にて行ってアモルファスシ
リコン層35、およびパシベーション層36を所望のパ
ターンとした。
Subsequently, amorphous silicon (a-Si:
H) The layer 35 was formed to a thickness of 0.05 μm by plasma CVD. Here, the substrate temperature is 250 ° C., 10% silane diluted with hydrogen (SiH 4 : 10%, H 2 : 90%) is supplied into the reaction chamber at a flow rate of 300 sccm, and the pressure is 1 torr.
The film was formed at a load power of 60 W and a deposition rate of 1 ° / sec. Subsequently, the passivation layer 36 was similarly formed to a thickness of 0.5 μm by plasma CVD using SiNx.
At this time, the hydrogen radical (H * ) (hydrogen 20 scc)
m) was introduced during SiNx plasma CVD. After that, the amorphous silicon layer 35 and the passivation layer 36 were formed into a desired pattern by performing reactive ion etching using a photoresist as a pattern corrosion resistant film in CF 4 gas.

【0020】ここでは、TFTのゲート電極33と、ソ
ース電極38、ドレイン電極39が重なる部分の界面が
特性上重要であるため、上記のゲート絶縁膜34とアモ
ルファスシリコン(a−Si:H)層35は必ず連続形
成し、パシベーション層36も続いて連続形成すること
が望ましい。そののちパターニングする。
Here, since the interface of the portion where the gate electrode 33 of the TFT overlaps the source electrode 38 and the drain electrode 39 is important in characteristics, the gate insulating film 34 and the amorphous silicon (a-Si: H) layer It is preferable that the passivation layer 36 be formed continuously and the passivation layer 36 be formed continuously. After that, patterning is performed.

【0021】続いて、フォトレジストをパターン耐蝕膜
とし、パシベーション層36に、同様に反応性イオンエ
ッチングをCF4ガス中にて行って長方形のスルーホー
ルを2箇所形成し、ここにオーミック層37をプラズマ
CVDにて厚さ0.05μmに形成した。ここで、基板
温度は250℃、水素を150sccmと、水素で希釈
した10%シラン(SiH4:10%、H2:90%)を
流量300sccm、水素希釈1000ppmのPH3
を流量90sccmで反応室内に供給し、圧力1tor
r、負荷電力60W、堆積速度0.6Å/secにて成
膜を行った。その後、CF4ガスを用いた反応性イオン
エッチングにてオーミック層37をパターン化した。次
いでソース電極38とドレイン電極39を金属アルミニ
ウム膜にて厚さ0.8μmにスパッタリングにて成膜、
ウエットエッチングにてパターン成膜した。
Subsequently, a photoresist is used as a pattern corrosion-resistant film, and reactive ion etching is similarly performed in the CF 4 gas in the passivation layer 36 to form two rectangular through holes, and the ohmic layer 37 is formed here. It was formed to a thickness of 0.05 μm by plasma CVD. Here, the substrate temperature is 250 ° C., hydrogen is 150 sccm, 10% silane diluted with hydrogen (SiH 4 : 10%, H 2 : 90%) is 300 sccm in flow rate, and PH 3 diluted with hydrogen is 1000 ppm.
Is supplied into the reaction chamber at a flow rate of 90 sccm, and the pressure is 1 torr.
The film was formed at a load power of 60 W and a deposition rate of 0.6 ° / sec. Thereafter, the ohmic layer 37 was patterned by reactive ion etching using CF 4 gas. Next, the source electrode 38 and the drain electrode 39 were formed by sputtering with a metal aluminum film to a thickness of 0.8 μm,
A pattern was formed by wet etching.

【0022】このあと、対向基板を貼り合わせ、液晶を
両基板の間に注入し、密封して液晶表示装置とした。得
られた液晶表示装置は、欠陥画素や色ムラなどは発生せ
ず、IPS方式の特徴である広視野角の高品位な画面が
得られた。
Thereafter, the opposing substrate was bonded, and liquid crystal was injected between the two substrates and sealed to obtain a liquid crystal display device. In the obtained liquid crystal display device, a defective pixel, color unevenness, and the like did not occur, and a high-quality screen having a wide viewing angle characteristic of the IPS system was obtained.

【0023】[0023]

【発明の効果】本発明の構成によれば、従来の構成での
既述の諸々の不具合、すなわち電圧損失や、欠陥画素の
発生、液晶の配向乱れによる表示ムラなどが生じない。
また従来、形状や精度の改善のために施していた工夫や
精度の維持管理等の手数が低減され、工程が簡素化され
るため、製造が比較的容易になる。
According to the structure of the present invention, the above-mentioned various problems in the conventional structure, such as the voltage loss, the occurrence of defective pixels, and the display unevenness due to the disorder of the alignment of the liquid crystal, do not occur.
In addition, the number of steps conventionally required for improving the shape and accuracy and the number of steps for maintaining and managing the accuracy are reduced, and the process is simplified, so that the manufacturing becomes relatively easy.

【0024】[0024]

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の液晶表示装置用電極板の一例を示す断
面図である。
FIG. 1 is a cross-sectional view illustrating an example of an electrode plate for a liquid crystal display device of the present invention.

【図2】従来の、透明画素電極上にカラーフィルタを設
ける構成の液晶表示装置用電極板を示す断面図である。
FIG. 2 is a cross-sectional view illustrating a conventional electrode plate for a liquid crystal display device in which a color filter is provided on a transparent pixel electrode.

【図3】従来の、カラーフィルタ上に透明画素電極を設
ける構成の液晶表示装置用電極板を示す断面図である。
FIG. 3 is a cross-sectional view showing a conventional electrode plate for a liquid crystal display device in which a transparent pixel electrode is provided on a color filter.

【図4】本発明の液晶表示装置用電極板の他の一実施例
を示す断面図である。
FIG. 4 is a sectional view showing another embodiment of the electrode plate for a liquid crystal display device of the present invention.

【図5】本発明に用いる水素ラジカル供給部を示す説明
図である。
FIG. 5 is an explanatory diagram showing a hydrogen radical supply unit used in the present invention.

【符号の説明】[Explanation of symbols]

11 ガラス基板 12 対向基板 20 カラーフィルタ 30 スイッチング素子 31 透明画素電極 32 対向電極 33 ゲート電極 34 ゲート絶縁膜 35 アモルファスシリコン層 36 パシベーション層 37 オーミック層 38 ソース電極 39 ドレイン電極 41 オーバーコート層 42 透明絶縁層 51 配向膜 61 液晶 71 発振器 72 導波管 73 CVDチャンバー DESCRIPTION OF SYMBOLS 11 Glass substrate 12 Counter substrate 20 Color filter 30 Switching element 31 Transparent pixel electrode 32 Counter electrode 33 Gate electrode 34 Gate insulating film 35 Amorphous silicon layer 36 Passivation layer 37 Ohmic layer 38 Source electrode 39 Drain electrode 41 Overcoat layer 42 Transparent insulating layer 51 Alignment film 61 Liquid crystal 71 Oscillator 72 Waveguide 73 CVD chamber

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】基板上に耐熱性のアクリレート樹脂または
ポリイミドの着色パターン層を設け、その上に透明被覆
層を介して、スイッチング素子と画素駆動用透明電極と
を形成したことを特徴とする液晶表示装置用電極板。
1. A liquid crystal, comprising a heat-resistant acrylate resin or polyimide colored pattern layer provided on a substrate, and a switching element and a transparent electrode for driving pixels formed thereon via a transparent coating layer. Electrode plate for display device.
【請求項2】基板上に耐熱性のアクリレート樹脂または
ポリイミドの着色パターン層を形成し、その上から透明
被覆層を形成し、その上に着色パターン層の耐熱温度以
下の温度で成膜されたスイッチング素子と画素駆動用透
明電極とを形成することを特徴とする液晶表示装置用電
極板の製造方法。
2. A heat-resistant acrylate resin or polyimide colored pattern layer is formed on a substrate, a transparent coating layer is formed thereon, and a film is formed thereon at a temperature lower than the heat-resistant temperature of the colored pattern layer. A method for manufacturing an electrode plate for a liquid crystal display device, comprising forming a switching element and a transparent electrode for driving a pixel.
JP4267097A 1997-02-26 1997-02-26 Electrode plate for liquid crystal display device and production thereof Pending JPH10239680A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4267097A JPH10239680A (en) 1997-02-26 1997-02-26 Electrode plate for liquid crystal display device and production thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4267097A JPH10239680A (en) 1997-02-26 1997-02-26 Electrode plate for liquid crystal display device and production thereof

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2001313776A Division JP2002207208A (en) 2001-10-11 2001-10-11 Liquid crystal display device

Publications (1)

Publication Number Publication Date
JPH10239680A true JPH10239680A (en) 1998-09-11

Family

ID=12642470

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4267097A Pending JPH10239680A (en) 1997-02-26 1997-02-26 Electrode plate for liquid crystal display device and production thereof

Country Status (1)

Country Link
JP (1) JPH10239680A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20000039663A (en) * 1998-12-15 2000-07-05 김영환 Method for manufacturing thin film transistor liquid crystal display device
JP2001166338A (en) * 1999-09-30 2001-06-22 Samsung Electronics Co Ltd Thin-film transistor substrate for liquid crystal display device and manufacturing method therefor
JP2007041553A (en) * 2005-06-30 2007-02-15 Semiconductor Energy Lab Co Ltd Liquid crystal display device and manufacturing method thereof
KR100713641B1 (en) * 2000-08-08 2007-05-02 엘지.필립스 엘시디 주식회사 Liquid Crystal Display Device And Method of Fabricating The Same
JP2008286911A (en) * 2007-05-16 2008-11-27 Toppan Printing Co Ltd Image display device
JP2009204724A (en) * 2008-02-26 2009-09-10 Toshiba Mobile Display Co Ltd Display element
US8168689B2 (en) 2007-10-01 2012-05-01 Industrial Technology Research Institute High optical contrast pigment and colorful photosensitive composition employing the same and fabrication method thereof

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20000039663A (en) * 1998-12-15 2000-07-05 김영환 Method for manufacturing thin film transistor liquid crystal display device
JP2001166338A (en) * 1999-09-30 2001-06-22 Samsung Electronics Co Ltd Thin-film transistor substrate for liquid crystal display device and manufacturing method therefor
JP2011186484A (en) * 1999-09-30 2011-09-22 Samsung Electronics Co Ltd Thin film transistor substrate for liquid crystal display device and method for manufacturing the same
KR100713641B1 (en) * 2000-08-08 2007-05-02 엘지.필립스 엘시디 주식회사 Liquid Crystal Display Device And Method of Fabricating The Same
JP2007041553A (en) * 2005-06-30 2007-02-15 Semiconductor Energy Lab Co Ltd Liquid crystal display device and manufacturing method thereof
JP2008286911A (en) * 2007-05-16 2008-11-27 Toppan Printing Co Ltd Image display device
US8168689B2 (en) 2007-10-01 2012-05-01 Industrial Technology Research Institute High optical contrast pigment and colorful photosensitive composition employing the same and fabrication method thereof
JP2009204724A (en) * 2008-02-26 2009-09-10 Toshiba Mobile Display Co Ltd Display element

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