KR20000044602A - Method of forming capacitor - Google Patents

Abstract

PURPOSE: A method of forming a capacitor is provided to prevent a lower electrode from being flaked at a high-temperature thermal annealing. CONSTITUTION: In a method of forming a capacitor, a first silicon oxide film(2) is formed on a silicon substrate(1), and a titanium film having a thickness of 100 to 300 Angstroms is deposited on the silicon oxide film(2). An annealing is executed at an oxygen atmosphere of 600 to 800°C so as to form a titanium oxide film(3). A titanium film having a thickness of 1000 to 3000 Angstroms is formed on an entire surface, and is selectively etched to form a lower electrode(14). A second silicon oxide film(5) having a thickness of 1000 to 2000 Angstroms is formed on an entire surface of a resultant structure. A surface of the lower electrode(4) is exposed by selectively removing the second silicon oxide film. A half of a desired thickness of an SrBi2Ta2O9 film is formed on an entire surface by use of a sol-gel method, and then a rapid thermal annealing is performed during 30 seconds at a temperature of 725°C in an oxygen atmosphere. The other half of the desired thickness of a SrBi2Ta2O9 film is formed in the same manner as forming the half of SrBi2Ta2O9. An annealing is performed during one hour at a temperature of 800°C in an oxygen atmosphere. Thus, a SrBi2Ta2O9 ferroelectric film(6) is formed on the lower electrode(4) and the silicon oxide film(5).

Description

Capacitor Manufacturing Method of Semiconductor Device

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to the field of semiconductor device manufacturing, and more particularly, to a method of manufacturing a capacitor of a semiconductor device capable of preventing peeling of the lower electrode in a ferroelectric capacitor manufacturing process.

Ferroelectric memory devices are a kind of non-volatile memory devices that not only store the stored information even when the power supply is cut off, but also operate at the same speed as the next-generation memory devices, comparable to the existing DRAM (Dynamic Random Access Memory). SrBi ₂ Ta ₂ O ₉ (hereinafter referred to as SBT) and Pb (Zr _x Ti1- _x ) O ₃ (hereinafter referred to as PZT) thin films are mainly used as storage materials for ferroelectric memory devices. In order to obtain the ferroelectric properties of the ferroelectric as described above, it is essential to select upper and lower electrode materials and to control appropriate processes.

As the electrode material, platinum oxide (Pt) having excellent oxidation resistance and materials such as IrO ₂ , RuO _2, or metal Ir and Ru, which are conductive oxides, are used. In particular, a platinum film is most commonly used. One of the peculiarities in the manufacturing process of the ferroelectric memory device is that the ferroelectric exhibits the required properties only after undergoing a high temperature oxygen atmosphere heat treatment of about 800 ° C. several times.

Therefore, when platinum (Pt) is applied to the lower electrode, a high temperature heat treatment process is performed in a state where the Pt lower electrode is formed. As is well known, the Pt film has a weak adhesive force with an oxide film under the stress, which is generated during heat treatment. There is a problem due to peeling. Therefore, in order to prevent such peeling phenomenon, a titanium film is formed as a glue layer between the Pt lower electrode and the oxide film. However, when the oxygen atmosphere is subjected to a high temperature heat treatment process, the titanium film is also changed into a titanium oxide film, which also causes a peeling phenomenon. However, the peeling phenomenon tends to be reduced as compared with the silicon oxide film. Such peeling not only renders the device itself impossible, but also significantly lowers the reliability even when the device is manufactured.

The present invention devised to solve the above problems is to provide a method of manufacturing a capacitor of a semiconductor device that can prevent the Pt lower electrode is peeled off during the high temperature heat treatment process.

1 to 5 are cross-sectional views of a capacitor manufacturing process according to an embodiment of the present invention.

* Explanation of reference numerals for the main parts of the drawings

1: single crystal silicon substrate 2: insulating film

3: titanium oxide film 4: Pt lower electrode

5, 8: Silicon oxide film 6: Ferroelectric SrBi ₂ Ta ₂ O ₉ film

7: Pt upper electrode

The present invention for achieving the above object is a first step of forming a first insulating film on a semiconductor substrate; Forming a lower electrode on the first insulating film; A third step of forming a second insulating film on the entire structure in which the second step is completed, and selectively etching the second insulating film to expose the lower electrode surface; A fourth step of forming a dielectric film on the entire structure in which the third step is completed; And a fifth step of forming an upper electrode on the dielectric layer.

The present invention is characterized by forming a ferroelectric film and an upper electrode after forming the Pt lower electrode on the insulating film, depositing a silicon oxide film, and selectively etching the silicon oxide film to expose the surface of the Pt lower electrode. In this way, the capacitor may be manufactured to hold the Pt lower electrode to prevent the silicon oxide film from being peeled off by the subsequent high temperature thermal process.

Hereinafter, a capacitor manufacturing method according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

First, as shown in FIG. 1, the first silicon oxide film 2 is formed on the single crystal silicon substrate 1 for interlayer insulation and planarization, and 100 Å as an adhesive film of the lower electrode on the first silicon oxide film 2 is formed. To 300 Å thick titanium film, and then heat treated in an oxygen atmosphere at a temperature of 600 ℃ to 800 ℃ using an electric furnace to change the titanium film to a titanium oxide film (3). Subsequently, a Pt film having a thickness of 1000 GPa to 3000 GPa is formed and selectively etched to form a Pt lower electrode 4.

Subsequently, a second silicon oxide film 5 having a thickness of 1000 GPa to 2000 GPa is formed on the first silicon oxide film 2 and the Pt lower electrode 4. At this time, the second silicon oxide film 5 is formed using a thermal chemical vapor deposition method to exhibit good layer covering properties.

Next, as shown in FIG. 2, the surface of the Pt lower electrode 4 is exposed by selectively removing the silicon oxide film using a conventional photomask and dry anisotropic etching method.

Next, a SrBi ₂ Ta ₂ O ₉ film was formed on the entire structure by using the Sol-Gel method by 1/2 of the desired thickness, and the temperature was increased to 725 ° C. in a rapid heat treatment apparatus in an oxygen atmosphere. conduct second heat treatment, and the remaining one-half the thickness in the same way again, SrBi ₂ Ta ₂ O ₉ film is formed and subjected to the same heat treatment and then, SrBi ₂ Ta ₂ O ₉ film with oxygen 800 ℃ temperature in an electric furnace of an oxygen atmosphere atmosphere Heat treatment is performed for 1 hour at, thereby completing the SrBi ₂ Ta ₂ O ₉ ferroelectric film 6 on the Pt lower electrode 4 and the second silicon oxide film 5 as shown in FIG. 3. Thus, the entire structure can be flattened by forming the ferroelectric film by the sol-gel method.

Next, as shown in FIG. 4, a Pt film having a thickness of 1500 kPa to 2000 kPa is formed on the SrBi ₂ Ta ₂ O ₉ ferroelectric film 6, and the Pt upper electrode 7 is formed by selectively etching the Pt film.

Next, as shown in Fig. 5, after depositing the third silicon oxide film 8 for the interlayer insulating film using thermal chemical vapor deposition, the third silicon oxide film 8 is again subjected to photomask and dry anisotropic etching. It is selectively removed to expose the Pt upper electrode 7 to form a contact hole for metal wiring.

Subsequently, heat treatment is performed at 600 ° C. to 800 ° C. in an oxygen atmosphere for 1 hour using an electric furnace to recover damage caused by dry anisotropic etching, for example, deterioration caused by plasma or the like. In this high temperature heat treatment process, the second silicon oxide film 5 serves to fix the Pt lower electrode 4 not to be peeled off.

The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and various substitutions, modifications, and changes can be made in the art without departing from the technical spirit of the present invention. It will be apparent to those of ordinary knowledge.

According to the present invention, the silicon oxide film covering the sidewalls and the surface edges of the Pt lower electrode can be effectively prevented from peeling off the Pt lower electrode during the high temperature heat treatment performed after the formation of the capacitor. In addition, the manufacturing process can be simplified by using a method of forming a unit capacitor by patterning the upper electrode without patterning the ferroelectric film, and the ferroelectric film is formed by forming the ferroelectric SrBi ₂ Ta ₂ O ₉ film by the sol-gel method. The formation itself may be planarized to greatly reduce the degree of irregularities generated after the formation of the capacitor.

Claims (5)

In the capacitor manufacturing method of a semiconductor element, Forming a first insulating film on the semiconductor substrate; Forming a lower electrode on the first insulating film; A third step of forming a second insulating film on the entire structure in which the second step is completed, and selectively etching the second insulating film to expose the lower electrode surface; A fourth step of forming a dielectric film on the entire structure in which the third step is completed; And A fifth step of forming an upper electrode on the dielectric layer Capacitor manufacturing method of a semiconductor device comprising a. The method of claim 1, The first step, Forming an interlayer insulating film on the semiconductor substrate; Forming a glue layer on the interlayer insulating film; And And oxidizing the adhesive film to form an oxide film. The method according to claim 1 or 2, The method of manufacturing a capacitor of a semiconductor device, characterized in that the lower electrode is formed of a Pt film. The method of claim 3, wherein In the fourth step, And forming the dielectric film by a sol-gel method to planarize the entire structure. The method of claim 4, wherein The fourth step, Forming a first SrBi ₂ Ta ₂ O ₉ film and subjecting it to rapid heat treatment in an oxygen atmosphere; Forming a _second SrBi ₂ Ta ₂ O ₉ film on the first SrBi ₂ Ta ₂ O ₉ film and performing rapid heat treatment in an oxygen atmosphere; And And heat-treating the first SrBi ₂ Ta ₂ O ₉ film and the second SrBi ₂ Ta ₂ O ₉ film for 1 hour at 800 ° C. in an electric furnace of an oxygen atmosphere.